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    Seminar Proposal Proyek Akhir Rev 2

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    deva ivanka
    This document summarizes a student's research on implementing turbo code for wireless communication systems using a comblock module. The research aims to simulate turbo code encoding and decoding techniques on the comblock turbo code module and test error correction with cyclic redundancy code and scrambling. The system design involves a comblock turbo code encoder/decoder module connected between a baseband interface and PSK/QAM/APSK modem. The block diagram shows the turbo code encoding and decoding process along with cyclic redundancy code, scrambling, and interleaving.

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    Seminar Proposal Proyek Akhir Rev 2

    Uploaded by

    deva ivanka
    21 views10 pages
    This document summarizes a student's research on implementing turbo code for wireless communication systems using a comblock module. The research aims to simulate turbo code encoding and decoding techniques on the comblock turbo code module and test error correction with cyclic redundancy code and scrambling. The system design involves a comblock turbo code encoder/decoder module connected between a baseband interface and PSK/QAM/APSK modem. The block diagram shows the turbo code encoding and decoding process along with cyclic redundancy code, scrambling, and interleaving.

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    This document summarizes a student's research on implementing turbo code for wireless communication systems using a comblock module. The research aims to simulate turbo code encoding and decoding techniques on the comblock turbo code module and test error correction with cyclic redundancy code and scrambling. The system design involves a comblock turbo code encoder/decoder module connected between a baseband interface and PSK/QAM/APSK modem. The block diagram shows the turbo code encoding and decoding process along with cyclic redundancy code, scrambling, and interleaving.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    21 views10 pages

    Seminar Proposal Proyek Akhir Rev 2

    Uploaded by

    deva ivanka
    This document summarizes a student's research on implementing turbo code for wireless communication systems using a comblock module. The research aims to simulate turbo code encoding and decoding techniques on the comblock turbo code module and test error correction with cyclic redundancy code and scrambling. The system design involves a comblock turbo code encoder/decoder module connected between a baseband interface and PSK/QAM/APSK modem. The block diagram shows the turbo code encoding and decoding process along with cyclic redundancy code, scrambling, and interleaving.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Download as pptx, pdf, or txt
    of 10

    IMPLEMENTATION OF TURBO CODE

    FOR WIRELESS COMMUNICATION SYSTEM


    USING COMBLOCK MODULE

    By :
    Adinda Putri Maharani
    NRP. 1203171007
    Adviser 1 : Adviser 2 :
    Ari Wijayanti, S.T, M.T Arifin, S.T, M.T
    NIP. 19761216 200312 2 001 NIP. 19600503 198803 1 004

    PROGRAM STUDY OF TELECOMMUNICATION ENGINEERING


    DEPARTMENT OF ELECTRONIC ENGINEERING
    ELECTRONIC ENGINEERING POLYTECHNIC INSTITUTE OF SURABAYA
    2020
    Background

    Research Purpose

    Problem Formulation

    Problem Limitation Road Map


    System Design

    Block Diagram

    References
    Background

    Picture 1. Transmission Picture 2. Wireless Picture 3. Comblock


    Data communication Turbo Code Module
    Research Purpose

    1. Simulating the Turbo Code Encoder and Turbo Code Decoder


    techniques on the comblock module.
    2. Testing the Turbo Code in error correction with Cyclic
    Redundancy Code and Scrambling.
    Formulation of the Problem

    1. How can the characteristics of the Turbo Code system correct


    errors?
    2. How can Cyclic Redundancy Code and Scrambling make error
    corrections?
    Problem Limitation
    1. The module used and conducted research is the Turbo Code Comblock
    Module.
    2. The error correction method used is the Cyclic Redundancy Code.
    3. Turbo Code Encoder uses the PCCC (Parallel Concatenated Convolutional
    Code) method
    4. Turbo Code Decoder uses SOVA algorithm (Soft-Output Viterbi Algorithm)
    5. The length of data that can be processed ranges from 64 bits to 4 Kbit.
    6. The maximum frequency for clock input is 90 MHz.
    7. Using code rate 1/3.
    System Design
    USB Data
    Streams

    COM-5003/ COM-7002
    COM-5004 COM-1202
    Turbo Code
    Baseband/ PSK/QAM/
    Network Encoder/
    APSK Modem
    Interface Decoder

    LAN/IP Baseband
    I/Q tx/rx
    Block Diagram
    Baseband
    CRC Insert Scrambler
    Input

    Turbo Code Helical Unique Word


    Encoder Interleaver Insertion
    To Modulator

    Turbo Code Helical De- Frame Sync From


    Decoder Interleaver UW Removal Demodulator

    Baseband CRC Check Descrambler


    Output
    References

    [1] Ali H. Mugaibel and Maan A. Kousa , “Turbo Codes: Promises and Challenges”, King
    Fahd University of Petroleum and Minerals, PO Box 1721, Dhahran 31261, Saudi Arabia.
    [2] Comblock specification for COM-7002 Turbo Code,
    www.comblock.com/download/com7002.pdf.
    [3] Mansi Rastogi, Rajesh Mehra, “FPGA Based Area Efficient Turbo Decoder For Wireless
    Communication” Int. Journal of Engineering Research and Applications, Vol. 3, Issue 5,
    Sep-Oct 2013, pp.1899-1904
    [4] Nguyen Viet Ha,dkk., “Design and Implementation of a Turbo Code System on FPGA”
    Post & Telecommunications Institute of Technology, Vietnam.
    [5] Wikipedia, 09 September 2019, “5G” (Online), diakses 24 September 2019
    https://id.wikipedia.org/wiki/5G.
    THANK YOU

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