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CH 06 - Dcc10e

This document discusses various methods for error detection and correction in data transmission. It describes parity checks, checksums, cyclic redundancy checks (CRC) for error detection. CRC uses modulo 2 arithmetic and polynomials to generate and check redundancy bits. Forward error correction techniques like block codes are also summarized, noting concepts like Hamming distance and code rate that allow error correction beyond simple detection.

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6 views

CH 06 - Dcc10e

This document discusses various methods for error detection and correction in data transmission. It describes parity checks, checksums, cyclic redundancy checks (CRC) for error detection. CRC uses modulo 2 arithmetic and polynomials to generate and check redundancy bits. Forward error correction techniques like block codes are also summarized, noting concepts like Hamming distance and code rate that allow error correction beyond simple detection.

Uploaded by

Mr. Shuaimi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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EDW 204

Data Communication
and Networking
CHAPTER 6

Error Detection and Correction


“Redundancy is a property of languages, codes and
sign systems which arises from a superfluity of rules,
and which facilitates communication in spite of all the
uncertainty acting against it.
Redundancy may be said to be due to an additional set
of rules, whereby it becomes increasingly difficult to
make an undetectable mistake.”
—On Human Communication,
Colin Cherry
Types of Errors
 An error occurs when a bit is altered between
transmission and reception
 Binary 1 is transmitted and binary 0 is received
 Binary 0 is transmitted and binary 1 is received
Error Detection
 Regardless of design you will have errors, resulting in the change of one or more bits in a
transmitted frame

 Frames
 Data transmitted as one or more contiguous sequences of bits

 The probability that a frame arrives with no bit errors decreases when the probability of a
single bit error increases

 The probability that a frame arrives with no bit errors decreases with increasing frame length
 The longer the frame, the more bits it has and the higher the probability that one of
these is in error
Parity Check
 The simplest error detecting scheme is to
append a parity bit to the end of a block of
data

 If any even number of bits are inverted


due to error, an undetected error occurs
The Internet Checksum
 Error detecting code used in many Internet
standard protocols, including IP, TCP, and
UDP
 Ones-complement operation
 Replace 0 digits with 1 digits and 1 digits with 0
digits
 Ones-complement addition
 The two numbers are treated as unsigned binary
integers and added
 If there is a carry out of the leftmost bit, add 1 to
the sum (end-around carry)
Cyclic Redundancy Check
(CRC)
 One of the most common and powerful error-
detecting codes
 Given a k bit block of bits, the transmitter
generates an (n – k) bit frame check
sequence (FCS) which is exactly divisible by
some predetermined number
 Receiver divides the incoming frame by that
number
 If there is no remainder, assume there is no error
CRC Process
 Modulo 2 arithmetic  Digital logic
 Uses binary addition with no  Dividing circuit consisting of XOR
carries gates and a shift register
 An example is shown on page 194  Shift register is a string of 1-bit
in the textbook storage devices
 Polynomials  Each device has an output line,
 Express all values as polynomials which indicates the value currently
in a dummy variable X, with binary stored, and an input line
coefficients  At discrete time instants, known as
clock times, the value in the
 Coefficients correspond to the bits
storage device is replaced by the
in the binary number
value indicated by its input line
 An example is shown on page 197  The entire register is clocked
in the textbook
simultaneously, causing a 1-bit shift
along the entire register
 An example is referenced on page
199 in the textbook
Forward Error Correction
 Correction of detected errors usually requires data blocks to
be retransmitted
 Not appropriate for wireless applications:
 The bit error rate (BER) on a wireless link can be quite high,
which would result in a large number of retransmissions
 Propagation delay is very long compared to the transmission
time of a single frame
 Need to correct errors on basis of bits received
Block Code Principles
 Hamming distance

d(v1, v2) between two n –bit binary sequences v1 and v2
is the number of bits in which v1 and v2 disagree
 See example on page 203 in the textbook
 Redundancy of the code
 The ratio of redundant bits to data bits (n-k)/k
 Code rate
 The ratio of data bits to total bits k/n
 Is a measure of how much additional bandwidth is
required to carry data at the same data rate as without
the code
 See example on page 205 in the textbook
Summary
 Types of errors
 Internet checksum
 Error detection
 Cyclic redundancy
check
 Parity check  Modulo 2 arithmetic
 Parity bit  Polynomials
 Two-dimensional parity  Digital logic
check
 Forward error
correction
 Block code principles

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