Unit V

Intel 8085 Microprocessor

Architecture
1.Introduction to Microprocessors, Architecture of 8085 and
8086, Pin Configuration and Function; Internal Register &
Flag Register,
Generation of Control Signals Bus Timings: Demultiplexing
of Address /Data Bus;
2. Timing Diagram: Fetch Cycle, Execute Cycle, Instruction
Cycle, Instruction Timings and Operation Status,. Machine
Cycle Concept
3.Instruction types : Data Transfer. Arithmetic and Logical
Operations. Branching Operation:;
4.Addressing Modes of Instructions
Introduction of 8085

Microprocessor is CPU on a Chip.

Introduced in 1976 and is a 8 bit processor.
Intel 8085 is an NMOS microprocessor.
It is a 40 pin IC package fabricated on a single LSI chip.
It uses +5 V for its operation.
Its clock speed is about 3 MHz and clock cycle is 320 ns.
It has 80 basic instructions and 246 opcodes.
Intel has produced large number of peripheral devices for microprocessor based
system.
Figure 1. Intel 8085 40 pin chip
The block diagram shows three important sections

a) Arithmetic and Logic unit

b) Timing and control unit
c) Set of registers

Arithmetic and Logic Unit

• It performs various arithmetic and logical operations which includes:
1.Addition 5.Logical AND
2.Subtraction 6.Logical OR

3.Increment 7.Complement

4.Decrement 8.EX-OR
Timing and Control Unit

•It acts as a brain of the computer system.

•It generate timing, control and status signals which are required for the
operations of processor, memory and I/O devices.
•It controls data flow between processor, memory and peripheral devices.

X1
Timing and Control Unit
X2

Crystal oscillator
 Registers
Registers are used by the microprocessor for temporary storage and
manipulation of data and instructions.
Data remains in the registers till they are sent to the memory or I/O devices.
Intel 8085 has following set of registers
a) Accumulator, i.e. register A
b) General purpose register, i.e. B, C, D, E, H, L
c) Stack Pointer
d) Program Counter
e) Instruction register
f) Temporary register
g) Status Flags (Flag Register)
 Accumulator

•It is an 8 bit register associated with the ALU.

•It holds one of the operands of the arithmetic and logical (AL) operation.
•The other operand is stored in the memory or in the general purpose registers.
•The final result of AL operation is placed in the accumulator.
•These are true for general cases, not for some typical or special cases.
General Purpose registers

•The 8085 microprocessor has six 8-bit GPR, i.e. B, C, D, E, H, L.

•To hold 16 bit data a combination of two 8-bit registers can be
employed.
•The combination of two 8 bit register is known as register pair.
•There are three register pairs, i. e. B-C, D-E, H-L.
•H-L pair is the default memory or data pointer.
 The general purpose registers and accumulator are accessible to
the programmers.
Special purpose registers

a) Program counter –
• It is a 16 bit register which contains or hold the address of
next instruction to be executed.
• It takes care of the program flow or control.
b) Instruction register –
• It is a 8 bit register
• It holds the opcode of the instruction which is being decoded
and executed.
c) Temporary register

• It is a 8 bit register associated with the ALU.

• It holds the data during an arithmetic and logical operation.
• It is used by the microprocessor in some instructions.
• They are not accessible by the users.
• W, Z are 8 bit temporary registers.

d) Stack pointer
• It is a 16 bit register which contains the address of the data
present at top of the stack.
• It points to top of stack.
Stack Pointer(Contd.)

•It is a part of R/W memory.

•Stores the content of accumulator, flags, program counter, GPR
during the execution of the program.
•Stores the content of Program counter when subroutines are used.
•Any portion of the memory can be used as stack.
•It is based on LIFO (last in first out).
 Instruction decoder and Machine cycle Encoder

• After the instruction is fetched in the IR, it is decoded into

this block with the help of Micro program.
• Micro program is a program written by chip designer
(manufacturer) to make the processor understand what a
instruction is or it indicates the type of operation to be
performed (for an instruction).
• Number of Machine cycles are assigned according to the type
of instruction.
• Flag Register
– 8 bit register – shows the status of the microprocessor before/after an
operation
– S (sign flag),
– Z (zero flag),
– AC (auxillary carry flag),
– P (parity flag) &
– CY (carry flag)
D7 D6 D5 D4 D3 D2 D1 D0

S Z X AC X P X CY

– Sign Flag
• Used for indicating the sign of the data in the accumulator
• The sign flag is set if negative (1 – negative)
• The sign flag is reset if positive (0 –positive)
• Zero Flag
– Is set if result obtained after an operation is 0
– Is set following an increment or decrement operation of that register

10110011
+ 01001101

1 00000000
• Carry Flag
– Is set if there is a carry or borrow from arithmetic
operation

1011 0101 1011 0101

+ 0110 1100 - 1100 1100

Carry 1 0010 0001 Borrow 1 1110 1001

• Auxillary Carry Flag
– Is set if there is a carry out of bit 3
• Auxiliary carry – 1; if there is a carry from D3 bit to D4
bit.
0; o/w

• Parity Flag
– Is set if parity is even
– Is cleared if parity is odd

• Parity flag – 1; if the no. of binary “one” is even in A.

0; if the no. of binary “one” is odd in A.
 for
description

Figure 3. Intel 8085 Pin Configuration

Memory and I/O control lines

It is a signal sent by the microprocessor to the memory/input

device to control the read operation. When 0 (goes low selected
memory or input device is read).
= It is a signal sent by the microprocessor to the memory/ output
device to control write operation. When it goes low, Data is
written into selected memory or sent to output device.
Ready = It is a signal sent by the input/output device to the
microprocessor to indicate that the input/output device is ready
to send or receive data.
ALE = It is a address latch enable signal.

ALE=1 All 16 lines are used as address bus

ALE=0 A15-A8 = Address bus

AD7-AD0=Data bus

A8-A15 = These are address bus and are used for the most significant bits of the
memory address or I/O address.
AD0-AD7 = These are time multiplexed address/data bus, i.e.

First clock cycle of machine cycle Least significant bits of memory or

I/O address
Second and Third clock cycle Used for data transfer

=It is a status signal which distinguishes whether the address is for

memory or I/O.
Status lines (S0 and S1) = These are the signals sent by the microprocessor to
distinguish various types of operations.

S1 S0 Operation

0 0 HALT

0 1 WRITE

1 0 READ

1 1 FETCH

CPU and BUS Control lines

HOLD = When another device of the computer system, requires address/data
bus for data transfer, it sends HOLD signal to the microprocessor.
HLDA = It is a HOLD acknowledge signal sent out by the microprocessor after
receiving the HOLD signal.

Memory

Microprocessor
DMA Controller

I/O device

RESET IN = It reset the program counter, interrupt enable, HLDA flip-flops and

instruction register.
RESET OUT = It indicates that the CPU is being reset.
Interrupt
•Interrupt is an internal or external signal which may disturb or alter the sequence
of execution of processor.
•It is a method by which an I/O device informs the processor that it requires
services of the processor.
Interrupt can be classified as:
a. Maskable – Interrupt which can be avoided.
Non-Maskable - Interrupt which cannot be ignored or
avoided.
b. Vectored – Interrupt which has specific address location in the
memory.
Non-vectored – Interrupt which do not have specific address
location in the memory.
Crystal and serial I/O lines

X1 and X2 = These are the terminals connected to external

crystal oscillator which drives an internal
circuitry of the microprocessor.
SID = It is a data line for serial input. The data on this line
is loaded into the 7th bit of the accumulator when RIM
is executed.
SOD = It is a data line for serial output. The 7th bit of the
accumulator is output on SOD line when SIM
instruction is executed.
Utility lines

Vcc = +5 V supply
Vss = ground reference
Clock = It is a output for user, which can be used for other
digital ICs.
 INSTRUCTION & DATA FORMATS
• Each instruction has two parts.
– The first part is the task or operation to be
performed.
• Opcode (Operation code)- It specifies the task to be
performed. “opcode” (operation code).

– The second part is the data to be operated on

• Called the “operand”. It is
i. 8 bit or 16 bit data
ii. 8 bit or 16 bit address
iii. Register
 The 8085 Instructions
classification
– These instructions set can be grouped
into five different groups:

• Data Transfer Operations

• Arithmetic Operations
• Logic Operations
• Branch Operations
• Machine Control Operations
ADDRESSING MODES
•Instruction has opcode and operand. There are different
techniques to specify operand in an instruction. These techniques
are called as addressing modes.
•Intel 8085 has the following addressing modes:
a) Direct addressing mode
b) Register addressing mode
c) Register indirect addressing mode(Indirect addressing mode)
d) Implicit/Implied addressing mode
a) Direct addressing mode
•Address of the operand (data) is given in the instruction itself.
•Example-

LDA 6000H Load the accumulator with the contents of the

memory location 6000H
STA 2400H Store the contents of the accumulator in the
memory location 2400H
IN 02 The data available on the 8 bit address of the
input port is moved to the accumulator
Immediate addressing mode
•In this addressing mode the operand (data) is specified within the instruction itself.
•Example

MVI A,05 Move the data 05 into the accumulator

ADI 06 Add 06 to the content of the accumulator

LXI H, 2500 2500 is 16 bit data and is loaded into H-L pair
b) Register addressing mode
•Operand is one of the GPR or the accumulator.
•Opcode specifies the operation to be performed and address of the registers.
•Operation takes place between registers.
•Example-

MOV A, B Move the content of the register B to register A

ADD B Add the content of the register B to the content of

the register A
c) Register Indirect addressing mode
• Address of the data is present as the content of the another register pair.
•Example

LXI H, 2500H Load H-L pair with 2500 H

MOV A,M Move the content of the memory location whose address is in H-L pair to the
accumulator
HLT Halt
• Indirect Addressing Mode
• Using data in memory directly (without loading
first into a Microprocessor’s register) is called
Indirect Addressing.

• Indirect addressing uses the data in a register pair

as a 16-bit address to identify the memory location
being accessed.
– The HL register pair is always used in conjunction with
the memory register “M”.
– The BC and DE register pairs can be used to load data
into the Accumultor using indirect addressing.
– LXI H, 2050H (address 2050 is kept in H-L)
– MOV A, M (content in 2050 is copied in Accu)
d Implicit/ Implied addressing mode
•In this type of instruction, operand is the content of the accumulator.
•No data, address of data, register are present in the instruction.
•Example

CMA Complement the content of the accumulator

RAL Rotate accumulator left through carry

RAR Rotate accumulator right through carry

RLC Rotate accumulator left

 STACK
•Stack is a set of memory locations in the R/W memory specified by a programmer in a main program.
•These memory locations are used to store the content temporarily during the execution of the program.
•The beginning of the stack is defined using:
LXI SP,……………
•Once the stack location is defined, storing of data bytes begins at the memory address that is one less than
the address in the stack pointer register.
•PUSH instruction is used to store the content of register pair on the stack

16 bit address
 •POP instruction is used to transfer the contents from the stack to respective registers.
•The stack pointer register tracks the storage and retrieval of the information.
•The contents of the program counter can be stored when a subroutine is called.
•Instructions

PUSH Rp Copy the content of the specified register pair on the stack.
Rp can be B, D, H which represents the register pair BC, DE, HL.
PUSH PSW Copy the contents of accumulator and flags on the stack

POP Rp Copy the content of the memory locations of the stack into the specified register pair.

POP PSW Copy the content of memory location into the registers

The stack space grows upward in the numerically decreasing order of memory addresses.
The storage and retrieval of data bytes on the stacks should follow the LIFO sequence.
Information in stack locations is not destroyed until new information is stored in those
locations.
 Timing diagram
It is a graphical representation of necessary steps which are carried out in a machine cycle.
Pictorial representation of execution of an instruction with the help of various control/timing and status
signals.
Based on different sets of operations carried out in 8085 microprocessor, there are different timing diagram:
a. Opcode fetch -4T
b. Memory read-3T
c. Memory write -3T
d. I/O read-3T
e. I/O write -3T
Timing diagram for Opcode Fetch Cycle
Sequence of steps for opcode fetch operation
•First clock cycle (T1)- Microprocessor sends the address of the memory where the opcode is available.
•Second clock cycle (T2) – The control unit sends the control signal to the memory chip to enable the
read operation. The byte is placed from the memory location on the data bus.
•Third clock cycle (T3) – The opcode is placed in the IR.
•Fourth clock cycle (T4)- The opcode is decoded.
Sequence of steps for memory READ operation
• First clock cycle (T1)- Microprocessor sends the address
of the memory where the data is available.
• Second clock cycle (T2) – The control unit sends the
control signal to the memory chip to enable the read
operation. The byte is placed from the memory location
on the data bus.
• Third clock cycle (T3) – The data enters the CPU.
Timing diagram for memory WRITE Operation

In this picture fetch diagram is not shown

Sequence of steps for memory write operation
• First clock cycle (T1)- Microprocessor sends the address
of the memory where the data is to be stored.
• Second clock cycle (T2) – The control unit sends the
control signal to the memory chip to enable the write
operation.
• Third clock cycle (T3) – The byte is placed from the
microprocessor through the data bus and stored in
memory.
This is a 2 byte instruction so it requires 2 machine cycles to fetch the instruction
I Op code fetch and
2 Memory read
1 OPCODE fetch

The program counter places the address on the higher order and the lower order
address bus The op code at this memory location is read into the microprocessor
The PC is then incremented by 1 to point to the next byte This machine cycles
requires 4 T states
The program counter places the address on the higher order and the lower order
address bus
The op code at this memory location is read into the microprocessor
2 Memory Read
The data is read from the addressed memory location into the specific register
The PC is again incremented by one to point to next instruction after MVI
 Microprocessor Communication and Bus timings

•A program constitutes a set of Instructions. The processor fetches one instruction from
the memory at a time and executes it.
•The necessary steps that a processor carries out to fetch an instruction and data from
memory and I/O devices, constitutes an instruction cycle.

Fetch cycle Processor fetches opcode from memory

Execute cycle Processor gets data from memory or I/O devices and
perform specific operation

Instruction cycle Fetch cycle+ Execution cycle

Fetch operation

The microprocessor places the 16 bit memory address from the program
counter to the memory address register (MAR). The contents of MAR is
transferred to the memory through the address bus.
The control unit sends the control signal , to the memory.
The opcode from the memory location is placed on data bus.
The opcode first come in the memory data register (MDR) and from there it
goes to Instruction register.
The instruction is decoded in the instruction decoder.
Execute Operation

After the instruction is being decoded, execution begins.

If the operand is in the GPR (one byte instruction), then execution is
immediately performed and the time taken is one clock cycle.
If the instruction contains data or memory address (two or three byte
instruction).
Processor performs read operation and gets data from the memory.
In some instruction write operation is performed.
Execution cycle contains one or more read cycles.
 Instruction cycle

Fetch cycle Execute cycle

Clock

Instruction cycle showing FC, EC, IC

a. Instruction cycle – Time required to complete the execution of

an instruction.
b. Machine cycle – Time required to complete one operation of
either accessing memory, I/O device.
Example- Fetch, Read, Write.
c. T-state- One sub division of the operation performed
in one clock cycle. T-state and clock period are often
used synonymously.
Generating Control Signals

There are different control signals which are required for the
operation of microprocessor.

The , , are different control signals.

These signals are combined to generate four different

signals, i.e.
8085 Control Signals

Operation Control
Signals
0 0 1 Fetch
0 0 1 M/M Read
0 1 0 M/M
Write
1 0 1 I/O Read
1 1 0 I/O Write
 Microprocessor Communication and Bus timings

•A program constitutes a set of Instructions. The processor fetches one instruction from
the memory at a time and executes it.
•The necessary steps that a processor carries out to fetch an instruction and data from
memory and I/O devices, constitutes an instruction cycle.

Fetch cycle Processor fetches opcode from memory

Execute cycle Processor gets data from memory or I/O devices and
perform specific operation

Instruction cycle Fetch cycle+ Execution cycle