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Chapter 2: Introduction To Assembly Programming: The Intel 8086 ISA

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0% found this document useful (0 votes)
12 views16 pages

Chapter 2: Introduction To Assembly Programming: The Intel 8086 ISA

Uploaded by

jo718695
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 16

Chapter 2 : Introduction to Assembly

Programming The Intel 8086 ISA


Instruction Set Architecture
Next ...
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

2
Shift instructions

• There are logical shifts (unsigned operations) and


• Arithmetic shifts (signed operations)

3
Logical Shift instructions (1)
SHL ; Shift Left instruction
 SHL R,imm 0
 SHL addr,imm CF
 SHL R,CL
 SHL addr,CL
 second operand can be
 a constant Cste (immediate) or
 the CL register:
Example:
mov al,00000001b ;al = 1
shl al,1 ;al=00000010b = 2 carry = 0
shl al,1 ;al=00000100b = 4 carry = 0
shl al,1 ;al=00001000b = 8 carry = 0
The last bit shifted out from the left becomes the Carry Flag
Shifting left 1 bit multiplies a number by 2
 Shifting left n bits multiplies the operand by 2n (fast multiplication)

 Example : 5 * 4 = 5 * 22 = 20
MOV DL,5 ; DL = 00000101b 4
Logical Shift instructions(3)
SHR ; Shift Right instruction
 SHR R,imm
 SHR R,cl 0
CF

Example:
mov al,00000100b ;al =00000100b = 4
shr al,1 ;al=00000010b = 2 carry = 0
shr al,1 ;al=00000001b = 1 carry = 0
shr al,1 ;al=00000000b = 0 carry = 1
 Performs a logical right shift on the destination operand
 The last bit shifted out from the right becomes the Carry Flag
 Shifting right n bits divides the operand by 2n (fast division)

 Example : (80 / 8) = (80 / 23 )= 10


MOV DL, 80 ; DL = 01010000b = 80
SHR DL, 1 ; DL = 00101000b = 40, CF = 0
SHR DL, 2 ; DL = 00001010b = 10, CF = 0
5
6
Arithmetic Shift instructions
SAL : Shift Arithmetic Left is identical to SHL

SAR ; Shift Arithmetic Right


 Performs a right arithmetic shift on the destination operand
 Fills the newly created bit position with a copy of the sign bit
 SAR preserves the number's sign
CF

 Example
MOV DL,-80 ; DL = 10110000b
SAR DL,1 ; DL = 11011000b = -40, CF = 0
SAR DL,2 ; DL = 11110110b = -10, CF = 0

7
8
Rotation instructions
ROL ; Rotate Left instruction
 Rotates each bit to the left, according to the count operand
 Highest bit is copied into the Carry Flag and into the Lowest Bit
 No bits are lost
 Example CF

MOV AL,11110000b
ROL AL,1 ; AL = 11100001b , CF = 1
MOV DL,3Fh ; DL = 00111111b
ROL DL,4 ; DL = 11110011b = F3h , CF = 1

ROR ; Rotate Right instruction


 Rotates each bit to the right, according to the count operand
 Lowest bit is copied into the Carry flag and into the highest bit
 No bits are lost
 Example CF

MOV AL,11110000b
ROR AL, 1 ; AL = 01111000b, CF = 0
MOV DL, 3Fh ; DL = 00111111b
ROR DL, 4 ; DL = F3h, CF = 1 9
Next ...
 Types of instructions
 Arithmetic instructions
 Shift and Rotation instructions
 Boolean Instructions
 Branching Instructions
 Unconditional Jump Instructions
 Conditional Jump Instructions
 Translating Conditional Structures

10
Boolean Instructions (1)
AND destination, source ; Bitwise AND between each pair of matching bits
Following operand combinations are allowed
AND R, R  We use the following abbreviations:
AND R, Adr INST: Instruction, Off: Offset address
R: any Register, Cste: given (Constant)
AND R, Cste SR: Segment Register disp: Displacement (Constant)
AND Adr, R OR: Offset Register Op: Operand
Adr: Address SO: Source Operand
AND Adr, Cste [Adr]: Memory content DO: Destination Operand
Operands can be 8 or 16 bits and they must be of the same size AND
AND instruction is often used to clear selected bits

00111011
AND 00001111
cleared 00001011 unchanged

 Forcing a bit at 0 without changing the other bits

11
Boolean Instructions (2)
OR destination, source ; Bitwise OR between each pair of matching bits
Following operand combinations are allowed
OR R, R
OR R, Adr OR
OR R, Cste
OR Adr, R
OR Adr, Cste
Operands can be 8 or 16 bits and they must be of the same size
OR instruction is often used to set selected bits
00111011
OR 11110000
set 11111011 unchanged

 Forcing a bit at 1 without changing the other bits

12
Boolean Instructions (4)
XOR destination, source ; Bitwise XOR between each pair of matching bits
Following operand combinations are allowed
XOR R, R
XOR R, Adr
XOR R, Cste XOR
XOR Cste, R
XOR Cste, Cste
Operands can be 8 or 16 bits and they must be of the same size
XOR instruction is often used to invert selected bits

00111011
XOR 11110000
inverted 11001011 unchanged

 Inversing a bit without changing the other bits

13
Boolean Instructions (5)
NOT destination ; Inverts all the bits in a destination operand
 Result is called the 1's complement NOT 00111011

 Destination can be a register or memory 11000100 inverted

NOT R
NOT Adr

 None of the Flags is affected by the NOT instruction

14
Converting Characters to Uppercase
 Converting Characters to Uppercase

87654321
--------------------------
'a‘ = 0 1 1 0 0 0 0 1
'A‘ = 0 1 0 0 0 0 0 1

'b' = 0 1 1 0 0 0 1 0
'B' = 0 1 0 0 0 0 1 0

'c' = 0 1 1 0 0 0 1 1
'C' = 0 1 0 0 0 0 1 1

15
Converting Characters to Lowercase
 Converting Characters to Lowercase

87654321
--------------------------
'A‘ = 0 1 0 0 0 0 0 1
'a‘ = 0 1 1 0 0 0 0 1

'B' = 0 1 0 0 0 0 1 0
'b' = 0 1 1 0 0 0 1 0

'C' = 0 1 0 0 0 0 1 1
'c' = 0 1 1 0 0 0 1 1

16

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