CH #02-Instruction set and programing

Addressing modes:
The retrieving method of operand is called addressing mode.

• Register addressing mode: In this mode the data required to complete the
operation is taken from the general purpose registers. Instruction of this mode
are always single byte they are executed very quickly by microprocessor.
Eg.
• ADD B
• SUB C
• ANA D
• ORA E
• XRA L
• MOV A,B
• Register indirect addressing mode:
In this mode data required to complete the operation is taken from memory
location. Address of memory location is present in register pair. In most of the
instruction H-L register pair is use to hold the address of memory. Very few
instruction uses B-c and D-E register pair to hold address of memory.
Eg.
• ADD M LDAX B
• SUB M STAX B
• ANA M
• ORA M
• XRA M
• MOV A,M
• Immediate addressing mode: Instruction of this mode is always two byte or three byte.
Second and third byte of instruction contains data which is required to compete the
operation.
Eg.
• ADI 95H LXI H,2001
• SUI 45H
• ANI FFH
• ORI 00H
• XRI 20H
• MVI A,90H
• Direct addressing mode: Normally these are two byte or three byte instruction. Second
and third byte of instruction contains address of memory location/port. These instruction
require more execution time.
Eg
• LDA 1250 H
• STA 5000 H
• Implied addressing mode : These are always single byte instruction. They
contains only mnemonics. They are executed very quickly by microprocessor.
Eg.
• STC
• CMC
• CMA
 Instruction set
Depending on operation performed by microprocessor the instruction are
classified in five groups.
1. Data transfer group
2. Arithmetic group
3. Logical group
4. Branch group
5. Stack and i/o control group.

1. Data transfer group: Instruction of this group are use to transfer data from
register to register , register to memory and memory to register. Memory to
memory data transfer operation is not permitted. since only data transfer
operation takes place no flags are affected.
1. MOV r1 , r2:
Operation: r1  r2
AM : Register addressing mode
Size =1 Byte
After execution of this instruction content of register r2 is moved to register r1. No flags are
affected.
Eg:
MOV A,B
MOV B,D
MOV H,L……..etc

2. MOV r,M
Operation: r  M
Size =1 Byte
AM :Register indirect addressing mode
After execution of this instruction content of memory location pointed by HL is moved to specified
register. No flags are affected.
Eg :
MOV A,M
MOV B,M
MOV D,M……. Etc

3.MOV M,r
Operation: M  r
AM : Register indirect addressing mode
Size =1 Byte
After execution of this instruction content of specified register is moved to memory
location pointed by HL. No flags are affected.
Eg.
Mov M,A
MOV M,B……..etc
4. MVI r , data
Operation: r  data
AM : Immediate addressing mode
Size =2 Byte
It is two byte instruction, second byte of instruction contains data that data is moved to specified register . no
flags are affected.
Eg.
MVI A , 25 H
MVI B , 60 H….etc

5. MVI M,data
Operation: M  data
AM : Immediate addressing mode.
Size =2 Byte
It is two byte instruction, second byte of instruction contains data that data is moved to memory location pointed
by HL . No flags are affected.
Eg.
MVI M , 25 H
MVI M , FF H
6. LXI rp , data 16( load register pair with immediate data)
Operation: rp  16 bit data
AM : Immediate addressing mode.
Size =3 Byte
Eg.
LXI H,1100
LXI B,5000
LXI D, 9000
LXI sp, FFFF
It is three byte instruction second and third byte of instruction contains data. 2nd
byte of instruction is moved to lower order register and 3rd byte of instruction is
moved to higher order register.no flags are affected
7. LDA addr (load accumulator direct)
Operation: A  [addr]
AM : Direct addressing mode
Size =3 Byte
It is three byte instruction 2nd and 3rd byte of instruction contains address of
memory location, data present in that memory location is loaded in to
accumulator. No flags are affected.
Eg.
LDA 1200 H
LDA 5000 H
8. STA addr (store accumulator direct)
Operation: A  [addr]
AM : Direct addressing mode
Size =3 Byte
 It is three byte instruction 2nd and 3rd byte of instruction contains address of memory
location, data present in accumulator is stored in that memory location. No flags are
affected.
Eg :
STA 1200 H
STA 5000 H

9. LHLD addr (load H & L direct)

AM : Direct addressing mode
Size =3 Byte
It is 3 byte instruction 2nd and 3rd byte of instruction contains address of memory location.
Data present in that memory location is loaded into register L, data present in next
consecutive memory location is loaded in to register H. no flags are affected.
Eg :
LHLD 2050H
LHLD 1200H
10. SHLD addr (store H & L direct)
AM : Direct addressing mode
Size =3 Byte
It is 3 byte instruction 2nd and 3rd byte of instruction contains address of memory location. Content of
register L is stored in to that memory location ,and content of register H is stored in next
consecutive memory location. no flags are affected.
Eg :
SHLD 2050 H
SHLD 1200 H
11 . LDAX rp (load accumulator indirect)
AM : Register indirect addressing mode
Size =1 Byte
After execution of this instruction content of memory location pointed by B-C or D-E is loaded in to
accumulator . No flags are affected.
Eg.
LDAX B
LDAX D
12. STAX rp (store accumulator indirect)
AM : Register indirect addressing mode
Size =1 Byte
After execution of this instruction content of accumulator is stored in memory location pointed by B-C or
D-E . No flags are affected.
Eg.
STAX B
STAX D

13. XCHG (exchange H&L with D&E)

AM : Register addressing mode
Size =1 Byte
Operation:
HD
L E
After execution of this instruction content of register H is exchange with content of register D and content
of register L is exchanged with content of register E. no flags are affected.
Eg : XCHG
2 . Arithmetic group:

1. ADD r
AM : Register addressing mode
Operation : A=A+r
Size =1 Byte
After execution of this instruction content of specified register is added with
content of accumulator and result is stored in accumulator. All flags are affected
Eg.
ADD B
ADD C
ADD L

2. ADD M
AM : Register indirect addressing mode
Operation : A=A+M
Size =1 Byte
After execution of this instruction content of memory location pointed by HL is
added with content of accumulator and result is stored in accumulator. All flags are
affected.
Eg.
ADD M
3. ADI data
AM : Immediate addressing mode
Operation : A=A+data
Size =2 Byte
Eg.
ADI 25 H
ADI 45 H
It is two byte instruction 2nd byte of instruction contains data that data is added with
content of accumulator and result is stored in accumulator. All flags are affected.
4. SUB r
Operation : A = A - r
AM : Register addressing mode
Size =1 Byte
After execution of this instruction content of specified register is subtracted from content of
accumulator and result is stored in accumulator. All flags are affected.
Eg.
SUB B
SUB C
SUB L

5. SUB M
Operation : A = A - M
AM : Register indirect addressing mode
Size =1 Byte
After execution of this instruction content of memory location pointed by HLis subtracted from
content of accumulator and result is stored in accumulator. All flags are affected.
Eg : SUB M
. SUI data
Operation : A = A – data
AM : Immediate addressing mode
Size =2 Byte
It is two byte instruction second byte of instruction contains data that data is
subtracted from content of accumulator and result is stored in accumulator. All
flags are affected.
Eg.
SUI 25
SUI 35
SUI 10
6. ADC r
AM : Register addressing mode
Operation : A=A+r+CY
Size =1 Byte
After execution of this instruction content of specified register and content of carry flag are
added with content of accumulator and result is stored in accumulator. All flags are affected
Eg.
ADC B
ADC C
ADC L

7. ADC M
AM : Register indirect addressing mode
Operation : A=A+M+Cy
Size =1 Byte
After execution of this instruction content of memory location pointed by HL and
content of carry flag are added with content of accumulator and result is stored in
accumulator. All flags are affected.
Eg.
ADC M
8. ACI data
AM : Immediate addressing mode
Operation : A=A+data+CY
Size =2 Byte
Eg.
ACI 25 H
ACI 45 H
It is two byte instruction 2nd byte of instruction contains data that data and content of
carry flag are added with content of accumulator and result is stored in accumulator.
All flags are affected.
9. SBB r
AM : Register addressing mode
Operation : A=A-r-CY
Size =1 Byte
After execution of this instruction content of specified register and content of carry flag are
subtracted from content of accumulator and result is stored in accumulator. All flags are
affected
Eg.
SBB B
SBB C
SBB L

10. SBB M
AM : Register indirect addressing mode
Operation : A=A-M-Cy
Size =1 Byte
After execution of this instruction content of memory location pointed by HL and
content of carry flag are subtracted from content of accumulator and result is stored
in accumulator. All flags are affected.
Eg.
SBB M
11. SBI data
AM : Immediate addressing mode
Operation : A=A-data-CY
Size =2 Byte
Eg.
SBI 25 H
SBI 45 H
It is two byte instruction 2nd byte of instruction contains data that data and content of
carry flag are Subtracted from content of accumulator and result is stored in
accumulator. All flags are affected.