Introduction to the

Microprocessor
 Assembly Language Programming and Organization of the IBM PC
by Ytha Yu, Charles Marut
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 Programming Language
A computer program is a collection of instructions that
performs a specific task when executed by a
computer.
A programming language is a formal constructed language
designed to communicate instructions to a machine,
particularly a computer.
Simply, writing a program is called programming and the
language used are called programming language.

Language

Low level High level

language language

Machine Assembly
language language
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Low-level language
a medium of communication that is machine dependent or
specific to a given computer.
Machine & Assembly languages of a computer considered
low-level languages.
Program does not transferable.
High level language
a medium of communication is machine independent.
that
programs written in English like word.
executed on a machine using a
translator.
e.g. BASIC, PASCAL, C,C+, FORTRAN
easy to learn 5
Machine language
a type of MP programming language that uses
binary or hexadecimal numbers.
It was constructed of ones and zeros using binary
codes.
e.g. 0000 0010 1100 1010
All programs are converted machine language
into before they can be
executed.
Assembly language operation code to represent the
Uses symbolic
machine operation code.
Specific to a given computer.
removes the complexity of machine
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language.
Assembler
A computer program that translates assembly language
program from mnemonics to binary machine code.
Compiler
A program that translates English like words of a high
level language into machine language.
Reads a given program (source code) in its entirely,
translates program Into machine language(object
code).
Interpreter
A program that translates English like statements of a
high level language into machine language.
translates one statement at a time from source code to
an object code.
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 Source Object
Compiler
Code Code

High level language Interpreter Machine language

Source code
a program written either in mnemonics of an
assembly language or in English-like statements of
high level language.

Object code
the binary (M/C) code into which a source program is
translated by a compiler, assembler or interpreter.

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Firmware
permanentl stored, unalterable program instructions
y
contained in ROM section of computer memory.
Hardware
the physical electronic circuit & electromechanical
devices that makes up computer system.
Software
Group of instructions or Program In a computer.

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 The Microprocessor

Microprocessor, the heart of the microprocessor-based

computer system is an IC.
Microprocessor is the controlling element in a computer
system.
It controls memory and I/O devices through buses and
transfer instructions and data between microprocessor
and memory or I/O device.

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11
 Evolution of the Microprocessor
1st Microprocessor
1971, INTEL corp., 4004
4-bit microprocessor
4-bit memory, contain only 45 instructions
Fabricated with P-channel MOSFET
Execute instructions at the slow rate of 50 KIPs (Kilo-
instructions per second)
2nd Microprocessor
Later in 1971, INTEL corp., 8008
8-bit microprocessor
16kB memory, contain only 48 instructions,
Execution time 20 micro-seconds
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3rd Microprocessor (1st modern microprocessor)
1973, INTEL 8080
8-bit microprocessor
64kB memory
TTL technology
Execution time 2 micro-seconds
The 8085 Microprocessor
1977, Intel 8085
8-bit microprocessor (Data bus 8 bits, address bus 8 bits)
64kB memory
Execution time 1.3 micro-seconds
Advantage: 1. internal clock generator
2. Internal system controller
3. Higher clock frequency (3MHz)
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The 8086 Microprocessor
1978, Intel 8086
16-bit microprocessor (Data bus 16 bits, address bus 20 bits)
1MB memory
Execution time 400 nano-seconds
Clock frequency 5MHz
Cache or queue memory 6 byte
The 8088 Microprocessor
1979, Intel 8088
Same as 8086 but speedy than 8086

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The 80286 Microprocessor
1983, INTEL 80286
16-bit microprocessor
16MB memory
Execution time 250 nano-seconds
Clock frequency 8MHz
The 80386 Microprocessor (1st practical 32-bit MP)
1986, Intel 80386
32-bit microprocessor (Data bus 32 bits, address bus 32
bits)
4GB memory
Cache or queue memory 8kB
Have few modified version (80386SX, 80386SL/
80386SLC,
80386EX 15
The 80486 Microprocessor
1989, INTEL 80486
Same as 80386
Execution time 25 nano-seconds
Clock frequency 50MHz

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The Intel Pentium Microprocessor
1993
64-bit microprocessor
4GB memory
Cache or queue memory 16kB
Pentium contained 8KB instruction cache & 8KB data cache
Execute instructions at the rate of 110 MIPs
two version of Pentium operated with a clocking
frequency of 60MHz & 66MHz
Double-clock Pentium, operating at 120MHz & 133MHz also
available

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The Future of the Microprocessors
No one can really make accurate Predictions.
Beginning in late 2002, 64 bits in width, 128 bit data bus,
code name Merced, joint venture called EPIC(Explicitly
Parallel
Instruction Computing) of Intel & Hewlett-Packard.

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 Main tasks of Microprocessor
The microprocessor performs three main tasks for the
computer system:
1. Data transfer between and memory or
microprocessor
2. I/O devices.
3. Simple arithmetic and logic operations.
Program flow via simple decisions.
The power of the microprocessor is in its capability to
execute billions of millions of instructions per second
from a program or software (group of instructions)
stored in memory.

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 Buses
A group of lines used to transfer bits between
microprocessor and other components (microprocessor,
RAM, ROM, I/O) of computer is called bus.

There are 3 types of buses-

1. Data bus (Bi-directional)
transfers information between microprocessor and its
memory and I/O address space.
2. Address bus (Unidirectional)
requests a memory location the memory or I/O
from
3. location from I/O devices.
Control buslines
contains (Unidirectional)
that select memory or I/O and cause them
to perform a read or write operation.
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MRDC Memory read control MWTC Memory write control
IORC I/O read control IOWC I/O write control
* Write- MP will write
Read- MP will read
IOWC=0, MP is writing data from the data bus to an I/O
device whose address appears on the address bus.
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 Cache Memory
An ultra-high speed, directly accessible, relatively small
semiconductor memory block used to store
data/instructions that computer may need in the immediate
future.
Increases system bandwidth by reducing no. of external
memory fetches required by the processor i.e. speed up
the operation.

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 Microcontroller
A device/microcomputer that includes microprocessor,
memory, several signal lines on a single chip fabricated
using VLSI technology. A single chip microcomputer is called
a microcontroller.
The microcontroller on single chip, which typically includes a
microprocessor, 64 byte RAM, 1-2 kilo byte ROM and
several signal lines to connect I/O devices.
Microcontroller are used for such as controlling appliances,
traffic lights etc.

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 some Important Terms
Bit (b) - a binary digit, 0 or 1.
Byte (B) - a group of 08 bits. (1 byte = 8
bits)
Instruction - a command in binary, recognized & executed
by the computer.

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The Microprocessor
& its architecture

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 8, 16, 32 & 64-bit MP

8, 16, 32 and now 64 define the bitness of a MP. For a

simple answer we can say that it relates to the maximum
memory a processor register can address. A bit CPU
can handle 2^x bytes of memory.
Each MP recognizes & processes a group of bits called
word & MP classified according to their word length.
For example: A processor with an 8-bits is known as 8-bit
MP. Intel 8080, 8085, etc. are 8-bit MP.
Similarly, a processor with an 16-bits is known as 16-bit MP.
The 8086 is 1st 16-bit MP.
8086 registers are 16-bit in size. why it is called
16-bit MP.

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 Register
A register is one of a small set of data holding places that
are part of a computer processor.
Registers are two types:
1. General-purpose or multipurpose Registers
these registers hold various data sizes and used for
almost any purpose
2. Special purpose Registers
used in special purposes

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General-purpose or multipurpose Registers
Bit position 15 8 7 0

AX AH AL Accumulator
BX BH BL Base index
CX CH CL Count
DX DH DL Data
BP Base pointer
SI Source index
DI Destination
index
The MP has 07 general purpose registers.
Each registers are 16-bit in size, while some registers can be
divided into two 8-bit register.
The acceptable 8-bit register pairs are AH-AL, BH-BL, CH-CL, DH-
DL. These pairs forms AX, BX, CX, DX registers respectively.
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 General-
1. AX register
Called 16-bit accumulator while AH/AL is 8-bit accumulator
Used for instructions such as Multiplication & division
2. BX register
16-bit Base index register while BH/BL is 8-
bits
3. CX sometimes holds offset address
register
16-bit
Holds Count register
the count forwhile CH/CL
various is 8-bits such as SHIFT,
instructions
ROTATE, LOOP, etc
4. DX register
16-bit Data register while DH/DL is 8-bits
Holds a part of the result from multiplication part of the
or dividend before a division.
Need for I/O devices 29
 General-
5. BP register
16-bit Base Pointer register
Points to a memory location
6. SI register
16-bit Source Index register
Addresses source string for the string instructions
data
7. DI register
16-bit Destination Index register
Addresses string destination data for the string instructions

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 Special-purpose Registers
Special-purpose registers include IP, SP,
FLAGS
1. IP register
Called 16-bit Instruction Pointer.
The Instruction pointer, which points to the next in a
instruction
program, is used by the microprocessor to find the next
sequential instruction in a program located the code
within
segment.
2.
SP register called the
16-bit Stack Pointer, addresses an area of
memory stack.
The stack memory stores data through this pointer.
3.
FLAGS register
A flag resister (F or FL) is a 16-bit registers which
indicates
some condition produced by the execution of an instruction
and controls certain operation of the MP.
 Special-
FLAGS register
Flag resister contains 09 active flags. Among them 06
are
status flags (indicate some condition produced by an
instruction) and 03 are control flags (control certain operation of
processor).
The flags are -
Carry (C)
Parity (P)
Auxiliary carry (A)
Zero (Z)
Sign (S)
Trap (T)
Interrupt (I)
Direction (D)
Overflow (O) 32
Special-

Undefined/unused
flags

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Special-
1) C (Carry) Flag
It holds the carry after addition or the borrow after
subtraction.

FFH 111 111

FFH 1 1
111 111
FEH
1 1
1 1110
Carry 1111
here, C=1
If No C=0
carry,

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Special-
2) P (Parity) Flag
Parity is the count of ones in
register.
expressed as even or odd.
Logic
if a0 number
for odd contains
parity; logic 1 forbits, it has even parity
no one
even parity.

FFH 111 111

1 1
FFH
111 111
FEH 1 1
1 1110
so 1111
Odd parity i.eP=0
If even carry,
P=1 35
Special-
3) A (Auxiliary carry) Flag
The auxiliary carry holds the carry (half-carry) after
addition or the borrow after subtraction between bits
position 3 and 4.
s
4th position 3rd position

FFH 1111 111

FFH 111 1
1 111
FEH 1
1
1111 1110 rd

and 4th positions bits. so

otherwise, A=0 A=1
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Special-
4) Z (Zero) Flag
The zero flag shows whether the of an arithmetic
result or logical operation is zero or not.
If result is zero, Z=1. otherwise Z=0.

FFH 111
111
1 1
FFH
111
111
FEH 1 1
1 result
here, 1110
is zero. So Z=0
not1111

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Special-
5) S (Sign) Flag
The sign flag holds the arithmetic sign after an arithmetic
or
a logical operation.
If S =1 the sign bit is set and the result is negative (-
If ve).
S = 0, the sign bit is not set the result is positive
and sign bit is the leftmost
Usually (+ve).
bit.
6) T (Trap/Trace) Flag
It enables trapping through an on-chip debugging
(checking error) facility.
T =1, Debugging enable
T = 0, Debugging disable

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Special-
7) I (Interrupt) Flag
The interrupt flag controls the operations of the INTR
(Interrupt request) input pin.
If I =1, the INTR pin is
enabled;
if I =0, the INTR pin is
disabled.
8) D (Direction) Flag
The D flag selects either the increment or mode
decrement for DI and/or SI registers during string
instructions.
If D=1 the registers are automatically
decremented;
if D=0 the registers are automatically incremented. STD
Decrement mode indicates Set direction and write
with with
(set direction) instruction.
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Increment mode indicates Clear direction and
Special-
9) O (Overflow) Flag
An overflow indicates that the result has exceeded the
capacity of the
machine. occurs when signed numbers are added or
Overflow
subtracted.
Mainly occurs during operation.
multiplication
If O=1, No
if O=0, Overflow occurs;
overflow.

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 Segment Registers
Segment Registers are additional registers, generate
memory
addresses when combined with other registers in the
microprocessor
In a. word, segment registers are section of
memory.
CS CODE Segment
DS DATA Segment
ES EXTRA Segment
SS STACK Segment

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1) Code segment (CS)
The code segment is a section of memory that holds
the
code (programs and procedures) used by the
microprocessor.
The code segment (CS) register defines the starting
address of the section of memory holding
code.
The code segment size is limited to max
2) Data64KB.
segment (DS)
The data segment contains most data used by a program.
The data segment (DS) register defines the starting
address
of the section of memory holding data.
The data
Data aresegment sizeinis the
accessed limited to max
data 64KB.by an offset
segment
address or the contents of other registers that hold the
offset address.
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3) Extra segment (ES)
ES is an additional data segment used by some of the
string instructions to hold destination data.
The extra segment (ES) register defines the starting
address of the section of memory used as extra segment.
Can be used as an extra/additional segment for code or
data.
Max size of the segment is limited to 64KB.
4)
Stack segment (SS)
The stack segment defines the area of memory used for
the stack.
The stack segment (SS) register defines the starting
address of the section of memory used as stack.
The stack entry point is determined by the stack segment
and stack pointer registers.
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 Real Mode Memory Addressing
Real mode operation allows MP to address only the
first
1MB of memory space even if it is the Pentium 4 or
Core2 microprocessor.
The first 1M byte of memory is called the real memory,
conventional memory, or DOS memory system.

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Segment and Offset address

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Combination of a segment address and an offset
address access a memory
location.
The segment address located within one of the
segment registers, defines the beginning address
of
any
The 64K-byte
offset memory segment.
is also held in a register and
address selects
any location
offset within
address is the 64Ksometimes
also byte memory segment.
referred to An
as
displacement or logical address.
A memory location pointed by a segment of
addressand offset address of 2000H is written as
1000H
1000:2000.
What is the actual/physical memory location for
1000:2000?
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 Calculation of physical address segment :
from offset
pair 1000:2000
1. Append 0H to the right of
segment value 10000
2. Add offset value with the
appended segment value 2000
3. The result is the physical
address for the given : 12000
segment
offset pair
Physical address = Segment add. * 10 + Offset
If Physical address is 22004H, what will be the Segment and Offset add.?

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Default Segment and Offset Registers
8086 has a set of rules that apply to segments whenever
memory is addressed. These rules define the segment and
offset register combination

Segment Offset Combination Purpose

Code / Instruction
CS IP CS:IP
address

DS BX,SI,DI DS:BX/SI Data address

String destination
ES DI ES:DI
address

SS SP or BP SS:SP Stack address

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49
50
 8086 Internal Architecture
8086 MP is internally divided into separate
functional units:
two
1. Bus Interface Unit (BIU)
2. Execution Unit (EU)

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Bus Interface Unit (BIU) Functions:
To fetch instruction from memory or I/O devices
To generate physical address
Supply information to EU
Execution Unit (EU) Functions:

Decode the instructions that are fetched by the

BIU.
Execute the instructions.
Perform arithmetic and logic operations.

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53
Instruction Queue:
To increase the execution speed, BIU fetches as
many as six instruction bytes ahead to time from
memory.
All six bytes are then held in first in first out 6 byte
register called instruction queue.
Then all bytes have to be given to EU one by one.
This pre fetching operation of BIU may be in
parallel with execution operation of EU, which
improves the speed execution of the instruction.
Fetching the next instruction while the current
instruction executes is called pipelining.

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