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Full consolidation of "phase locking" and "PWM locking" waveform generators #8011

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Stopping of the same pin always wins over starting.
  • Loading branch information
dok-net committed Dec 23, 2022
commit f17ba7fb39ce364c400bca0d4e6f62eac99cf8a3
11 changes: 5 additions & 6 deletions cores/esp8266/core_esp8266_waveform_phase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ constexpr int32_t DELTAIRQCCYS = ISCPUFREQ160MHZ ?
enum class WaveformMode : uint8_t {INFINITE = 0, EXPIRES = 1, UPDATEEXPIRY = 2, INIT = 3};

// Waveform generator can create tones, PWM, and servos
typedef struct {
struct Waveform {
uint32_t nextPeriodCcy; // ESP clock cycle when a period begins. If WaveformMode::INIT, temporarily holds positive phase offset ccy count
uint32_t endDutyCcy; // ESP clock cycle when going from duty to off
int32_t dutyCcys; // Set next off cycle at low->high to maintain phase
Expand All @@ -88,7 +88,7 @@ typedef struct {
WaveformMode mode;
int8_t alignPhase; // < 0 no phase alignment, otherwise starts waveform in relative phase offset to given pin
bool autoPwm; // perform PWM duty to idle cycle ratio correction under high load at the expense of precise timings
} Waveform;
};

namespace {

Expand Down Expand Up @@ -116,7 +116,6 @@ static IRAM_ATTR void timer1Interrupt();
// Non-speed critical bits
#pragma GCC optimize ("Os")

static void initTimer() __attribute__((noinline));
static void initTimer() {
timer1_disable();
ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL);
Expand All @@ -126,7 +125,7 @@ static void initTimer() {
timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste
}

static void IRAM_ATTR deinitTimer() {
static IRAM_ATTR void deinitTimer() {
ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL);
timer1_disable();
timer1_isr_init();
Expand Down Expand Up @@ -195,7 +194,7 @@ int startWaveformClockCycles_weak(uint8_t pin, uint32_t highCcys, uint32_t lowCc
if (!waveform.timer1Running) {
initTimer();
}
// The ISR pulls updates on next PWM interval
// The ISR pulls updates on the next waveform interval
}
else {
wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI
Expand Down Expand Up @@ -265,7 +264,7 @@ static IRAM_ATTR void timer1Interrupt() {
const bool isCPU2X = CPU2X & 1;
if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) {
// Handle enable/disable requests from main app.
waveform.enabled = (waveform.enabled & ~waveform.toDisableBits) | waveform.toSetBits; // Set the requested waveforms on/off
waveform.enabled = (waveform.enabled | waveform.toSetBits) & ~waveform.toDisableBits; // Set the requested waveforms on/off
// Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t)
waveform.toDisableBits = 0;
}
Expand Down
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