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Merged
merged 4 commits into from
Apr 11, 2021
Merged

Update STM32G0xx svd files #514

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8c034ea
update G0 svd files from STM32CubeIDE
tachiniererin Mar 14, 2021
9ed15ec
G0 DMA IFCR flag bits were fixed in the svd
tachiniererin Mar 14, 2021
183fde3
Add very basic definitions for the new G0 parts
tachiniererin Mar 14, 2021
3d14959
G0Bx and G0Cx have two DMA controllers
tachiniererin Mar 15, 2021
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935 changes: 935 additions & 0 deletions devices/common_patches/g0_add_dma1_7ch.yaml
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678 changes: 678 additions & 0 deletions devices/common_patches/g0_add_dma2_5ch.yaml
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104 changes: 52 additions & 52 deletions devices/common_patches/g0_dma_7ch.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -23,167 +23,167 @@ DMA:
CTCIF1:
name: CTCIF1
description: Clear channel 1 transfer complete flag
CHTIF2:
CHTIF1:
name: CHTIF1
description: Clear channel 1 half transfer flag
CTEIF3:
CTEIF1:
name: CTEIF1
description: Clear channel 1 transfer error flag
CGIF4:
CGIF2:
name: CGIF2
description: Clear channel 2 global interrupt flag
CTCIF5:
CTCIF2:
name: CTCIF2
description: Clear channel 2 transfer complete flag
CHTIF6:
CHTIF2:
name: CHTIF2
description: Clear channel 2 half transfer flag
CTEIF7:
CTEIF2:
name: CTEIF2
description: Clear channel 2 transfer error flag
CGIF8:
CGIF3:
name: CGIF3
description: Clear channel 3 global interrupt flag
CTCIF9:
CTCIF3:
name: CTCIF3
description: Clear channel 3 transfer complete flag
CHTIF10:
CHTIF3:
name: CHTIF3
description: Clear channel 3 half transfer flag
CTEIF11:
CTEIF3:
name: CTEIF3
description: Clear channel 3 transfer error flag
CGIF12:
CGIF4:
name: CGIF4
description: Clear channel 4 global interrupt flag
CTCIF13:
CTCIF4:
name: CTCIF4
description: Clear channel 4 transfer complete flag
CHTIF14:
CHTIF4:
name: CHTIF4
description: Clear channel 4 half transfer flag
CTEIF15:
name: CTEIF4
description: Clear channel 4 transfer error flag
CGIF16:
CGIF5:
name: CGIF5
description: Clear channel 5 global interrupt flag
CTCIF17:
CTCIF5:
name: CTCIF5
description: Clear channel 5 transfer complete flag
CHTIF18:
CHTIF5:
name: CHTIF5
description: Clear channel 5 half transfer flag
CTEIF19:
CTEIF5:
name: CTEIF5
description: Clear channel 5 transfer error flag
CGIF20:
CGIF6:
name: CGIF6
description: Clear channel 6 global interrupt flag
CTCIF21:
CTCIF6:
name: CTCIF6
description: Clear channel 6 transfer complete flag
CHTIF22:
CHTIF6:
name: CHTIF6
description: Clear channel 6 half transfer flag
CTEIF23:
CTEIF6:
name: CTEIF6
description: Clear channel 6 transfer error flag
CGIF24:
CGIF7:
name: CGIF7
description: Clear channel 7 global interrupt flag
CTCIF25:
CTCIF7:
name: CTCIF7
description: Clear channel 7 transfer complete flag
CHTIF26:
CHTIF7:
name: CHTIF7
description: Clear channel 7 half transfer flag
CTEIF27:
CTEIF7:
name: CTEIF7
description: Clear channel 7 transfer error flag
ISR:
_modify:
GIF0:
GIF1:
name: GIF1
description: Channel 1 global interrupt flag
TCIF1:
name: TCIF1
description: Channel 1 transfer complete flag
HTIF2:
HTIF1:
name: HTIF1
description: Channel 1 half transfer flag
TEIF3:
TEIF1:
name: TEIF1
description: Channel 1 transfer error flag
GIF4:
GIF2:
name: GIF2
description: Channel 2 global interrupt flag
TCIF5:
TCIF2:
name: TCIF2
description: Channel 2 transfer complete flag
HTIF6:
HTIF2:
name: HTIF2
description: Channel 2 half transfer flag
TEIF7:
TEIF2:
name: TEIF2
description: Channel 2 transfer error flag
GIF8:
GIF3:
name: GIF3
description: Channel 3 global interrupt flag
TCIF9:
TCIF3:
name: TCIF3
description: Channel 3 transfer complete flag
HTIF10:
HTIF3:
name: HTIF3
description: Channel 3 half transfer flag
TEIF11:
TEIF3:
name: TEIF3
description: Channel 3 transfer error flag
GIF12:
GIF4:
name: GIF4
description: Channel 4 global interrupt flag
TCIF13:
TCIF4:
name: TCIF4
description: Channel 4 transfer complete flag
HTIF14:
HTIF4:
name: HTIF4
description: Channel 4 half transfer flag
TEIF15:
TEIF4:
name: TEIF4
description: Channel 4 transfer error flag
GIF16:
GIF5:
name: GIF5
description: Channel 5 global interrupt flag
TCIF17:
TCIF5:
name: TCIF5
description: Channel 5 transfer complete flag
HTIF18:
HTIF5:
name: HTIF5
description: Channel 5 half transfer flag
TEIF19:
TEIF5:
name: TEIF5
description: Channel 5 transfer error flag
GIF20:
GIF6:
name: GIF6
description: Channel 6 global interrupt flag
TCIF21:
TCIF6:
name: TCIF6
description: Channel 6 transfer complete flag
HTIF22:
HTIF6:
name: HTIF6
description: Channel 6 half transfer flag
TEIF23:
TEIF6:
name: TEIF6
description: Channel 6 transfer error flag
GIF24:
GIF7:
name: GIF7
description: Channel 7 global interrupt flag
TCIF25:
TCIF7:
name: TCIF7
description: Channel 7 transfer complete flag
HTIF26:
HTIF7:
name: HTIF7
description: Channel 7 half transfer flag
TEIF27:
TEIF7:
name: TEIF7
description: Channel 7 transfer error flag
7 changes: 7 additions & 0 deletions devices/stm32g050.yaml
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@@ -0,0 +1,7 @@
_svd: ../svd/stm32g050.svd

_modify:
name: STM32G050

_include:
- ./common_patches/2_nvic_prio_bits.yaml
13 changes: 13 additions & 0 deletions devices/stm32g051.yaml
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Original file line number Diff line number Diff line change
@@ -0,0 +1,13 @@
_svd: ../svd/stm32g051.svd

_modify:
name: STM32G051

TIM1:
_modify:
_interrupts:
TIM1_BRK_UP_TRG_COM:
description: IM1 break, update, trigger and commutation interrupts

_include:
- ./common_patches/2_nvic_prio_bits.yaml
13 changes: 13 additions & 0 deletions devices/stm32g061.yaml
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@@ -0,0 +1,13 @@
_svd: ../svd/stm32g061.svd

_modify:
name: STM32G061

TIM1:
_modify:
_interrupts:
TIM1_BRK_UP_TRG_COM:
description: IM1 break, update, trigger and commutation interrupts

_include:
- ./common_patches/2_nvic_prio_bits.yaml
15 changes: 15 additions & 0 deletions devices/stm32g0b0.yaml
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@@ -0,0 +1,15 @@
_svd: ../svd/stm32g0b0.svd

_modify:
name: STM32G0B0

TIM1:
_modify:
_interrupts:
TIM1_BRK_UP_TRG_COM:
description: IM1 break, update, trigger and commutation interrupts

_include:
- ./common_patches/2_nvic_prio_bits.yaml
- ./common_patches/g0_add_dma1_7ch.yaml
- ./common_patches/g0_add_dma2_5ch.yaml
15 changes: 15 additions & 0 deletions devices/stm32g0b1.yaml
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Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
_svd: ../svd/stm32g0b1.svd

_modify:
name: STM32G0B1

TIM1:
_modify:
_interrupts:
TIM1_BRK_UP_TRG_COM:
description: IM1 break, update, trigger and commutation interrupts

_include:
- ./common_patches/2_nvic_prio_bits.yaml
- ./common_patches/g0_add_dma1_7ch.yaml
- ./common_patches/g0_add_dma2_5ch.yaml
15 changes: 15 additions & 0 deletions devices/stm32g0c1.yaml
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@@ -0,0 +1,15 @@
_svd: ../svd/stm32g0c1.svd

_modify:
name: STM32G0C1

TIM1:
_modify:
_interrupts:
TIM1_BRK_UP_TRG_COM:
description: IM1 break, update, trigger and commutation interrupts

_include:
- ./common_patches/2_nvic_prio_bits.yaml
- ./common_patches/g0_add_dma1_7ch.yaml
- ./common_patches/g0_add_dma2_5ch.yaml
Binary file modified svd/vendor/en.stm32g0_svd.zip
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