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stm32wl: add register descriptions for dual-core variants #628

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merged 2 commits into from
Sep 30, 2021

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@newAM newAM commented Sep 16, 2021

This adds register descriptions for registers that are exclusive to the dual-core STM32WL's

cc @jorgeig-space

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PNB: [0, 0x63]
PNB: [0, 0x7F]
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I think this is an error in the STM32WLE reference manual, the STM32WLE manual only goes from page 0 - 63 (the value should be 0x3F in that case), but in the STM32WL5X reference manual this goes from 0 - 127.

As far as I can tell the STM32WLE is capable of programming its whole 256K, same as the STM32WL5X.

@adamgreig adamgreig mentioned this pull request Sep 29, 2021
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Thanks, this looks good! I just noticed a couple of minor typos, I'll add the fixes for those and get this merged.

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bors merge

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@bors bors bot merged commit 63311f2 into stm32-rs:master Sep 30, 2021
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