Memory map comparison

Thanks for the PR! This looks good, couple of comments:

• Looks like the PCROP1??R registers are also erroneously read-only
• The resetValue for these registers are very wrong in the SVD, perhaps safer to at least make them zero. Alternatively use the ST production value listed in the RM.
• This patch doesn't apply to a few parts (g050, g051, g061, g0b0) as they don't have flash blocks in the SVD. 👀 That can be out of scope for this PR, but should be fixed eventually.
• Could you rebase after G0 #687 was merged? The rebase should be simple (choose both)

Memory map comparison

I rebased, updated to include PCROP* and fixed the reset values. I went with the reset values from the datasheet, since for write protection and ROP, the end address is inclusive. So setting WRP to 0 would mean to write protect the first page of flash - something that might be surprising.

The value I've observed for WRP1AR on an stm32g071 is 0x3f, not 0xff as the datasheet says. The g071 has 128KB of flash, so 0x3f is the last page of flash. i.e. start=0x3f, end=0 (don't write protect anything). I tried setting it to 0xff and the value (after applying option bytes and reloading) ended up as 0x3f anyway. I think it probably makes sense that the reset value is 0xff, since that would presumably accommodate all devices in the g0 series.

The value I've observed for WRP1AR on an stm32g071 is 0x3f, not 0xff as the datasheet says.

If something is really different from RM, it is better to add detailed comment to prevent somebody "fixing" your fix.

The value I've observed for WRP1AR on an stm32g071 is 0x3f, not 0xff as the datasheet says.

If something is really different from RM, it is better to add detailed comment to prevent somebody "fixing" your fix.

To clarify, the value I put in the patch is the value from the RM, not the value that I read from the device - but I think either value would likely be fine - in fact any value where start > end should be fine.

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