Added missing Enumerations. #707

taylorh140 · 2022-03-11T19:00:33Z

Somehow the remaining EXTSEL bits seem to have been lost. I added them.

github-actions · 2022-03-11T19:02:02Z

Memory map comparison

taylorh140 · 2022-04-28T21:33:45Z

So just to aid in the review:
EXTSEL
should pull up page 418.

burrbull · 2022-04-29T06:35:19Z

Have you checked all reference manuals related to adc_v2.yaml?
Looks like not all chips support all of these values

taylorh140 · 2022-05-02T14:32:10Z

@burrbull It took me quite a while just to check that the stm32f429 was linked to that YAML file. How does the linking work with these? Also, it is a direct superset of the existing file, so would be better for it to be available?

burrbull · 2022-05-02T14:47:25Z

When you run make patch in .deps directory script creates .d file for each chip with all related yamls.
Possibly it could help you.

taylorh140 · 2022-05-02T15:59:07Z

So I think it's really possible I got this wrong. I now see that the yaml has an inheritance.
adc_v2 <- adc_v2_single <- adc_v2_multi

adc_v2	adc_v2_single	adc_v2_multi
stm32f401	stm32f410	stm32f215
stm32f411	stm32f412	stm32f217
	stm32f413	stm32f405
		stm32f407
		stm32f427
		stm32f429
		stm32f446
		stm32f469
		stm32f730
		stm32f745
		stm32f750
		stm32f765
		stm32f7x2
		stm32f7x3
		stm32f7x6
		stm32f7x7
		stm32f7x9

adc_v2

STM32f411
STM32f401

0000: Timer 1 CC1 event
0001: Timer 1 CC2 event
0010: Timer 1 CC3 event
0011: Timer 2 CC2 event
0100: Timer 2 CC3 event
0101: Timer 2 CC4 event
0110: Timer 2 TRGO event
0111: Timer 3 CC1 event
1000: Timer 3 TRGO event
1001: Timer 4 CC4 event
1010: Timer 5 CC1 event
1011: Timer 5 CC2 event
1100: Timer 5 CC3 event
1101: Reserved
1110: Reserved
1111: EXTI line11

adc_v2_single

STM32410 << DIFFERENT THAN OTHER adc_v2_single

0000: Timer 1 CC1 event
0001: Timer 1 CC2 event
0010: Timer 1 CC3 event
1010: Timer 5 CC1 event
1011: Timer 5 CC2 event
1100: Timer 5 CC3 event
1111: EXTI line 11

STM32F412
STM32F413

0000: Timer 1 CC1 event
0001: Timer 1 CC2 event
0010: Timer 1 CC3 event
0011: Timer 2 CC2 event
0100: Timer 2 CC3 event
0101: Timer 2 CC4 event
0110: Timer 2 TRGO event
0111: Timer 3 CC1 event
1000: Timer 3 TRGO event
1001: Timer 4 CC4 event
1010: Timer 5 CC1 event
1011: Timer 5 CC2 event
1100: Timer 5 CC3 event
1101: Timer 8 CC1 event
1110: Timer 8 TRGO event
1111: EXTI line 11

adc_v2_multi

STM32F205 STM32F207
STM32F405 STM32F407 STM32F427 STM32F429
STM32F446
STM32F469 Spec Missing from normal location
STM32F469 alternate page

0000: Timer 1 CC1 event
0001: Timer 1 CC2 event
0010: Timer 1 CC3 event
0011: Timer 2 CC2 event
0100: Timer 2 CC3 event
0101: Timer 2 CC4 event
0110: Timer 2 TRGO event
0111: Timer 3 CC1 event
1000: Timer 3 TRGO event
1001: Timer 4 CC4 event
1010: Timer 5 CC1 event
1011: Timer 5 CC2 event
1100: Timer 5 CC3 event
1101: Timer 8 CC1 event
1110: Timer 8 TRGO event
1111: EXTI line 11

different than other adc_v2_multi

STM32F730
STM32F745 STM32F750
STM32F765

0000: Timer 1 CH1
0001: Timer 1 CH2
0010: Timer 1 CH3
0011: Timer 2 CH2
0100: Timer 5 TRGO
0101: Timer 4 CH4
0110: Timer 3 CH4
0111: Timer 8 TRGO
1000: Timer 8 TRGO(2)
1001: Timer 1 TRGO
1010: Timer 1 TRGO(2)
1011: Timer 2 TRGO
1100: Timer 4 TRGO
1101: Timer 6 TRGO
1110: Reserved
1111: EXTI line11

stm32f7x[2367]

I don't know how these should be categorized.

So for the next steps should these be broken into a new child YAML or added as exceptions to existing ones?

taylorh140 · 2022-05-02T17:02:10Z

	EXTSEL SET A	EXTSEL SET B	EXTSEL SET C	EXTSEL SET D
adc_v2:		STM32F411
adc_v2:		STM32f401
adc_v2_single:	STM32410		STM32F412
adc_v2_single:			STM32F413
adc_v2_multi:			STM32F205
adc_v2_multi:			STM32F207
adc_v2_multi:			STM32F405
adc_v2_multi:			STM32F407
adc_v2_multi:			STM32F427
adc_v2_multi:			STM32F429
adc_v2_multi:			STM32F446
adc_v2_multi:			STM32F469
adc_v2_multi:				STM32F730
adc_v2_multi:				STM32F745
adc_v2_multi:				STM32F750
adc_v2_multi:				STM32F765
	EXTSEL SET A	EXTSEL SET B	EXTSEL SET C	EXTSEL SET D
	0000: Timer 1 CC1 event	0000: Timer 1 CC1 event	0000: Timer 1 CC1 event	0000: Timer 1 CH1
	0001: Timer 1 CC2 event	0001: Timer 1 CC2 event	0001: Timer 1 CC2 event	0001: Timer 1 CH2
	0010: Timer 1 CC3 event	0010: Timer 1 CC3 event	0010: Timer 1 CC3 event	0010: Timer 1 CH3
	0011: Reserved	0011: Timer 2 CC2 event	0011: Timer 2 CC2 event	0011: Timer 2 CH2
	0100: Reserved	0100: Timer 2 CC3 event	0100: Timer 2 CC3 event	0100: Timer 5 TRGO
	0101: Reserved	0101: Timer 2 CC4 event	0101: Timer 2 CC4 event	0101: Timer 4 CH4
	0110: Reserved	0110: Timer 2 TRGO event	0110: Timer 2 TRGO event	0110: Timer 3 CH4
	0111: Reserved	0111: Timer 3 CC1 event	0111: Timer 3 CC1 event	0111: Timer 8 TRGO
	1000: Reserved	1000: Timer 3 TRGO event	1000: Timer 3 TRGO event	1000: Timer 8 TRGO(2)
	1001: Reserved	1001: Timer 4 CC4 event	1001: Timer 4 CC4 event	1001: Timer 1 TRGO
	1010: Timer 5 CC1 event	1010: Timer 5 CC1 event	1010: Timer 5 CC1 event	1010: Timer 1 TRGO(2)
	1011: Timer 5 CC2 event	1011: Timer 5 CC2 event	1011: Timer 5 CC2 event	1011: Timer 2 TRGO
	1100: Timer 5 CC3 event	1100: Timer 5 CC3 event	1100: Timer 5 CC3 event	1100: Timer 4 TRGO
	1101: Reserved	1101: Reserved	1101: Timer 8 CC1 event	1101: Timer 6 TRGO
	1110: Reserved	1110: Reserved	1110: Timer 8 TRGO event	1110: Reserved
	1111: EXTI line 11	1111: EXTI line11	1111: EXTI line 11	1111: EXTI line11

Given the table above it looks like there should be some YAML file that configures for each set of devices

inhertance:
adc_v2_extsel_a.yaml <- adc_v2_extsel_b.yaml <- adc_v2_extsel_c.yaml

and a one off:
adc_v2_extsel_d.yaml

burrbull · 2022-05-02T17:11:27Z

Just remove EXTSEL from adc_v2.yaml, create different files for each set of EXTSEL and include them directly in device files.

github-actions · 2022-05-02T19:09:34Z

Memory map comparison

taylorh140 · 2022-05-02T19:10:42Z

Well, it took a second but that should have most of the details handled. this added a new subfolder for the 4 different configurations.

taylorh140 · 2022-05-03T16:00:29Z

Just so it's clear is there anything else I need to do for this, or am I just waiting for review? Who reviews stuff/how does that work?

burrbull · 2022-05-03T16:07:55Z

Just so it's clear is there anything else I need to do for this, or am I just waiting for review? Who reviews stuff/how does that work?

cc @newAM @richardeoin @adamgreig

github-actions · 2022-05-03T23:52:28Z

Memory map comparison

Somehow the remaining EXTSEL bits seem to have been lost. I added them.

github-actions · 2022-05-04T00:11:32Z

Memory map comparison

newAM · 2022-05-04T00:20:15Z

I rebased to get a fresh memmap comparison, then added some minor white-space fixes as well. I checked all the changes (thanks for the links to the reference manuals!), looks good to me.

Let me know if you're ok with my edits (trimmed trailing whitespace in adc_v2_extsel_d.yaml) and I'll merge this.

Keeping spacing uniform on EXTI lines

Keeping EXTI description uniform

github-actions · 2022-05-04T14:33:09Z

Memory map comparison

github-actions · 2022-05-04T14:34:38Z

Memory map comparison

taylorh140

found a few places where the spacing after EXTI line was missing. Looks good other than that

newAM

Thanks for the changes and breaking all of it down for easy review!

bors r+

bors · 2022-05-04T15:10:21Z

Build succeeded:

CI

newAM force-pushed the patch-1 branch from ba29657 to 8e96e68 Compare May 3, 2022 23:51

Added missing Enumerations

b3dbc04

Somehow the remaining EXTSEL bits seem to have been lost. I added them.

newAM force-pushed the patch-1 branch from 8e96e68 to b3dbc04 Compare May 4, 2022 00:10

taylorh140 added 2 commits May 4, 2022 09:31

Update adc_v2_extsel_d.yaml

2a454d0

Keeping spacing uniform on EXTI lines

Update adc_v2_extsel_a.yaml

22cf1a9

Keeping EXTI description uniform

taylorh140 commented May 4, 2022

View reviewed changes

newAM approved these changes May 4, 2022

View reviewed changes

bors bot merged commit 4e0ed20 into stm32-rs:master May 4, 2022

taylorh140 deleted the patch-1 branch May 4, 2022 16:01

Added missing Enumerations. #707

Added missing Enumerations. #707

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taylorh140 commented Mar 11, 2022

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github-actions bot commented Mar 11, 2022

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taylorh140 commented Apr 28, 2022

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burrbull commented Apr 29, 2022

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taylorh140 commented May 2, 2022

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burrbull commented May 2, 2022

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taylorh140 commented May 2, 2022

adc_v2

adc_v2_single

adc_v2_multi

different than other adc_v2_multi

stm32f7x[2367]

Uh oh!

taylorh140 commented May 2, 2022

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burrbull commented May 2, 2022

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taylorh140 commented May 2, 2022

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