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Branch	Updated	Check status	BehindAhead	Pull request	Action menu
master	Jul 9, 2025
sm_crr_gsb_fix	Jul 11, 2025
synlig_to_yosys_slang	Jul 11, 2025
add_tileable_rr_graph	Jul 10, 2025
temp_place_est_chan_util	Jul 10, 2025
koios_benchmark_fix_slang_errors	Jul 10, 2025
verilog_benchmark_fix_slang_errors	Jul 9, 2025
reconstruction_grids_with_LegalizationClusterId	Jul 8, 2025
stratix_10_arch_updates	Jul 2, 2025
Sub_Cin_Bug_Fix	Jun 19, 2025
simple_dp_rams	Jun 17, 2025
openfpga	Jun 11, 2025
read_enc_arch	Jun 10, 2025
primitive_placement	Jun 6, 2025
system-verilog-testing	Jun 5, 2025
llavigne-testing	May 27, 2025
v9.0	May 15, 2025
packer-feasible-candidates-list-to-priority-queue	May 12, 2025
io_link	May 9, 2025
temp-models-nightly-tests	Apr 28, 2025

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