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Experiment #6 Design A 8-Bit Comparator With VHDL Comparator and Code Converter (Chapter 8)

This document describes an experiment to design an 8-bit comparator using VHDL, including: 1) Using IF-THEN-ELSE statements to determine if input A is equal, greater than, or less than input B. 2) Implementing the IF-THEN-ELSE logic within a VHDL process. 3) Simulating the design and displaying the output on a 7-segment display on a DE2 board.

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102 views4 pages

Experiment #6 Design A 8-Bit Comparator With VHDL Comparator and Code Converter (Chapter 8)

This document describes an experiment to design an 8-bit comparator using VHDL, including: 1) Using IF-THEN-ELSE statements to determine if input A is equal, greater than, or less than input B. 2) Implementing the IF-THEN-ELSE logic within a VHDL process. 3) Simulating the design and displaying the output on a 7-segment display on a DE2 board.

Uploaded by

dknw
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Experiment #6 Design a 8-bit Comparator with VHDL

Comparator and Code Converter (chapter 8)


1. VHDL Design - Comparator Using IF-THEN-ELSE statement
2. VHDL Design PROCESS
3. Vector Waveform File Design

1. VHDL Design - Comparator Using IF-THEN-ELSE statement


1.a) The IC magnitude comparator can determines if A equals B, A is greater than B, and A is
less than B.

The magnitude comparison of two 8-bit binary strings by using two IC 7485s
1.b) VHDL program for an 8-bit comparator with IF_THEN_ELSE statement
VHDL Design Part:
The entity section declares a and b as 8-bit vector.
Three separate outputs are declared:
alb - a less than b;
aeb - a equal b;
agb - a greater than b.
Using internal Interconnection signal in the body part (architecture implementation part)
SIGNAL result : std)logic_vector (2 DOWNTO 0); -- 3 bit internal SIGNAL result
result[2] result[1] result[0]= =001: represent alb
result[2] result[1] result[0]= =010: represent aeb
result[2] result[1] result[0]= =100: represent agb

2.VHDL Design - PROCESS


The IF-THEN-ELSE statement is sequential and need to put inside of a PROCESS

Flowchart showing the sequential execution within the PROCESS

Figure 6-3 VHDL program for an 8-bit comparator

3. Vector Waveform File Design

Include the simulation result in the report.


4. Display the simulation results on the DE-2 board

And continue to work on the VHDL so that:


1) 1 is displayed on 7-Segment Output on the DE2 board if a is greater than b.
2) -1 is displayed on 7-Segment Output on the DE2 board if a is less than b.
3) 0 is displayed on 7-Segment Output on the DE2 board if a is equal to b.

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