ELECTRONICS CIRCUITS II AND SIMULATION LAB

LIST OF EXPERIMENTS CYCLE I

DESIGN OF TRANSISTOR RC PHASE SHIFT OSCILLATOR

CLASS C TUNED AMPLIFIER

INTEGRATORS AND DIFFERENTIATORS

1. DIFFERENTIATE AMPLIFIER

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3. ASTABLE,MONOSTABLE AND BISTABLE MULTIVIBRATOR TRANSISTOR BIAS 4. D / A and A/D CONVERTER ( SUCCESSIVE APPROXIMATION ) 5. ANALOG MULTIPLIER

6. CMOS INVERTOR , NAND AND NOR

2. ACTIVE FILTER : BUTTERWORTH II ORDER LPF

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CLIPPERS AND CLAMPERS

DESIGN OF MONOSTABLE MULTIVIBRATOR DESIGN OF ASTABLE MULTIVIBRATOR DESIGN OF BISTABLE MULTIVIBRATOR

CYCLE II - SIMULATION USING PSPICE

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DESIGN OF LC HARTLEY AND COLPITTS OSCILLATOR

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1. FEED BACK AMPLIFIER AIM: To design and test the current series and voltage shunt Feedback Amplifier and to calculate the following parameters with and without feedback. 1. Mid band gain. 2. Bandwidth and cutoff frequencies. 3. input and output impedance. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 ITEM TRANSISTOR RESISTOR CAPACITOR CRO RPS FUNCTION GENERATOR RANGE BC 107

CURRENT SERIES FEEDBACK DESIGN: (Without Feedback ):

Given data : Vcc = 15V , = 0.9, fL = 1kHz, Ic=1mA. Stability factor = [2-10], Rs = 680 , Av = 50dB , IE = 1.2mA . Gain formula is given by Av = -hfe RLeff / Z i Assume, VCE = Vcc / 2 RLeff = Rc RL re = 26mV / IE hie = re where re is internal resistance of the transistor. hie = hfe re On applying KVL to output loop,

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VE = Vcc / 10

(0-30 )MHz (0-30) V (0 1 )MHZ

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Q.TY 1 1 1 1 1

Vcc = IcRc + VCE + IERE VE = IERE Rc = ? Since IB is very small when compared with IC Ic approximately equal to IE VB = VBE + VE VB = VCC . RB2 / RB1 + RB2 S = 1+ (RB /RE ) RB = ? RB = RB1 Find RB2 RE = VE / IE = ?

Input Impedance , Zi = ( RB hie )

Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2 fCi Ci = ?

output coupling capacitor is given by , Xco=(Rc RL) / 10 Xc0 = 1/ 2 fCo Co = ?

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By-pass capacitor is given by ,XCE = 1/ 2 fCE CE = ?

Design ( With feedback ) : Remove the emitter capacitance ( CE ) = -1 / RE Gm = - hfe/ [(hie + RE ) RB]

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D = 1+ Gm Gmf = Gm / D Zif = Z iD Zof = ZoD CIRCUIT DIAGRAM: WITHOUT FEEDBACK: +VCC R1 Cin B E Vin F = 1 KHz R2 RE BC107 CE Rc Co

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RL +VCC Co BC107 RL

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CRO

WITH FEEDBACK:

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RB1 Rc Cin B RB2 RE

Vin

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Vo
CRO

Voltage shunt DESIGN: (Without Feedback ): Given data : Vcc = 15V , fL = 1kHz, Ic=1mA. Stability factor = [2-10], Rs = 680 , Av =40 dB . Gain formula is given by Assume, VCE = Vcc / 2 RLeff = R c | | RL Av = -hfe RLeff / Z i

On applying KVL to output loop, Vcc = IcRc + VCE + IERE Rc = ? VE = IERE

Since IB is very small when compared with Ic Ic approximately equal to IE RE = VE / IE = ? VB = VBE + VE VB = VCC . RB2 / RB1 + RB2 S = 1+ RB / RE RB =? RB = RB1| | RB2 Find Input Impedance, Zi = (RB | | hie )

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VE = Vcc / 10

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re = 26mV / IE hie = re where re is internal resistance of the transistor. hie = hfe re

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Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2 f Ci Ci = ? output coupling capacitor is given by , Xc0 = 1/ 2 f Co Co =? CE =? Design ( With feedback ) : X co=(Rc | | RL) / 10

capacitor (Cf) as shown in the figure. Xcf = Rf / 10 Cf = Rf / 2f x 10 = -1 / Rf

Assume, Rf = 68 K

Trans resistance Rm = - hfe (RB| | Rf ) (Rc | | Rf ) / (RB| | Rf ) + hie

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D = 1+ Rm Avf = Rmf / Rs Zif = Zi / D Zof = Zo / D

Connect the feedback resistance (Rf) and feedback

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Rmf = Rm / D

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By-pass capacitor is given by, XCE = 1/ 2 f CE

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CIRCUIT DIAGRAM: Voltage shunt feedback WITHOUT FEEDBACK: +VCC R1 Cin B BC107 E CE Vin F = 1 KHz R2 RE Rc Co

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CRO

RL

WITH FEEDBACK:

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RB1 RF Rc Co RS Cin B RB2 RE

Vin

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+VCC BC107 RL
CRO

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Vo

MODEL GRAPH(WITH & WITHOUT FEEDBACK) Without feedback 3 dB GAIN (db) 3dB With feedback

f3

f1

f2

f4

THEORY:

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PROCEDURE:

The connections are made as shown in the circuit. The amplifier is checked for its correct operation .Set the input voltage to a fixed value. Keeping the input voltage Vary the input frequency from 0Hz to 1MHz and note down the corresponding output voltage. plot the graph : gain (dB) vs frequency .Find the input and output impedances. Calculate the bandwidth from the graph. Remove RE and follow the same procedure.

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An amplifier whose function fraction of output is fed back to the input is called feed back amplifier. Depending upon whether the input is in phase or out of phase with the feed back signal, they are classified in to positive feed back and negative feed back. If the feed back signal is in phase with the input, then the wave will have positive gain. Then the amplifier is said to have a positive feed back. If the feed back signal is out of phase with the input ,then the wave will have a negative gain. The amplifier is said to have a negative feed back. The values of voltage gain and bandwidth without feed back.

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f2 f1 = Bandwidth of without feedback circuit f4 f3 = Bandwidth of with feedback circuit

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f(Hz)

OBSERVATION: WITH OUT FEEDBACK Vin = ------------ Volts S.NO FREQUNCY O/P Gain voltage Vo Av=20 log Vo/Vi

WITH FEEDBACK S.NO FREQUNCY O/P voltage Av=20 log Vo/Vi RESULT: Theoritical With F/B

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F/B

Without

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With F/B

Input Impedance Output

impedance Bandwidth Transconductance (gm)

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2. WEIN BRIDGE OSCILLATOR

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Practical Without F/B

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Aim : To Design and construct a Wein Bridge Oscillator for a given cut-off frequency . APPARATUS REQUIRED: S.NO 1 2 3 4 5 ITEM TRANSISTOR RESISTOR CAPACITOR CRO RPS RANGE BC107 Q.TY 2

DUAL(0-30) V

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CIRCUIT DIAGRAM:

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1 1

R1

RC! R3 + Cc Rc2

CC2

R2 CE

R C

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MODEL GRAPH:

Design

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R C

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DRB

GND

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R4

RE2

Given : Vcc = 12V , fo = 2 KHz, Ic1= Ic2 = 1mA.; Stability factor = [0-10], fL = 100Hz When the bridge is balanced, fo = 1/ 2RC Find, fo = ? Assume, C = 0.1F

Given data : Vcc = 15V , fL = 50Hz, Ic1= Ic2 = 1mA.; AvT = 3 ; Stability factor = [10] Gain formula is given by Av = -hfe RLeff / Zi RLeff = R c2 | | RL

re2 = 26mV / IE2 = 26 hie2 = hfe2 re 2 = 200 x 26 = 5.2kW From dc bias analysis , on applying KVL to the outer loop, we get Vcc = Ic2Rc2 + VCE2+VE2 VcE2 = Vcc/2 ; Rc2 = ? VE2 = Vcc / 10 ; Ic2 = 1mA

Since IB is very small when compared with Ic

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Find RL|| Rc2 from above equation Since Rc2 is known , Calculate RL. VE2 = IE2RE2 Calculate RE2 S = 1+ RB2 / RE2

Av2 = -hfe2 RLeff / Zi2

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hfe2 = 200 (from multimeter ) Ic approximately equal to IE

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Av1 =2; Av2 = 1;

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RB 2 =? RB 2 =R3 || R4 VB2 = VCC . R4 / R3 + R4 VB2 = VBE2 + VE2 R3 =? Zi2 = (RB2 | | hie2 ) Zi2 = ? Rleff1 = Zi2| | Rc1 Av1 = -hfe1 RLeff 1/ Zi1 RLeff1 = ? Vcc = Ic1 Rc1 + VCE1 +VE1 Rc1 = ? Find R4

Find Rleff1 from the gain formula given above

On applying KVL to the first stage, we get VCE1 = VCC / 2 ; VE1 = VCC / 10

Find Ic1 approximately equal to IE1 R6 = RE1=? RB 1 =? RB 1 =R1 || R2 S = 1+ RB1 / RE1

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Therefore find R2 = ? Zi1 = (RB1 | | hie1 ) R5 = RL R6

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VB1 = VCC . R2 / R1 + R2 VB1 = VBE2 +VE2 R1 = ? Find

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Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2 f Ci Ci = ? output coupling capacitor is given by , Xc0 = 1/ 2 f Co Co =? XCE 1/ 2 f CE2 CE =? THEORY: X co=(Rc2 | | RL2) / 10

In wein bridge oscillator, wein bridge circuit is connected between the amplifier input terminals and output terminals. The bridge has a series rc network in one arm and parallel network in the adjoining arm. In the remaining 2 arms of the bridge resistors R1and Rf are connected . To maintain oscillations total phase shift around the circuit must be zero and loop gain unity. First condition occurs only when the bridge is balanced . Assuming that the resistors and capacitors are equal in value, the resonant frequency of balanced bridge is given by

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PROCEDURE:

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Fo = 0.159 RC

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By-pass capacitor is given by, XCE = RE2 / 10

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1. 2. 3.

The circuit is constructed as per the given circuit diagram. Switch on the power supply and observe the output on the CRO( sine wave) Note down the practical frequency and compare it with the theoretical frequency.

Frequency

Theoritical f = 1 / 2 RC

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3. TRANSISTOR PHASE SHIFT OSCILLATOR

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Practical

RESULT :

AIM: To design and construct the transistor Phase shift oscillator. APPARATUS REQUIRED: S.NO 1 2 3 4 5 6 ITEM TRANSISTOR RESISTOR CAPACITOR CRO RPS FUNCTION GENERATOR RANGE BC 107 ( 0 30 ) MHz (0-30) V (0-1 )MHz Q.TY 1 1 1 1

CIRCUIT DIAGRAM:

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MODEL GRAPH:

DESIGN:

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Given : Vcc = 12V , fo = 1 KHz,C = 0.01F; IE = 5mA.; Stability factor = 10 f = 1/ 2RC Find R R1 = (Ri R) R >> Rc Amplifier Design : Gain formula is given by Assume, VCE = Vcc / 2 RLeff = R c | | RL eta = -1 / 29

On applying KVL to output loop, Vcc = IcRc + VCE + IERE Rc = ? VE = IERE

Since IB is very small when compared with Ic

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VE = Vcc / 10 Ic approximately equal to IE RE = VE / IE = ? VB = VBE + VE VB = VCC . RB2 / RB1 + RB2 S = 1+ RB / RE RB =? RB = RB1| | RB2

re = 26mV / IE hie = re where re is internal resistance of the transistor. hie = hfe re

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Av = -hfe RLeff / hie ( Av = 29, design given )

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Find RB1 & RB2 Input Impedance, Zi = (RB | | hie ) Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2 f Ci output coupling capacitor is given by , Xc0 = 1/ 2 f Co Co =? CE =? THEORY: Ci = ?

By-pass capacitor is given by, XCE = 1/ 2 f CE

The Transistor Phase Shift Oscillator produces a sine wave of desired designed frequency. The RC combination will give a 60 phase shift totally three combination will give a 180 phase shift. . The BC107 is in the common emitter configuration. Therefore that will give a 180 phase shift totally a 360 phase shift output is produced. The capacitor value is designed in order to get the desired output frequency. Initially the C and R are connected as a feedback with respect to input and output and this will maintain constant sine wave output. CRO is connected at the output. PROCEDURE: 1. The circuit is constructed as per the given circuit diagram. 2. Switch on the power supply and observe the output on the CRO( sine wave) 3. Note down the practical frequency and compare it with the theoretical frequency. RESULT : Theoritical Practical Frequency f = 1 / 2 RC 6RC

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4. LC OSCILLATOR HARTLEY and COLPITT OSCILLATOR

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AIM : To Design and construct the given Oscillator at the given operating frequency. APPARATUS REQUIRED: S.NO ITEM RANGE Q.TY 1 TRANSISTOR BC 107 1 2 RESISTOR 1 (0 30)MHZ (0-30) V (0- 1 ) MHz

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RB1 Rc Co C Cin B BC107 E RE RB2

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+VCC
CRO

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+ L1 -

CIRCUIT DIAGRAM:

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CE L2 +

FUNCTION GENERATOR 7 DlB, DRB CIRCUIT DIAGRAM :

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1 1 1 1 RL

3 4 5

CAPACITOR CRO RPS

+VCC RB1 Cin B BC107 RL RE RB2 CE E C RC 0 .01 F

C1

MODEL GRAPH:

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Design of Feedback Network ( Hartely Oscillator ) : Given : L1 = 1mH ; f = 800kHz; Vcc = 12V ; Av =50 ; fL = 1Khz Av = 1 / = -L1 / L2 C=? F = 1/2(L1 + L2)C;

Design of Feedback Network ( Colpitt Oscillator ) : Given : C1 = 0.1F;f =800kHz; Vcc = 12V ; Av = 50 ; S = 10

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L

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C2

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CRO

IE = 5mA; fi = 1kHz Av = Av = 1 / = C2 / C1 f = 1/2(C1 + C2) / LC1C2 L=? Amplifier Design : Av = -hfe RLeff / hie ( Av = 29, design given ) Assume, VCE = Vcc / 2 RLeff = R c | | RL Gain formula is given by

On applying KVL to output loop, Vcc = IcRc + VCE + IERE Rc = ?;RL = ? VE = IERE

Since IB is very small when compared with Ic Ic approximately equal to IE RE = VE / IE = ? VB = VBE + VE VB = VCC . RB2 / RB1 + RB2 S = 1+ RB / RE RB =? RB = RB1| | RB2 Find RB1 & RB2 Input Impedance, Zi = (RB | | hie )

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VE = Vcc / 10

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re = 26mV / IE hie = re where re is internal resistance of the transistor. hie = hfe re

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Coupling and bypass capacitors can be thus found out. Input coupling capacitor is given by , Xci = Z i / 10 Xci = 1/ 2 f Ci Ci = ? output coupling capacitor is given by , Xc0 = 1/ 2 f Co Co =? XCE = 1/ 2 f CE CE =? THEORY: Xc0 = (Rc RL) / 10

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THEORETICAL FREQUENCY FOR COLPITT OSCILLATOR: fc = 1/2(C1 + C2) / LC1C2

PRACTICAL : Observed Values: Time Period =

LC oscillator consisting of a tank circuit for generating sine wave of required frequency. Rectifying Barkhausen criteria A for a circuit containing reactance A must be positive and greater than or equal to unity. PROCEDURE : 1. The circuit connection is made as per the circuit diagram. 2. Switch on the power supply and observe the output on the CRO(sine wave ). 3. Note down the practical frequency and compare it with the theoretical frequency. THEORETICAL FREQUENCY FOR HARTLEY OSCILLATOR:

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By-pass capacitor is given by, XCE = RE / 10

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Frequency = RESULT : Thus the LC oscillator is designed for the given frequency and the output response is verified. Theoritical Practical Frequency Hartley Colpitt Hartley Colpitt

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AIM:
To study the operation of class c tuned amplifier.

APPARATUS REQUIRED:

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5. CLASS C SINGLE TUNED AMPLIFIER

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S.NO 1 2 3 4 5 6

ITEM TRANSISTOR RESISTOR CAPACITOR CRO RPS FUNCTION GENERATOR

4.2K , 2.2K ,

RANGE BC 107 500 ,

Q.TY 1 1 197K , 2 1 1 1 1

+VCC = 10 V CIRCUIT DIAGRAM: 10K 47K 10 F

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47 F C B BC107 E 120K 2.2k + -

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100K
CRO

Vin = 1 V F = 1 KHz

100 F

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MODEL GRAPH:

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0.1 f 0.001 f, 100 f (0-30) V -

THEORY:

PROCEDURE:

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1.The connections are given as per the circuit diagram. 2. Connect the CRO in the output and trace the waveform. 3.calculate the practical frequency and compare with the theoretical Frequency 4.plot the waveform obtained and calculate the bandwidth RESULT: Thus a class c single tuned amplifier was designed and its bandwidth is Calculated.

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The amplifier is said to be class c amplifier if the Q Point and the input signal are selected such that the output signal is obtained for less than a half cycle, for a full input cycle Due to such a selection of the Q point, transistor remains active for less than a half cycle .Hence only that much Part is reproduced at the output for remaining cycle of the input cycle the transistor remains cut off and no signal is produced at the output .the total Angle during which current flows is less than 180..This angle is called the conduction angle, Qc

6. INTEGRATOR USING OP-AMP

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AIM: To study the output waveform of integrator using op-amp. APPARATUS REQUIRED: APPARATUS NAME RANGE AUDIO OSCILLATOR CRO RESISTORS CAPACITOR OP-AMP BREADBOARD RPS

QUANTITY 1 1 1 1 1

PROCEDURE:

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1.Connections are given as per the circuit diagram. 2.The resistance Rcomp is also connected to the (+) input terminal to minimize the effect of the input bias circuit. 3.It is noted that the gain of the integrator decreases with increasing frequency. 4.Thus the integrator circuit does not have any high frequency problem.

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THEORY: A simple low pas RC circuit can also work as an integrator when time constant is very large. This requires very large values of R and C.The components R and C cannot be made infinitely large because of practical limitations. However in the op-amp integrator by MILLERs theorem, the effective input capacitance becomes Cf (1-Av), where Av is the gain of the op-amp. The gain Av is the infinite for an ideal op-amp, so the effective time constant of the opamp integrator becomes very large which results perfect integration.

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1K,10K 0.1 F IC741

CIRCUIT DIAGRAM:

0.1 F 10k 2 3 + IC741 +Vcc=12V 7

MODEL GRAPH: Vi

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Vo

RESULT:- Thus the integrator using op-amp is studied.

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7.CLIPPER & CLAMPER CIRCUITS

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t (msec) t(msec)

1k

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4
CR O

-Vee=-12V

AIM : To observe the clipping waveform in different clipping

APPARATUS REQUIRED :
S.NO 1 2 ITEM DIODE RESISTOR RANGE IN4001 1K 10 K 0.1F Q.TY 1 1 1

3 4 5

CAPACITOR FUNCTION GENERATOR CRO

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(0-1) MHz

CLIPPER CIRCUIT DIAGRAM :

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1 1 1

1 K O H M

I N 4 0 0 1 V o u t 1 K H z 5 V 2 V

1 K O H M

I N 4 0 0 1 V o u t 1 K H z 5 V

Procedure :

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1. Connections are given as per the circuit . 2. Set input signal voltage (5v,1kHz ) using function generator. 3. Observe the output waveform using CRO. 4. Sketch the observed waveform on the graph sheet.

Aim: To study the clamping circuits (a). Positive clamper circuit (b) Negative clamper circuit

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2 V

CLAMPING CIRCUITS

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APPARATUS REQUIRED :
S.NO 1 2 ITEM DIODE RESISTOR RANGE IN4001 1K 10 K 0.1F (0-1) MHz Q.TY 1 1 1

3 4 5

CAPACITOR FUNCTION GENERATOR CRO

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Given

f = 1kHz T = 1 / f = 1x 10- 3 Sec RC Assuming, C = 0.1F R = 10 K

Circuit Diagram : Positive clamper C =0.1F

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I/P

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IN4001 10K o/p Vo

DESIGN :

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1 1 1

Negative clamper C = 0.1F

I/P

IN4001

10K

o/p Vo

Procedure :

Result : Thus the waveforms are observed and traced .for clipper and clamper circuits .

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1.Connections are given as per the circuit . 2. Set input signal voltage (5v,1kHz ) using function generator. 3. Observe the output waveform using CRO. 4. Sketch the observed waveform on the graph sheet.

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8. MONOSTABLE MULTI VIBRATOR

THEORY:

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A monostable multivibrator has one stable state and a quasistable state. When it is triggered by an external agency it switches from the stable state to quasistable state and returns back to stable state. The time during which it states in quasistable state is determined from the time constant RC. When it is triggered by a continuous pulse it generates a square wave. Monostable multi vibrator can be realized by a pair of regeneratively coupled active devices, resistance devices and op-amps.

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4 5

RPS CRO

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CAPACITOR

0.01 F 0.1 F (0-30) V -

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S.NO 1 2

ITEM IC RESISTOR

RANGE NE555 9K

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Q.TY 1 1 1 1 1 1

APPARATUS REQUIRED:

DESIGN :
Given Vcc = 12V ; VBB = - 2 V; Ic = 2 mA; VCE(sat) = 0.2 V ; h FE = 200 ; f = 1kHz. RC = VCC VCE(sat) / IC = 12 0.2 / 2x 10 3 = 5. 9 K IB 2(min) = Ic2 / hfe = 2mA / 200 = 10 A Select IB 2 > IB 1(min) (say 25 A ) T = 0.69 RC 1x10-3 = 0.69 x 452 x 10 C = 3.2 nF
3

Since Q1 is off state, VB1 less than equal to 0. Then VBB R1 / R1 + R2 = VCE(sat) VBB R1 = VCE(sat) R2 2R1 = 0.2R2 R2 / R1+R2

Assume

C1 = 25pF( Commutative capacitor )

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procedure :

1. Connect the circuit as per circuit diagram. 2. Switch on the regulated power supply and observe the output waveform at the collector of Q1 and Q2 and plot it. observe the change in waveform.

3. Trigger the monostable multivibrator with a pulse and

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VB1 = VBB R1 / R1 + R2 + VCE(sat) R2 / R1+R2

R1 = 10 K . Then R2 = 100 K

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Then R = VCC VBE(sat) / I B 2 = 12 0.7 / 25 x 10 -6 = 452 K

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4. Plot the waveform and observe the changes before and after triggering the input to the circuit.

CIRCUIT DIAGRAM :
+ VCC = +12v

5.9K 3.2nf

452k 10k

C B
Vo1

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E 100k -VBB

BC107

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B B

PROCEDURE:

The connections are made as per the diagram. The value of R is chosen as 9k . The DCB is set to the designed value. The power supply is switched on and set to +5V. The output of the pulse generator is set to the desired frequency. Here the frequency of triggering should be greater than width of ON period (i.e.) T >W. The output is observed using CRO and the result is compared with the theoretical value. The experiment can be repeated for different values of C and the results are tabulated.

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22pf C BC107 VO2 E

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5.9k

OBSERVATION
C (uf) Theoritical(T=1.095 RC(ms))) Practical T(ms)

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RESULT: Thus the monostable multivibrator using IC555 is designed and its output waveform is traced.

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9.ASTABLE MULTIVIBRATOR
AIM :
To design a astable multivibrator and study the waveform.

APPARATUS REQUIRED :

3 4 5

CAPACITOR RPS CRO

0.74nF (0-30) V -

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THEORY :

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Astable multivibrator has no stable state, but has two quasi stable states. The circuit oscillates between the states (Q1 ON , Q2 OFF) and (Q2 ON , Q! OFF). The output at the collector of each transistor is a square wave. Therefore this circuit is applied as a square wave generator. Refer to the fig each transistor has a bias resistance RB and each base is capacitor coupled to the collector of other transistor. When Q1 is ON and Q2 is OFF, C1 is charged to ( Vcc VBE1) positive on the right side. For Q2 ON and Q! OFF, C2 is charged to (Vcc VBE2) positive on the left side.

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2 1 1

S.NO 1 2

ITEM TRANSISTOR RESISTOR

RANGE BC107 980K 4.9K

Q.TY 2 2 2

CIRCUIT DIAGRAM :
4.9K 0.74nF 980K 980K 4.9K 0.74nF

+ VCC = +10v

C B
Vo1

BC107 E

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Design

Given Vcc = 10V ; Ic = 2 mA; h FE = 200 ; f = 1 kHz R h FE Rc RC = VCC VC2(sat) / IC = 10 0.2 / 2x 10 3 =4. 9 K R 200 x 4.9 x 103 = 980 K T = 1.38 RC

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1 x 10-3 = 1.38 x 980 x 103 x C C =0.74 nF

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C B BC107 VO2 E

Waveforms :

PROCEDURE :

1. The connections are given as per the circuit diagram. 2. Switch on the power supply. 3. Observe the waveform both at bases andcollectors of Q1 and Q2. 4. Connect the CRO in the output of Q1 and Q2 and trace the square waveform.

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RESULT :
Thus the square wave forms are generated using astable multivibrator.

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10.BISTABLE MUITIVIBRATOR
AIM: To design a bistable multivibrator and study the output waveform.

CAPACITOR

4 5 6

THEORY:

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The bistable multivibrator is a switching circuit with a two stable state either Q1 is on and Q2 is off (or)Q2 is on and Q1 is off. The circuit is completely symmetrical. load resistors RC1 and RC2 all equal and potential Divider (R1,R2)and (R1 and R2 ) from identical bias Network at the transistor bases. Each transistor is biased from the collector of the other Device when either transistor is ON and the other transistor is biased OFF.C1andC2 operate as speed up capacitors or memory capacitors.

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CRO RPS FUNCTION GENERATOR

0.022 f 10 f 100Pf (0-30) V -

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S.NO 1 2

ITEM TRANSISTOR RESISTOR

RANGE BC 107 4.7K 22K

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Q.TY 1 2 2 2 2 2 1 1 1

Apparatus Required:

Design : Given Vcc = 12V ; VBB = -12v; Ic = 2mA; VC(sat) = 0.2 V VBE(sat) = 0.7V Assume Q1 is cut-off Vc1 = VCC(+12V) Q2 is in saturation (ON) Vc2 = Vc(sat) (0.2 V) VB1 = VBB[ R1 / R1 + R2 ] + Vc2[ R2 / R1+R2 ] << 0 .7 Let us consider VB1 = -1V Then -1 = [-12R1/R1+R2 ] + [ 0.2R2 / R1+R2 ] Using superposition principle,

Assume R1 = 10K such that it ensures a loop gain in excess of unity R1 < hfe Rc

Test for conditions : Q1 = cut-off (Vc1 = 12V )

Minimum base current, IB (min) must be less than the base current (IB) i.e., IB (min) < IB

Calculate hfe from multimeter (say = 200)

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IB 2(min) = Ic2 / hfe Ic2 = Ic I3 IB 2(min) = 1.88mA / 200 = 9.4 A Ic2 = ( 2 0.12 )mA = 1.88 mA IB 2 = I1 I2

Since IB 2 > IB 2(min) ,Q2 is ON C1 = 25 pF ( Commutative capacitor )

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R2 = 91.67 K IB 2 = (0.71 0.14 )mA = 0.57 mA

Q2 = Saturation / (ON) (VC2 = 0.2V)

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during the transition between states. The inequality

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IC = VCC Vc2 / RC RC = VCC Vc2 / IC = 12 0.2 / 2x 10 3 = 5.9 K I3 = Vc2 - VBB / R1 + R2 = 0.2 + 12 / ( 10 + 91.6 )K = 0.12mA I1 = Vc1 - VBE / RC + R1 Procedure : = 12 0.7 / ( 5.9 + 10 ) K = 0.71mA I2 = VBE - VBB / R2 = 0.7 + 12 / 91.6K = 0.14 mA 1. Connect the cir cuit as per circuit diagram. waveform at the collector of Q1 and Q2. 3. Sketch the waveform. and Q2. 5. Sketch the waveform.

2. Switch on the regulated power supply and observe the output

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CIRCUIT DIAGRAM :
+ Vcc = +12 V 5.9K 5.9K

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I1 10 K 50pF I3 10K 50pF CR O

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4. Apply a threshold voltage and observe the change of states of Q1

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C CR O B 22 BC107 10 E TRIGGER -VBB 91.67k I4 B

C BC107 E I2 91.67k 10 F TRIGGER IP

Vc2

RESULT:

Thus the bistable multivibrator is designed and the square waveforms are generated at the output.

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Aim : Calculate the dc voltage gain , the input resistanceand the

output resistance of a differential amplifier with a transistor current source. Specifications: The input voltage is 0.1v. The model parameters of the bipolar transistors are BF = 50,RB = 70, RC = 40.

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CYCLE II
SIMULATION LAB
1.

Differential Amplifier

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VOLTAGE VC1

Time Period

Frequency

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Amplitude

OBSERVATION :

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Circuit Diagram :

2 1 0 K Q

3 1 0 K V 1 2 v 2

1 . 5

1 . 5 K V 1 R 4 1 5 0 K R 5 1 5 0 K

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V 1 2 v 3 Q 1 A

0
Q 1 A

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Program : 11 0 1 11 11 4 7

Vcc VEE VIN RC1 RC2 RE1 RE2

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Q 1 A

0 10 0 3 5 12 12

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12v 12v DC 0.25v 10k 10k 150 150

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R 7 2 0 K

1 A

RS1 RS2 Rx Q1 Q2 Q3 Q4 Q5

1 6 11 3 5 12 9 8

2 0 8 2 6 8 9 9

1.5k 1.5k 20k 4 7 9 10 10 QN QN QN QN QN

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ACTIVE LOW BUTTER FILTER

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. TF V (3,5) VIN END The results of the transfer function analysis by the .TF commands are given below

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1 0 . 5 8 6 R F V 7 C C 1 2 5 S 2 U S E 1 6 T 1 1

1 k

0
V D C

1RK 2 R

3 2 A 7

V+ 4 V-

O O

1 V

0 V

D C

C 1 1 n

I N C

u 2 1 n

4 1 V E

0
2 V D C

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PROGRAM FOR FREE RUNNING MULTIVIBRATOR

LOW PASS FILTER VCC 6 0 DC 12V VEE 0 7 DC 12V VIN 1 0 AC 1V R1 4 0 1K R2 1 2 1K R3 2 3 1K RF 4 5 0.586K C2 2 5 0.079 UF C3 3 0 0.079UF X1 4 3 6 7 5 UA 741 .LIB NOB .LIB .AC DEC 10HZ 100HZ 1MEGHZ .PROBE .END

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PROGRAM:

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1 0 0 K R 1 V+ 3 U 2 + 7 O O U A D 7 4 V2 O S 4 1 V E E 1 0 K U R 3 0 . 1 F C

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V C C 1 2 5 S 2 6 T

1 0

0 K

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R 2

1 1

0
- 1 2 V

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A CMOS INVERTER

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0
V O T

VCC 6 0 DC 12V VEE 0 7 DC 12V R1 1 0 100K R2 2 3 100K R3 2 3 10K C1 3 0 0.1 UF IC = -5V XA1 1 3 6 7 2 UA741 .LIB EVAL .LIB .TRANS 10US 4MS UIC .PROBE .END

VDD = 5

PMOS M1 3

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V1 1 0 1V V2 4 0 1V

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NMOS M2

ANALOG MULTIPLIER

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RL 100K

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VDD 2 0 5V VIN 1 0 DC 5V PULSE (0 5V 0 1NS 1NS RL 3 0 100k M1 3 1 2 2 PMOD L=1U W= 20U M2 3 1 0 0 NMOD L=1U W= 5U .TRAN 1US 80US .TF V(3) VIN .OP .PLOT TRAN V(3) V(1) .PROBE .END

20US

40US)

R1 R2 R3 R4 R5

0 V

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R 1 1 7 V 8 V+ 3 U 2 7 k + O S 5 2 R 1 2 6 O U 6 T V2

1 2 1K 4 5 1K 3 7 1K 6 7 1K 7 8 1K R6 10 0 1K D1 2 3 DA D2 5 6 DA D3 8 9 DA .MODEL DA D X1 2 0 3 IOP X2 5 0 6 IOP X3 7 0 8 IOP X4 9 0 10 IOP .SUBCKT IOP M P V0 RI M P 1G E V0 0 P M 2E5 .ENDS .DC V1 -1 1 0.1 .PROBE .END

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k R 1 2 4 3 7 3 6 2 A U + 2 k 7 O S U S 1 R 2 1 k 7 5 2 6 T 1 1 V+ 7 4 4 V2 6 V+ 3 U 2 7 + O S 5 2 O U 6 T D 1 1 A D 7 V2 O S 1 1 1 N O D O 4 1 4

1 1

4 1

R 1

1 7

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V+

0 V

k 2 A

S U S

5 2 6 T 1 1

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0 0 0

O D 7 O V-

4 1

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