74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

February 2008

74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs
Features
Input and output interface capability to systems at

General Description
The LVT2244 and LVTH2244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers and bus oriented transmitters or receivers which provides improved PC board density. The equivalent 25-Series resistors helps reduce output overshoot and undershoot. The LVTH2244 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These octal buffers and line drivers are designed for lowvoltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT2244 and LVTH2244 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.

5V VCC Equivalent 25-Series resistors on outputs Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH2244), also available without bushold feature (74LVT2244) Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading Outputs source/sink 12mA/+12mA Latch-up performance exceeds 500mA ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V

Ordering Information
Order Number
74LVT2244WM 74LVT2244SJ 74LVT2244MTC 74LVTH2244WM 74LVTH2244SJ 74LVTH2244MTC

Package Number
M20B M20D MTC20 M20B M20D MTC20

Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard.

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Connection Diagram

Logic Symbol
IEEE/IEC

Pin Description
Pin Names
OE1, OE2 I0I7 O0O7 Inputs Outputs

Description
3-STATE Output Enable Inputs

Truth Tables
Inputs OE1
L L H

In
L H X

Outputs (Pins 12, 14, 16, 18)

L H Z

Inputs OE2
L L H

In
L H X

Outputs (Pins 3, 5, 7, 9)
L H Z

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol
VCC VI VO Supply Voltage DC Input Voltage DC Output Voltage Output in 3-STATE Output in HIGH or LOW IIK IOK IO

Parameter

Rating
0.5V to +4.6V 0.5V to +7.0V 0.5V to +7.0V

State(1)

0.5V to +7.0V 50mA 50mA 64mA 128mA 64mA 128mA 65C to +150C

DC Input Diode Current, VI < GND DC Output Diode Current, VO < GND DC Output Current, VO > VCC Output at HIGH State Output at LOW State

ICC IGND TSTG

DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature

Note: 1. IO Absolute Maximum Rating must be observed.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.

Symbol
VCC VI IOH IOL TA t / V Supply Voltage Input Voltage

Parameter

Min.
2.7 0

Max.
3.6 5.5 12 12

Units
V V mA mA C ns/V

HIGH-Level Output Current LOW-Level Output Current Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V2.0V, VCC = 3.0V 40 0

85 10

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

DC Electrical Characteristics
TA = 40C to +85C Symbol
VIK VIH VIL VOH VOL

Parameter
Input Clamp Diode Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage

VCC (V)
2.7 2.73.6 2.73.6 2.73.6 3.0 2.7 3.0 3.0 3.0 3.6

Conditions
II = 18mA VO 0.1V or VO VCC 0.1V IOH = 100A IOH = 12mA IOL = 100A IOL = 12mA VI = 0.8V VI = (4)
(5)

Min.
2.0

Typ.(2)

Max.
1.2 0.8

Units
V V V V

VCC 0.2 2.0 0.2 0.8 75 75 500 500 10 1 5 1 100 100 5 5 10 0.19 5 0.19 0.19 0.2

V A A A

II(HOLD)(3) Bushold Input Minimum Drive II(OD)(3) II Bushold Input Over-Drive Current to Change State Input Current Control Pins Data Pins IOFF IPU/PD IOZL IOZH IOZH+ ICCH ICCL ICCZ ICCZ+ ICC Power Off Leakage Current Power up/down 3-STATE Output Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current Increase in Power Supply Current(6)

2.0V

VI = 5.5V VI = 0V or VCC VI = 0V VI = VCC 0V VI or VO 5.5V VO = 0.5V to 3.0V, VI = GND or VCC VO = 0.5V VO = 3.0V VCC < VO 5.5V Outputs HIGH Outputs LOW Outputs Disabled VCC VO 5.5V, Outputs Disabled One Input at VCC 0.6V, Other Inputs at VCC or GND

3.6 3.6 0 01.5 3.6 3.6 3.6 3.6 3.6 3.6 3.6 3.6

A A A A A mA mA mA mA mA

Notes: 2. All typical values are at VCC = 3.3V, TA = 25C. 3. Applies to bushold versions only (74LVTH2244). 4. An external driver must source at least the specified current to switch from LOW-to-HIGH. 5. An external driver must sink at least the specified current to switch from HIGH-to-LOW. 6. This is the increase in supply current for each, input that is at the specified voltage level rather than VCC or GND.

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Dynamic Switching Characteristics(7)

Conditions Symbol
VOLP VOLV

TA = 25C Min. Typ.

0.8 0.8

Parameter
Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL

VCC (V)
3.3 3.3

CL = 50pF, RL = 500
(8)

Max.

Units
V V

(8)

Notes: 7. Characterized in SOIC package. Guaranteed parameter, but not tested. 8. Max number of outputs defined as (n). n1 data inputs are driven 0V to 3V. Output under test held LOW.

AC Electrical Characteristics
TA = 40C to +85C, CL = 50pF, RL = 500 VCC = 3.3V 0.3V Symbol
tPLH tPHL tPZH tPZL tPHZ tPLZ tOSHL, tOSLH Output to Output Skew(10) Notes: 9. All typical values are at VCC = 3.3V, TA = 25C. 10. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Output Disable Time Output Enable Time

VCC = 2.7V Min.

1.0 1.0 1.0 1.1 1.9 1.8

Parameter
Propagation Delay Data to Output

Min.
1.0 1.0 1.0 1.1 1.9 1.8

Typ.(9)

Max.
4.4 4.1 5.9 5.5 6.1 4.5 1.0

Max.
5.3 4.4 7.7 6.2 6.8 4.5 1.0

Units
ns ns ns ns

Capacitance(11)
Symbol
CIN COUT

Parameter
Input Capacitance Output Capacitance

Conditions
VCC = 0V, VI = 0V or VCC VCC = 3.0V, VO = 0V or VCC

Typical
3 6

Units
pF pF

Note: 11. Capacitance is measured at frequency f = 1MHz, per MIL-STD-883B, Method 3012.

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Physical Dimensions
13.00 12.60 11.43
20 B 11 A

9.50 10.65 7.60 10.00 7.40 2.25

1 PIN ONE INDICATOR

0.51 0.35
0.25
M

10

1.27
C B A

1.27

0.65

LAND PATTERN RECOMMENDATION

2.65 MAX

SEE DETAIL A

0.33 0.20
0.10 C SEATING PLANE

0.75 0.25 (R0.10) (R0.10)

8 0

X 45

0.30 0.10

NOTES: UNLESS OTHERWISE SPECIFIED

GAGE PLANE

0.25 1.27 0.40 (1.40)

A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P1030X265-20L F) DRAWING FILENAME: MKT-M20BREV3

SEATING PLANE

DETAIL A
SCALE: 2:1

Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Physical Dimensions (Continued)

Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

Physical Dimensions (Continued)

Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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74LVT2244, 74LVTH2244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs and 25 Series Resistors in the Outputs

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Full Production

Obsolete

Not In Production

1999 Fairchild Semiconductor Corporation 74LVT2244, 74LVTH2244 Rev. 1.5.0

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