2 IC

Guide

Expanders, Multiplexers and Switches Hubs, Translators, Buffers and Repeaters

ti.com/i2c 2013

I2C Guide

Contents and Overview

Table of Contents
2 Overview 3 I/O Expanders 4 Multiplexers and Switches 4 Hubs, Translator Buffers
multiple peripheral circuits to a central processing unit (CPU/MCU) in TV applications. As circuits became more complex with many peripheral connections, a method was needed to simplify designs and reduce costs. By limiting the number of printed circuit board (PCB) traces and lowering generalpurpose input and output (GPIO) usage on the microprocessor, the I2C bus met this requirement. Operation The I2C bus is used in a wide range of applications because it is simple and quick to use. It consists of a twowire communication bus that supports bidirectional data transfer between a master and several slaves. The master or processor controls the bus in particular, the serial clock (SCL) line. Data is transferred between the master and slave through a serial data (SDA) line. This data can be transferred in four speeds: standard mode (0 to 100 Kbps), fast mode (0 to 400 Kbps), fast-mode plus (0 to 1 Mbps) and high-speed mode (0 to 3.4 Mbps). The most common speeds are the standard and fast modes. See block diagram below for a generic system. There can be more than one master on a system; the software protocol uses arbitration and synchronization to manage data collisions and loss. Since successive specification enhancements are backwardcompatible, mixed-speed communication is possible with the bus speed controlled by the processor or I2C master. Typical I2C Features Requires one master (processor) and one or more slave devices Each device on the bus has a unique address Bus capacitive load: 550 pF max Rise time 1000 ns (standard mode), 300 ns (fast mode) and 120 ns (fast mode plus) I2C Applications The I2C bus is useful for many of todays microcontroller- and microprocessor-based systems or other systems linking many I/O devices. These systems may include applications in the following fields: Automotive PC/server Consumer Radio/TV Industrial Telephony Mobile Notebooks Battery-powered portable applications Telecom/networking Many of the I2C bus products are designed to operate in the SMBus environment.

and Repeaters
5 Special Functions 5 LED Driver 6 LCD Bias 7 One-Wire Interface 8 I2C Translators 8 Keypad Controller

Resources
9 Frequently Asked Questions 11 Packages 12 Product Casts 12 Technical Support
Texas Instruments (TI) has supported the highly efficient I2C bus interface for many years. This overview provides an updated look at I2C applications and how TIs I/O expanders, multiplexers, buffers and repeaters can help system designers achieve effective subsystem communications using proven I2C devices. History During the 1980s, Philips (Koninklijke Philips Electronics N.V.) developed the two-wire inter-integrated circuit (I2C) bus to provide an easy way to connect

TI Solution

I/O Expanders VCC1

VCC2

LED Blinkers Bus Expander Hub Repeater Buffer

VCC3

I/O Expanders

MicroControllers Processors

Multiplexers Switches

VCC4

Data Converters

EEPROM

LCD Segment Driver

RTC and Calendar

Temperature Sensors

Block diagram of generic system using I2C devices 2

I2C Guide 2013

Texas Instruments

I2C Guide

I/O Expanders
The I2C I/O expanders (as shown in the block diagram) allow system layout to be greatly simplified. The two-wire bus reduces PCB complexity through trace reduction and routing simplification. Key Features Easy board routing Board-space savings Processor-pin savings Low cost Industry standard Applications Complements processors with limited I/Os Feature enhancements Keypad control

System without I2C I/O Expanders

Processor Logic External Device

System with I2C I/O Expanders

Processor SDA SCL I 2C Serial Interface I2C I/O Expander External Device

Parallel Interface

I/O expanders can simplify board layout

Low-Voltage I/O Expanders Selection Guide

Additional Features Max Frequency (kHz) 26 MHz 400 400 1000 400 1000 400 400 400 400 400 I2C Address MIPI RFFE 0001 or 1001 0100 00x 0100 00x 0110 100 0100 01x 0100 00x 0100 xxx 1110 0xx 1110 1xx 0100 xxx/0111 xxx 0100 xxx VCC Range (V) 1.8 to 3.3 1.65 to 5.5 1.65 to 5.5 1.65 to 3.6 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 No. of I/Os 8-bit 8-bit 16-bit 18-bit 24-bit 8-bit 16-bit 8-bit 16-bit 8-bit 16-bit Low Power 4 4 4 4 4 4 4 4 4 4 4 Conguration Registers 4 4 4 4 4 4 4 4 4 4 4 5-VTolerant I/O 4 4 4 4 4 4 4 4 4 I/O Type PushPull 4 4 4 4 4 4 4 4 4 4 OpenDrain 4 Pull-Up Integrated

Device LM8335 TCA6408A TCA6416A TCA6418E TCA6424A TCA7408 TCA9535 TCA9538 TCA9539 TCA9554/A TCA9555

Interrupt 4 4 4 4 4 4 4 4 4 4

Reset 4 4 4 4 4 4 4

4 4

5-V tolerant on the GPIO sides.

Preview products are listed in bold teal.

I/O Expanders Selection Guide

Device PCA9536 PCA6107 PCA9534 PCA9534A PCA9538 PCA9557 PCF8574 PCF8574A PCF8575 PCF8575C Max I2C Frequency (kHz) 400 400 400 400 400 400 100 100 400 400 Additional Features I2C Address 1000 001 0011 xxx 0100 xxx 0111 xxx 1110 0xx 0011 xxx 0100 xxx 0111 xxx 0100 xxx 0100 xxx VCC Range (V) 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 2.5 to 6.0 2.5 to 6.0 2.5 to 5.5 4.5 to 5.5 No. of I/Os 4-bit 8-bit 8-bit 8-bit 8-bit 8-bit 8-bit 8-bit 16-bit 16-bit Low Power 4 4 4 4 4 Interrupt 4 4 4 4 4 4 4 4 Reset 4 Conguration Registers 4 4 4 4 4 4 5-V-Tolerant I/O 4 4 4 4 4 4 I/O Type PushPull 4 4 4 4 4 4 4 4 4 OpenDrain 4 Pull-Up Integrated 4

4 4

Texas Instruments

I2C Guide 2013

I2C Guide

Multiplexers and Switches

Low Voltage 8-Channel I2C Switch with Reset TCA9548A
The I2C multiplexer/switch shown in this diagram allows further expansion of I2C systems while maintaining the simple two-wire bus. It can also perform voltage translation and segment isolation.
VCC = 1.65 V I 2C Master SCL SDA 1.65 V

TCA9548A
SCL SDA SCL0 SDA0

5.5 V

Key Features Pin savings on the I2C master, as each switch is activated or isolated through the I2C software Supports voltage-level translation for any bus voltages in the range of 1.65 V-5.5 V which is essential in mixed voltage I2C systems Applications Resolves I2C address conflicts I2C bus isolation I2C bus expansion

I C System 2.7 V

SCL7 SDA7 GND

I C System

Dual bidirectional translating switch controlled via I2C bus

Multiplexers and Switches Selection Guide

Additional Features Device PCA9543A PCA9544A PCA9545A PCA9546A TCA9546A TCA9548A Max Frequency (kHz) 400 400 400 400 400 400 I2C I2C Address 1110 0xx 1110 xxx 1110 0xx 1110 xxx 1110 xxx 1110 xxx VCC Range (V) 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 2.3 to 5.5 1.65 to 5.5 1.65 to 5.5 Channel Width 2-Channel 4-Channel 4-Channel 4-Channel 4-Channel 8-Channel Interrupt 4 4 4 4 4 4 4 Reset 4 Simultaneously Active Channel 1 to 2 1 1 to 4 1 to 4 1 to 4 1 to 8 5-V-Tolerant I/O 4 4 4 4 4 4

Preview products are listed in bold teal.

Hubs, Translators, Buffers and Repeaters

Level-Translating FM+ I2C Bus Repeater TCA9617A
I2C hubs, buffers and repeaters permit bus expansion, sectional bus isolation, address conflict resolution and voltage-level translation, as shown in this diagram.
0.8 V 2.2 V

Key Features Can isolate a section on the I2C bus through enable (EN) pin Supports voltage-level translation from 0.8-VCCB to 2.2 V-5.5 V buses, which is essential in mixed-voltage I2C systems Supports fast-mode plus (1 MHz) Applications I2C-bus expansion through buffering of I2C signals Resolving address conflicts

VCCA SDA SCL I2 C Bus Master (1 MHz)

VCCB SDA SCL I2 C Bus Slave (1 MHz)

SDAA SDAB SCLA SCLB

TCA9617A
EN Bus 0 Bus 1

Two-channel bidirectional repeater 4

I2C Guide 2013

Texas Instruments

I2C Guide

Hubs, Translators, Buffers and Repeaters (continued)

Hubs, Translators, Buffers and Repeaters Selection Guide
I2C Bus Capacitance Supported Device PCA9306 PCA9515A/B P82B715 P82B96 TCA4311A TCA9406 TCA9509 TCA9517 TCA9617A

I/O Type 5-V-Tolerant I/O 4 4 4 PushPull OpenDrain

Max I2C Frequency (kHz) 400 400 1,000 400 400 1 MHz 400 400 1,000

I2C Address None None None None None None None None None

VCC Range (V) 0 to 5.5 2.3 to 5.5 3.0 to 12.0 2.0 to 15.0 2.7 to 5.5 1.65 to 5.5 0.9 to 5.5 0.9 to 5.5 0.9 to 5.5

Channel Width 2-Channel 2-Channel 2-Channel 2-Channel

Enable Pin 4 4

Master Side (pF) Bypass 400 400 400

Each Slave Side (pF) Bypass 400 3000 4000 400 Bypass 400 400 550

4 4 4 4 4 4 4

4 4 4 4 4 4

4 4

400 Bypass 50 400 550

2-Channel 2-Channel 2-Channel

4 4 4

Types of I2C translators

No Offset TI Products
VCCA VCCA

Preview products are listed in bold teal.

TCA9406, PCA9306
VCCA SDAA VCCA 3

TCA9517/A, TCA9617A, TCA9509, PCA9515A/B, P82B96

VCCA 6 SDAB 6 VCCB VCCA 7 SDAA SCLA 3 2 6 VCCB VCCB

VCCA

VCCB

Static Offset

SDAA VCCA T1 R1 VCCA 10 k One-Shot VCCA T1 R1 Gate Bias 10 k A T1 One-Shot A T1 One-Shot Gate Bias One-Shot N2 One-Shot T2 B T2 SCLA R1 10 k 2 B VCCB 5 B ISx Pullup Resistor Sx Lx EN One-Shot One-Shot T2 VCCA R1 One-Shot 10 k VCCA T2 SCLA SDAA R1 10 k EN 2 3 VCCB 5

SDAB

SCLB SDAB 6 SDAB 7 SCLB

Pullup Resistor VCCB 4 2 SCLA GND5 EN VCCB 5 Pullup Resistor

I Sx 4 Amplier Lx GND

Pullup Resistor

7 SCLB 4 GND

SCLB

R1 include integrated pull up Note: PCA9306 does not R1 R1 10 k N2 10 k 10 k resistors and one shot circuitry

VCC
A

R1 10 k

TI Products

SCLIN

R2 10 k A 8 VCC Incremental Offset N2 3 2 R1 R2 TCA4311A 10 k 10 k 6 SCLIN VCC 3 7

Gate Bias C1 0.01 F

Gate Bias

R3 10 k

R4 10 k N2 C1 SCLOUT 0.01 F 2

B
2

EN

R3 10 k

R4 10 k SCLOUT VCC

Current Sense 30
2

4 GND ISx

Sx

P82B715

SDAIN VCC R1 10 k SCLIN

SDAIN

SDAOUT C1 C1 0.01 F R1 R2 R3 F k 6 R3 0.01 7 10 k R2 R4 8 10 k 10 8 TCA4311 10 k1 SDAIN 5 10 k 10 k EN Ready 3 2 GND 3 SCLIN 2 SCLOUT 4 TCA4311 1 5 EN GND Ready 4 6 7 6 SDAIN 7 SDAOUT 1 TCA4311 5 EN GND Ready 4 TCA4311 5 GND Ready 4

R4 10 k SDAOUT
GND SCLOUT 2

Sx

Lx

ISx Current Sense 30

2

+ VCC ISx

9 I Sx Current Sense 30
Sx Lx

ISx

9 ISx

I Sx

SDAOUT

VCC

GND VCC +

ISx Current Sense 30 9 I Sx

I Sx

EN

GND

GND

VLOW2 = VLOW1 + 75 mV + (VCC/R) 100

Texas Instruments

I2C Guide 2013

Special Functions
LED Driver
Low-Voltage 7-Bit I2C and SMBus LED Driver TCA6507
The LED driver frees the processed from having to manage the LEDs. It will manage turning the LEDs on and off (per the required dimming rate). This will free up valuable processor time, thus creating a more efficient system.
TPS61052
SW SW AVIN P VOUT C OUT 10 F 1.8 V

VBAT Li-Ion P I2C Interface Flash Synchronization Camera Engine P

L 2.2 H C IN

Key Features Supports brightness control and blink modes at the same time 1.8-V compatible for use with nextgeneration processors Multiple PWMs for multiple blink modes Applications Fun light (decoration) Enhanced feature set Driving RGB LEDs Control function (indicator lights)

TCA6507
VCC P0 P1 P2 P3 EN SCL SDA P4 P5 P6 GND

SCL SDA FLASH_SYNC AGND ENVM

LED

PGND PGND P

Voltage Mode Enable Baseband Engine I2C Interface

White-LED flashlight driver and high-brightness LED indicator/backlight power supply

LED Drivers Selection Guide

Device TLC59108 TLC59108F TLC59208F TLC59116 TLC59116F TCA6507 LM3435 LP5521 LP5523 LP8501 LP3943 Max I2C Frequency (kHz) 1000 1000 1000 1000 1000 400 1000 400 400 400 400 I2C Address 100x xxx 100x xxx Various 110x xxx 110x xxx 1000 101 0101 000 0110 xxx 0110 xxx 0110 010 0110 xxx Max Unique Addresses 14 14 64 14 14 1 1 4 4 1 8 LED Output Channels 8 8 8 16 16 7 3 3 9 9 16 VCC Range (V) 3 - 5.5 3 - 5.5 3 - 5.5 3 - 5.5 3 - 5.5 1.65 - 3.6 2.7 - 5.5 2.7 - 5.5 2.7 - 5.5 2.7 - 5.5 2.3 - 5.5 LED Voltage (Max) (V) 17 17 17 17 17 5.5 5.5 6 6 6 6 LED Output Current (mA) 120 120 50 120 120 40 2000 25.5 25.5 25.5 25 Brightness Control (Bits) 8 8 8 8 8 4 10 8 8 8 8 Ch-Ch Accuracy (Max) (%) 3 N/A N/A 6 N/A N/A 3 2 2.5 2.5 4 4 4 4 4 4 4 4 ConstantCurrent LED Output 4 4 4 Open-drain LED Output

5-V tolerant on the GPIO sides.

I2C Guide 2013

Texas Instruments

I2C Guide
LCD Bias
Fully IC programmable 6 Channel LCD Bias IC TPS65177
The TPS65177 is a fully IC programmable six-channel LCD Bias IC for all television sizes and includes Gate Pulse Modulation. The device provides all supply rails needed by a GIP (Gate-in-Panel) or non-GIP TFT-LCD panel.
VIN 8.6 V...14.7 V
Boost Converter Isolation Switch Buck Converter 1 Buck Converter 2 (Synchronous)

VAVDD 13.5 V...19 V, 2.2 A at 18 V VIO 2.2 V...3.7 V, 2.7 A at 3.3 V VCORE 0.8 V...3.3 V, 2.4 A at 1.2 V VHAVDD 4.8 V...11.1 V, 1 A at 9 V VGH 20 V...40 V, 200 mA VGL -5.5 V-14.5 V, 200 mA

I2C Compatible

Buck Converter 3 (Synchronous) Positive Charge Pump Controller (Temp. Compensated) Negative Charge Pump Controller Gate Pulse Modulation

Key Features Temperature compensation for VGH 40-pin 6x6 mm QFN package Input voltage: 8.6 V to 14.7 V Integrated VAVDD isolation switch Three-bit programmable switch current limit up to 4.25 A Four-bit programmable high voltage stress mode One-bit programmable soft-start 1.7 A switch current limit Four-bit programmable high voltage stress mode Applications GIP (Gate-in-Panel) LCD TVs Non-GIP LCD TVs

TPS65177 block diagram

LCD Bias Selection Guide

Device TPS65168 TPS65177 TPS65178 VIN Boost ILimit Buck ILimit (V) (min) (A) (min) (A) 12 3.5 2.8 12 4.25 3 12 3.5 2.6 Isolation Switch VGH VGL GVS Integrated Controller Controller Integrated Controller Controller Yes Integrated Controller Controller Other IC programmable, 2 buck, temp. compensation, reset Temp compensation, IC, 1 boost, 3 bucks Integrated 6-ch gamma buffer, IC, Vcom, bucks for VHVDD, VCC, VCORE, VEPI, boost for VDD Price* 2.10 1.90 1.90

*Suggested resale price in U.S. dollars in quantities of 1,000.

Single-Wire Interface
Low Voltage 5-Bit Self-Timed, Single-Wire Output Expander TCA5405
The TCA5405 is a 5-bit output expander controlled using a single wire input. This device is ideal for portable applications as it has a wide VCC range of 1.65 V to 3.6 V. The TCA5405 uses a self-timed serial data protocol with a single data input driven by a master device synchronized to an internal clock of that device. During a Setup phase, the bit period is sampled, then the TCA5405 generates its own internal clock synchronized to that of the Master device to sample the input over a five-bit-period Data Transfer phase and writes the bit states on the parallel outputs after the last bit is sampled. The TCA5405 is available in an 8-pin 1.5mm x 1.5mm RUG QFN package.
3.3 V

Master I/O

DIN

TCA5405

Q4 Q3 Q2 Q1 Q0

Key Features Operating power-supply voltage range of 1.65 V to 3.6 V Five independent push-pull outputs Single input (DIN) controls state of all outputs High-current drive outputs maximum capability for directly driving LEDs Latch-up performance exceeds 100 mA per JESD 78, class II ESD protection exceeds JESD 22 2000-V human-body model 1000-V charged-device model Applications Cell phones PDAs Portable media players MP3 players Portable instrumentation
I2C Guide 2013

TCA5405 block diagram

Texas Instruments

I2C Guide

Keypad Controller
Low-Voltage 8x16 Keyboard Scanner with HID over I2C Compliant Interface TCA8424
The TCA8424 keypad controller frees the processor from having to scan the keypad for presses and releases. It is a keypad scan device with 18 GPIOs that can be configured into 8 inputs and 16 outputs to support up to an 8 x 16 keypad array (128 buttons).
C o lu m n s 0 - 7

Key Features Smaller package options Lower power consumption No firmware development Support of 128 keys Applications Smart phones Notebooks GPSs MP3 players Tablets

Non-Volatile Memory
HID Descriptor (30 bytes)

Registers (volatile)
Input Register (8 bytes)

Key scan Logic

Rows 0 - 15

LEDs Report Descriptor (194 bytes) Core Logic and internal registers Interrupt Command Register (2 bytes) SDA Report Ids Usage Codes Function Key Location (32 bytes) I2C buffers and Logic Data Register (2 bytes) SCL

Output Register (1 bytes)

Keyboard map (256 bytes)

TCA8424 simplified block diagram

I2C-Compatible Keypad Controller with GPIO, PWM, and IEC61000 ESD Protection LM8330
The LM8330 I/O Expander and Keypad Controller is a dedicated device designed to unburden a host processor from scanning a matrix-addressed keypad and to provide flexible and general purpose, host programmable input/output functions. Three independent Pulse Width Modulation (PWM) timer outputs are provided for dynamic LED brightness modulation. 1.8 V (typ)
0.1 F (required) SCL SDA Main Processing Device IRQN RESETN Command Interpreter VCC

Key Features Unburden a host processor from scanning a matrix-addressed keypad Ultra-low-power operation No need for external RC passives for ESD Applications Mobile phones Qwerty keyboard Universal remote

LM 8330
ACCESS.bus Internal OSC

DIV

Keypad Matrix

Input/Output Sleep Control

A S IP E S D P rote ction

32 kHz Reference Clock

Key-Scan Control Wake-Up Control Input /Output Expansion PWM Generator ASIP ESD Protection

General Purpose Inputs/Outputs

NOTE: This diagram illustrates IO conguration 3 with IRQN enabled

PWM 0 PWM 1

PWM 2

LM8330 block diagram

I/O Expander and Keypad Controller Selection Guide

Device LM8330 TCA8418 TCA8418E TCA8424 No. of I/Os 20 18 18 24 Max I2C Frequency (kHz) 400 1000 1000 1000 VCC (Min) (V) 1.65 1.65 1.65 1.65 VCC (Max) (V) 3.6 3.6 3.6 3.6 I2C Address Yes; ACCESS.bus 0110 100 0110 100 0111 011 Pin/Package DSBGA-25 WQFN-24 DSBGA-25 VQFN-40
New products are listed in bold red.

I2C Guide 2013

Texas Instruments

Resources

Frequently Asked Questions

Q. Why doesnt the slave device respond to the master after an I2C call is made from the master? A. If the device is not responding properly, there may be an I2C protocol violation. To begin, a proper I2C start condition must be issued. After stop condition, the master must reissue the start condition. After every start condition, the master must send the full slave address. During communication, if the master issues a restart condition, the full slave address must be sent. If the device does not respond with an ACK, it did not recognize the address. Partial data cannot be written to the I/O. To write to the I/O, complete 8-bit data must be sent to the slave. If fewer than 8 bits are sent, the slave will not respond with an ACK and will not update the I/O port. Q. When using I2C I/O expanders, what is the functionality difference between power-on reset and /RESET? (See figure on this page.) Creates the same effect as a power-on reset without power cycling the device. The /RESET input is 5.5-V tolerant (regardless of voltage level on VCCP). Partial data cannot be written to the I/O. To write to the I/O, complete 8-bit data must be sent to the slave. If fewer than 8 bits are sent, the slave will not respond with an ACK and will not update the I/O port. Q. How should an unused /INT pin be terminated? A. /INT is an open-drain output that requires a pull-up resistor for proper operation. If /INT is not used, it can be left open or connected directly to GND.

Q. What is the power-on default for the interrupt (/INT) pin? A. High. Q. How can an /INT be cleared (returned back to high state)? A. Read (clock) the data on the I/O port that generated the /INT. Change the data on the I/O to the original setting. A stop event will clear the /INT. Q. How can a low /INT be avoided at power up in I2C I/O expanders? A. At power up, the P ports are configured as inputs by default. When power up ends and the device has a valid VCC value, the input port (P port) is compared to the internal input register (no clock needed), and /INT goes active (low) unless there is a match. The internal input registers are designed to power up with all ones or high. The /INT should start high at power up if the P port is initially high (all ones) to match the internal input register.

Q. How should an unused /RESET pin be terminated? A. /RESET is an input to the master. It requires a pull-up resistor to VCC if no active connection is used. Q. What is the functionality of the interrupt (/INT) control? A. The /INT is an open-drain output in the I2C slave. It is used to inform the I2C master if any of the inputs in the slave device have changed state. If any of the I/Os configured as inputs change state before the I/O is read (i.e., if a mismatch between the I/O and the contents of the internal input register occurs), /INT will become low. /INT is not affected by I/Os configured as outputs. /INT can be tied to any voltage (or VCC pin) up to 5.5 V through a pull-up resistor.

A. Power-on reset: When power (from 0 V) is applied to the VCC, the internal power- on reset holds the device in a reset condition until VCC reaches Vpor (~1.4 V). Once VCC reaches Vpor, the internal registers and I2C/SMBus state machine are initialized to their default states. After this, the device can be returned to its default reset state if VCC is lowered to 0 V. /RESET: Simply asserting a low on the /RESET input returns the device to its default state.
Texas Instruments

SCL SDA Microprocesor /INT /RESET

I/Os I 2C I/O Expander I/Os

Housekeeping Functions Temperature, fan, audio control Humidity sensors LED status Hardware control monitor Feature Richness

Typical I2C I/O expander applications I2C Guide 2013

Resources

Frequently Asked Questions

Q. What is the power-on default for the P port (I/O port) in an I2C I/O expander? A. For the PCF8574/A, PCF8575 and devices with internal pull-up resistors like the PCA9536, PCA9554, PCA9554A and PCA9555, the input default is high.

Solution No. 1: Using Legacy I2C Devices 1.8 V 1.8 V 2.8 V 2.8 V

Solution No. 2: Using TCA Devices 1.8 V 1.8 V

MicroProcessor

Level Shifter

Legacy I 2C Devices

MicroProcessor

TCA Devices

For the PCF8575C and devices without internal pull-up resistors, the input is 3-state. Q. What is a fun light and what is its purpose? A. Fun lights are any set of lights used for less critical tasks such as: Decoration. Enhancing the feature set of an application. Control functions (such as indicator lights). Fun lights are mostly found on battery-powered portable applications: Notebooks Handsets Consumer portables Portable media players Some example fun-light applications are: Predictive key entry for text messages. Making a smartphone flash to remind the user of an appointment. Providing battery-charging status. Enhancing audio experience through supporting a base.

Q. How should an unused I/O pin in an I2C I/O expander be terminated? A. For devices with internal resistors between VCC and the I/O, such as PCA9555, PCA9536 and PCA9554/A, the I/O can be connected directly to VCC or GND. For devices without internal resistors, a resistor can be used to terminate unused I/Os to VCC or GND.

Q. What are the benefits of using TCA- series devices? (See figure above.) A. Low-voltage operation. TCA- series devices provide a one-chip interface with processors operating at 1.8 V to: Save board costs. Save board space. Provide better inventory management. Wide-voltage operation: Can interface with legacy and next-generation processors. Low power consumption.

10

I2C Guide 2013

Texas Instruments

Resources
Packages
0.037 (0,95) 0.077 (1,95)

0.083 (2,10) 0.126 (3,20)

0.124 (3,15) 0.167 (4,25)

1.55 (1,45)

8-ball WCSP NanoFreeTM package (YZP)

Ball pitch = 0.020 (0,50) Height = 0.020 (0,50) Area = 0.003 (1,85)

8-pin US8/VSSOP (DCU)

Lead pitch = 0.020 (0,50) Height = 0.035 (0,90) Area = 0.010 (6,72)

8-pin SM8/SSOP (DCT)

Lead pitch = 0.026 (0,65) Height = 0.051 (1,30) Area = 0.010 (6,72)

8-pin QFN (RUG)

Lead pitch = 0.020 (0,5) Height = 0.015 (0,37) Area = 2.4025 mm2

0.122 (3,10) 0.199 (5,05)

0.102 (2,60) 0.083 (2,10)

0.081 (2,05)

0.057 (1,45)
0.083 (2,10)

0.083 (2,10)

0.124 (3,15) 0.124 (3,15)

10-pin MSOP (DGS)

Lead pitch = 0.020 (0,50) Height = 0.043 (1,10) Area = 0.024 (15,7)

12-ball UFBGA (ZXU)

Ball pitch = 0.020 (0,50) Height = 0.016 (0,41) Area = 0.008 (5,46)

12-pin QFN (RUE)

Lead pitch = 0.016 (0,40) Height = 0.016 (0,40) Area = 0.005 (2,97)

16-pin CSP (ZSZ)

Lead pitch = 0.50 (0.019685 in) Height = 0.55 (0.02165 in) Area = 4.0 mm2

16-pin QFN (RGT)

Lead pitch = 0.020 (0,50) Height = 0.039 (1,00) Area = 0.015 (9,9)
0.201 (5,10) 0.260 (6,60) 0.260 (6,60)

0.144 (3,65) 0.163 (4,15)

0.146 (3,70) 0.260 (6,60)

0.260 (6,60)

0.122 (3,10) 0.102 (2,60)

16-pin QFN (RGY)

Lead pitch = 0.020 (0,50) Height = 0.039 (1,00) Area = 0.023 (15,1)

16-pin TVSOP (DGV)

Lead pitch = 0.016 (0,40) Height = 0.047 (1,20) Area = 0.038 (24,4)

20-ball VFBGA (ZXY)

Ball pitch = 0.020 (0,50) Height = 0.016 (0,41) Area = 0.012 (8,1)

16-/20-pin TSSOP (PW)

Lead pitch = 0.026 (0,65) Height = 0.047 (1,20) Area (20-pin) = 0.068 (44) Area (16-pin) = 0.052 (33,7)

0.122 (3,10) 0.122 (3,10)

0.163 (4,15) 0.163 (4,15) 0.163 (4,15)

0.163 (4,15)
1.60

24-ball VFBGA (ZQS)

Ball pitch = 0.020 (0,50) Height = 0.030 (0,77) Area = 0.015 (9,61)

24-pin QFN (RGE)

Lead pitch = 0.020 (0,50) Height = 0.039 (1,00) Area = 0.027 (17,2)

24-pin QFN (RTW)

Lead pitch = 0.020 (0,50) Height = 0.032 (0,80) Area = 0.027 (17,2)

25-ball WCSP (YFP)

Lead pitch = 0.016 (0,40) Height = 0.020 (0,50) Area = 4 mm2

0.242 (6,15) 0.242 (6,15)

40-pin QFN (RHA)

Lead pitch = 0.020 (0,50) Height = 0.039 (1,00) Area = 0.059 (37,8)

Texas Instruments

I2C Guide 2013

11

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