WIRELESS BASED POWER LINE BREAKAGE MONITORING

SYNOPSIS

The project designed here is to monitor the breakage in power line and to transmit the condition to main station through wireless communication. The advantage of the project is that it displays the area where there is a break.

The main objective of the project is to reduce the human risk, and also to avoid fatal accidents. This project can be implemented for E.B, telephone lines and cable TV lines. The project will be useful for persons working in above departments, since they can the area where there is a breakage and can attend it easily.

The microcontroller is the main component of the project, the microcontroller use here is P ! "#$%&, the breakage is identified by using power line sensors 'P( &&)*, the status is transmitted through +$ T, 'T(P-))* and received by +$ +, '+(P-))*, a (!. shows the data and the warning bu//er will be glow when the power failure will be occurred.

By proper implementation the project will be very useful for the cabling departments and reduces their work load. This whole process is e0ecuted continuously so that the power line breakage is easily monitored automatically by the microcontroller so there is no need of man1s intervention. n this project microcontroller and sensors are used so the cost of the system is less, the accuracy and reliability is much higher. 2nd also the water wastage is reduced.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

BLOCK DIAGRAM

Transmitter section

RF Transmitter
Microcontro er

LCD Dis% a&

Po'er ine Sensin(

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Po'er Re a&s

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RF Receiver

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WIRELESS BASED POWER LINE BREAKAGE MONITORING

!ircuit diagram
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WIRELESS BASED POWER LINE BREAKAGE MONITORING

Po'er ine comm)nication Po'er ine comm)nication CPLCD, also called %o'er ine carrier, mains comm)nication, %o'er ine te ecom CPLTD, or %o'er ine net'or5in( CPLND, are terms describing several different systems for using electric power lines to carry information over the powerline. Intro6)ction Electrical power is transmitted over high voltage transmission lines, medium voltage distribution, and inside buildings at lower voltages. Powerline communications can be applied at each stage. 4ost P(! technologies limit themselves to one particular set of wires Cfor e0ample, premises wiringD, but some systems can cross between two levels Cfor e0ample, both the distribution network and premises wiringD. 2ll power line communications systems operate by impressing a modulated carrier signal on the wiring system. .ifferent types of powerline communications use different freGuency bands, depending on the signal transmission characteristics of the power wiring used. Aince the power wiring system was originally intended for transmission of 2! power, the power wire circuits have only a limited ability to carry higher freGuencies. The propagation problem is a limiting factor for each type of power line communications. .ata rates over a power line communication system vary widely. (ow?freGuency Cabout "33?&33 k>/D carriers impressed on high?voltage transmission lines may carry one or two analog voice circuits, or telemetry and control circuits with an eGuivalent data rate of a few hundred bits per secondH however, these circuits may be many miles CkilometresD long. >igher data rates generally imply shorter rangesH a local area network operating at millions of bits per second may only cover one floor of an office building, but eliminates installation of dedicated network cabling. 1i(3 Fre7)enc& Comm)nication 89:M1*; >igh freGuency communication may CreDuse large portions of the radio spectrum for communication, or may use select CnarrowD bandCsD, depending on the technology. 1ome net'or5in( Power line communications can also be used to interconnect home computers, peripherals or other networked consumer peripherals, although at present there is no universal standard for this type of application. Atandards for power line home networking have been developed by a number of different companies within the framework of the >omePlug Powerline 2lliance and the 7niversal Powerline 2ssociation. O%eration Aince the signals may travel a short distance outside the userIs residence or business, like many other network standards, >omePlug includes the ability to set an encryption

WIRELESS BASED POWER LINE BREAKAGE MONITORING

password. 2s with many other networking products, most >omePlug devices are Aecure by default. The >omePlug standards reGuire that all devices are set to a default out?of?bo0 password ? although a common one. 7sers should change this password. To simplify the process of configuring passwords on a >omePlug network, each device has a built?in master password, chosen at random by the manufacturer and hard?wired into the device, which is used only for setting the encryption passwords. 2 printed label on the device lists its master password. The data at either end of the >omePlug link is not encrypted Cunless an encrypted higher?layer protocol such as T(A or PAE! being usedD, only the link between >omePlug devices is encrypted. Aince >omePlug devices typically function as transparent network bridges, computers running any operating system can use them for network access. >owever, some manufacturers only supply the password?setup software in a 4icrosoft Eindows versionH in other words, enabling encryption reGuires a computer running Eindows '"*. 6nce the encryption password has been configured, Eindows will no longer be needed, so in the case of a network where all computers run other systems a borrowed laptop could be used for initial setup purposes. n residences and small businesses with Aplit phase wiring Ccommon in 5orth 2mericaD, roughly half the "&3?volt outlets in the building will be on each hot phase, and >omePlug signals may or may not be able to get from one side to the other. f one is unlucky, this may prevent some rooms from being connected via >omePlug. 2mong other things, >omePlug brings back the ability to use Ethernet in bus topology, implied by its standard description Ccarrier sense multiple access and collision detectionD and very desirable in some circumstances. This is achieved by use of advanced 6$.4 modulation that allows co?e0istence of several distinct data carriers in the same wire. The use of 6$.4 also allows turning off CmaskingD one or more of the sub?carriers which overlap previously allocated radio spectrum in a given geographic region. n 5orth 2merica, for instance, >omePlug 2V only uses <"% of "";; sub? carriers.'"* Transmittin( ra6io %ro(rams Aometimes P(! was and is used for transmitting radio programs over powerlines. Ehen operated in the 24 radio band, it is known as a carrier current system. Auch devices were in use in 8ermany, where it was called J.rahtfunkJ and in Awit/erland, where it was called JTelefonrundspruchJ and used telephone lines. n the 7AA+ P(! was very common for broadcasting, because P(! listeners cannot receive foreign transmissions. n 5orway the radiation of P(! systems from powerlines was sometimes used for radio supply. These facilities were called (injesender. n all cases the radio programme was fed by special transformers into the lines. n order to prevent uncontrolled propagation, filters for the carrier freGuencies of the P(! systems were installed in substations and at line branches.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

2n e0ample of the programs carried by Jwire broadcastingJ in Awit/erlandK

"%; k>/ Awiss +adio nternational &3: k>/ +A+" Lla premiMreN C$renchD &-" k>/ Lclassical musicN &%- k>/ +A " Lrete 75N C talianD )3% k>/ .+A" C8ermanD )-3 k>/ Leasy musicN

<ti it& a%% ications 7tility companies use special coupling capacitors to connect medium?freGuency radio transmitters to the power?freGuency 2! conductors. $reGuencies used are in the range of &- to ;33 k>/, with transmitter power levels up to hundreds of watts. These signals may be impressed on one conductor, on two conductors or on all three conductors of a high?voltage 2! transmission line. Aeveral different P(! channels may be coupled onto one >V line. $iltering devices are applied at substations to prevent the carrier freGuency current from being bypassed through the station apparatus and to ensure that distant faults do not affect the isolated segments of the P(! system. These circuits are used for control of switchgear, and for protection of transmission lines. $or e0ample, a protection relay can use a P(! channel to trip a line if a fault is detected between its two terminals, but to leave the line in operation if the fault is elsewhere on the system. Ehile utility companies use microwave and now, increasingly, fiber optic cables for their primary system communication needs, the power?line carrier apparatus may still be useful as a backup channel or for very simple low?cost installations that do not warrant a fibre drop. Lo' Fre7)enc& 8=51*; <ti it& Auch systems have long been a favorite at many utilities because it allows them to move large amounts of data over an infrastructure that they control. 4any technologies are capable of performing multiple applications. $or e0ample, a communication system bought initially for automatic meter reading can sometimes also be used for load control or for demand response applications. A)tomatic meter rea6in( P(! is one of the technologies used in the 2utomatic 4eter +eading industry. Both one? way and two?way systems have been successfully used for decades. nterest in this application has grown substantially in recent history ?? not so much because there is an interest in automating a manual process, but because there is an interest in obtaining fresh data from all metered points in order to better control and operate the system.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

n a one?way Cinbound onlyD system, readings Jbubble upJ from end devices Ci.e. metersD, through the communication infrastructure, to a Jmaster stationJ which publishes the readings. 2 one?way system might be lower?cost than a two?way system, but also is difficult to reconfigure should the operating environment change. n a two?way system Csupporting both outbound and inboundD, commands can be broadcast out from the master station to end devices CmetersD ?? allowing for reconfiguration of the network, or to obtain readings, or to convey messages, etc. The device at the end of the network may then respond CinboundD with a message that carries the desired value.

Loa6 contro 6utbound messages injected at a utility substation will propagate to all points downstream. This type of broadcast allows the communication system to simultaneously reach many thousands of devices ?? all of which are known to have power, and have been previously identified as candidates for load shed. Tec3no o(& Technology is available from designs based on a number of different non?compatible silicon vendors. 1i(3 Fre7)enc& These include ntellonIs 5T#333 silicon which meets the >omePlug 2V specification Cnot interoperable with >omePlug ".3 or ntellonIs proprietary :; 4bit=s Turbo modeD or .A& .AA<,,, series silicon which complies with 7niversal Powerline 2ssociation standardsH and other solutions from Panasonic and Ai!onnect. Aome solutions are based on 6$.4 modulation with ";)# carriers and T.. or $.. channel access method. .A& silicon may operate between " and )- 4>/. t provides a high dynamic range C<3 dBD and offers freGuency division and time division repeating capabilities. These characteristics allow the implementation of Guality of service CBoAD and class of service C!oAD capabilities. Technologies deliver speeds of up to &33 4bit=s at the physical layer and ")3 4bit=s at the application layer although actual throughput rates are degraded by the attenuation and the level of noise. Me6i)m Fre7)enc& The technology to communicate over a transmission line has been largely standardi/ed by EEE Atd #-). Aystems built to this standard are available from commercial vendors. Lo' Fre7)enc& Entire systems are available from commercial vendors.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

LCD DISPLAY

INTROD<CTION (!. stands for liGuid crystalH this is a output device with a limited viewing angle. The choice of (!. as an output device was Because of its cost of use and is better with alphabets when compared with a %?segment (E. display. Ee have so many kinds of (!. today and our application reGuires a (!. with & lines and "# characters per line, this gets data from the microcontroller and displays the same. t has : data lines, ) control line, a supply voltage Vcc C@;v and a 85.. This makes the whole device user friendly by showing the balance left in the card. This also shoes the card that is currently being used. n recent years the (!. is finding widespread use replacing (E.1s. This is due to the following reasonsK ". The declining prices of (!.1s. &. The ability to display numbers, characters and graphics. This is in contrast to (E.1s, which are limited to numbers and few characters. ). ncorporation of a refreshing controller into the (!., there by relieving the !P7 of the task of refreshing the (!. .in contrast, the (ed must be refreshed by the !P7 to keep displaying the data. -. Ease of programming for characters and graphics. LCD PIN DESCRIPTIONS -CC> -SS an6 -EE Ehile V!! and VAA provide @;v and ground respectively, VEE is used for controlling (!. contrast. RS> REGISTER SELECT There are two very important registers inside the (!.. The +A pin used for their selection as follows. f +AO3, the instruction command code register is selected, allowing the user to sent a command such as clear display, cursor at home ,etc . $ +AO" the data register is selected, allowing the user to sent data to be displayed on the (!.. R0W READ0WRITE +=E input allows the user to write information to the (!. or read information from it. +=EO" when readingH +=EO3 when writing. E> ENABLE The enable pin is used by the (!. to latch information present to its data pins. Ehen data is supplied to data pins, a high to low pulse must be applied to this pin in order for the (!. to latch in the data present at the data pins. This pulse must be a minimum of -;3ns wide.

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WIRELESS BASED POWER LINE BREAKAGE MONITORING

The :?bit data pins, .3?.%, are used to sent information to (!. or read the contents of the (!.1s internal registers. To display letters and numbers, we send 2A! numbers 3?< to these pins while making +AO". codes for the letters 2?F, a?/, and

There are also instruction command codes that can be send to the (!. to clear the display or force the cursor to the home position or blink the cursor. Ee also use +AO3 to check the busy flag bit see if the (!. is ready to receive information. The busy flag is .% and can be read when +=EO" and +AO3, as follows, if +=EO" ,+AO3. Ehen .%O", The (!. is busy taking care of internal operations and will not accept any new information. when .%O3, the (!. is ready to receive new information. LCD COMMAND CODES " & # ; % : 2 ! E $ "3 "": "! :3 !3 ): LCD PANEL !lear display screen +eturn home .ecrement cursor ncrement cursor Ahift display right Ahift display left .isplay off, cursor off .isplay off, cursor on .isplay on, cursor off .isplay on, cursor blinking .isplay on, cursor blinking Ahift cursor position to left Ahift cursor position to right Ahift the entire display to the left Ahift the entire display to the right $orce cursor to beginning of the "st line $orce cursor to beginning of the &nd line & lines and &P% matri0

A !"@$ Li7)i6 Cr&sta Dis% a& LCD PROGRAMMING C1ARTA

WIRELESS BASED POWER LINE BREAKAGE MONITORING

WIRELESS BASED POWER LINE BREAKAGE MONITORING

LCD CIRC<IT DIAGRAM

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WIRELESS BASED POWER LINE BREAKAGE MONITORING

4?BIT INTERFACED

The (!. reGuires either : or "" =6 lines to communicate with. $or the sake of this tutorial, we are going to use an :?bit data bus??so weIll be using "" of the :3;"Is =6 pins to interface with the (!..

The E5 line is used to tell the (!. that you are ready for it to e0ecute an instruction that youIve prepared on the data bus and on the other control lines. 5ote that the E5 line must be raised=lowered before=after each instruction sent to the (!. regardless of whether that instruction is read or write, te0t or instruction. n short, you must always manipulate E5 when communicating with the (!.. E5 is the (!.Is way of knowing that you are talking to it. f you donIt raise=lower E5, the (!. doesnIt know youIre talking to it on the other lines.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

C1ARACTER SET

!haracter set for ;0% dot font

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WIRELESS BASED POWER LINE BREAKAGE MONITORING

PROGRAMMING T1E LCDA Before you may really use the (!., you must initiali/e and configure it. This is accomplished by sending a number of initiali/ation instructions to the (!.. The first instruction we send must tell the (!. whether weIll be communicating with it with an :? bit or -?bit data bus. Ee also select a ;0: dot character font. These two options are selected by sending the command ):h to the (!. as a command. 2s you will recall from the last section, we mentioned that the RS line must be low if we are sending a command to the (!.. The second byte of the initiali/ation seGuence is the instruction 3Eh. Thus we must repeat the initiali/ation code from above, but now with the instruction. Thus the the ne0t code segment isK The last byte we need to send is used to configure additional operational parameters of the (!.. Ee must send the value 3#h. Thus, the first character in the upper left?hanad corner is at address 33h. The following character position Ccharacter Q& on the first lineD is address 3"h, etc. This continues until we reach the "#th character of the first line which is at address 3$h. >owever, the first character of line &, as shown in the memory map, is at address -3h. This means if we write a character to the last position of the first line and then write a second character, the second character will not appear on the second line. That is because the second character will effectively be written to address "3h??but the second line begins at address -3h. Thus we need to send a command to the (!. that tells it to position the cursor on the second line. The JAet !ursor PositionJ instruction is :3h. To this we must add the address of the location where we wish to position the cursor.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

POWER S<PPLY

2vailable power source is an 2c voltage arrives at &)3V.Aince our electronic circuits reGuire only very minimal voltage and current we use step down power transformer. Atep down transformer is designed in such a way that the input is &)3V and output of "&V. 2nother thing is, that electronic circuits operate in .! where as available output of transformer is 2c of "&V. Ao rectifier circuit is used to convert 2! to .!. +ectifier circuit consists of four diodes formed in bridge fashion so as to convert incoming 2! to .!. Even though output of rectifier circuit is .! it is not smooth or fi0ed .!. Ao filter circuits are used to convert rippling .! to smooth .!. The filter circuit is a capacitor, connected parallel to the output of rectifier circuit. This smooth .! voltage will be in the range of "&@volt. But we reGuire only ;V supply for the operation of micro controllers and it1s supporting components. >ere again regulator !s such as %:3; is used to regulate the incoming "&V.! to fi0ed regulated ;V as output. This .! regulated ;V is applied to the circuits. Even though the circuit is functioning with ;V, the relays are driven by #V or "&V. $or this purpose %:3#=%:"& regulator ! is additionally connected to the rectifier filter circuit. Thus "&V regulated is used for driving "&V relays.

V6(T28E +E87(2T6+A
T1REE?TERMINAL REG<LATORS

$or most no critical applications the best choice for a voltage regulator is the simple Rterminal type. t has only three connections Cinput, output, and groundD and is factory?trimmed to provide a fi0ed output. Typical of this type is the %:00. The voltage is specified by the last two digits of the part number and can be any of the followingK 3;, 3:,"3, "&, ";,":, or &-. t is to make a @; volt regulator, for instance, with one of these regulators. The capacitor across the output improves transient response and keeps the impedance low at high freGuencies Can input capacitor of at least 3.)) $ should be used in addition if the regulator is located a considerable distance from the filter capacitorsD. The %:33 series is available in plastic or metal power packages Csame as power transistorsD. 2 low?power version, the %:(00, comes in the same plastic and metal packages as small?signal transistors. The %<33 series of negative regulators works the same way Cwith negative input voltage, of courseD. The %:33 series can provide up to " amp load current and has on?chip circuitry to prevent damage in the event of overheating or e0cessive load currentH the chip simply shuts down, rather than blowing out. n addition, on?chip circuitry prevents operation outside the

WIRELESS BASED POWER LINE BREAKAGE MONITORING

Transistor safe operating area by reducing available output current for large input?output voltage differential. These regulators are in?e0pensive and easy to use, and they make it practical to design a system with many printed?circuit boards in which the unregulated dc is brought to each board and regulation is done locally on each circuit card. Three ? terminal fi0ed regulators come in some highly useful variants. The (P &<;3 works just like a %:3;, but draws only %; 2 of Guiescent current Ccompared with the %:3;1s ;m2 or the %:(3;1s )m2DH it also regulates with as little as a 3.- volt drop from unregulated input to regulated output Ccalled the Ldrop out voltageND, compared with & volts drop out for the classic %:3;. The (4&<" is also low?dropout, but you might call it milli power C3.-m2 Guiescent currentD, compared with the Lmicro powerN (P &<;3. (ow?dropout regulators also come in high R current versions for e0ample, the (T "3:;=-=) series from (T! C2, ;2, and %.;2, respectively, with both @ ;V and @ "&V available in each typeD. +egulators like the (4 &<:- are basically three?terminal fi0ed regulators, but with e0tra outputs to signal a microprocessor that power has failed, or resumed. $inally, regulators like the -"<; contain a pair of )?terminal ";?volt regulators, one positive and one negative.

LM#BEE Series -o ta(e Re() ators

GENERAL DESCRIPTION
The (4%:00 series of three terminal regulators is available with several fi0ed output voltages making them useful in a wide range of applications. 6ne of these is local on card regulation, eliminating the distribution problems associated with single point regulation. The voltages available allow these regulators to be used in logic systems, instrumentation, >i$i, and other solid?state electronic eGuipment. 2lthough designed primarily as fi0ed voltage regulators these devices can be used with e0ternal components to obtain adjustable voltages and currents. The (4%:,, series is available in an aluminum T6?) package which will allow over ".32 load current if adeGuate heat sinking is provided. !urrent limiting is included to limit the peak output current to a safe value. Aafe area protection for the output transistor is provided to limit internal power dissipation. f internal power dissipation becomes too high for the heat sinking provided, the thermal shutdown circuit takes over preventing the ! from overheating. !onsiderable effort was e0panded to make the (4%:,, series of regulators easy to use and minimi/e the number of e0ternal components. t is not necessary to bypass the output, although this does improve transient response. nput by?passing is needed only if the regulator is located far from the filter capacitor of the power supply.

Feat)res
6utput current in e0cess of "2 nternal thermal overload protection 5o e0ternal components reGuired 6utput transistor safe area protection nternal short circuit current limit 2vailable in the aluminum T6?) package

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INTROD<CTION TO RFID +adio $reGuency dentification C+$ .D is a generic term that is used to describe a system that transmits the identity Cin the form of a uniGue serial numberD of an object or person wirelessly, using radio waves. tIs grouped under the broad category of automatic identification technologies. 2uto?Video . technologies include bar codes, optical character readers and some biometric technologies, such as retinal scans. The auto? . technologies have been used to reduce the amount of time and labor needed to input data manually and to improve data accuracy. The auto?Video . technologies, such as bar code systems, often reGuire a person to manually scan a label or tag to capture the data. +$ . is designed to enable readers to capture data on tags and transmit it to a computer system without needing a person to be involved. +$ ., the technology of tomorrow, is here today. n fact, over a billion tags are in use worldwide, yielding benefits from livestock tracking to vehicle immobili/ation. This is such a huge number that it makes one Guestion calling +$ . an emerging technology. n the most basic level, it identifies uniGue objects, processes, transactions or events. +$ . does this by using a burst of radio waves to move information, much like carrier pigeons were used to move information from point to point centuries ago. t is possible to e0plain +$ .

WIRELESS BASED POWER LINE BREAKAGE MONITORING

using only two basic building blocks ? 2 Tag and a +eader. 6f course, they may be configured in sophisticated ways to create large networks capable of staggering data flows. 2 uniGue serial number is stored on a microchip that is the si/e of the period at the end of this sentence. 2 tiny antenna is also attached to the microchip. Together, the chip and antenna are called a tag. Typical tags range in si/e from a stamp to a credit card. The built?in antenna allows the tag to receive information from a device called a reader. Ehen commanded by the reader the tag transmits information over the air using radio waves. The reader then converts the radio waves from the tag into digital information thatIs forwarded to a down stream computer. +$ . C+adio $reGuency dentificationD systems include electronic devices called tags which essentially consist of a microchip, memory and an antenna. 4icrochips are the brains for the Tags. nformation which is sent or received from the radio waves is then stored or recalled from the memory. The antenna has only one task to doH however, that task has a direction. t handles communication from either the Tag to the +eader or from the +eader to the Tag. Think of the antenna as a language translator converting digital data into radio wave energy or vice?versa. RADIO FREF<ENCY +adio $reGuency C+$D, any freGuency within the electromagnetic spectrum associated with radio wave propagation. Ehen an +$ current is supplied to an antenna, an electromagnetic field is created that then is able to propagate through space. 4any wireless technologies are based on +$ field propagation. These freGuencies make up part of the electromagnetic radiation spectrumK
7ltra?low freGuency C7($D ?? 3?) >/ E0tremely low freGuency CE($D ?? ) >/ ? ) k>/ Very low freGuency CV($D ?? )k>/ ? )3 k>/ (ow freGuency C($D ?? )3 k>/ ? )33 k>/ 4edium freGuency C4$D ?? )33 k>/ ? ) 4>/ >igh freGuency C>$D ?? )4>/ ? )3 4>/ Very high freGuency CV>$D ?? )3 4>/ ? )33 4>/ 7ltra?high freGuency C7>$D?? )334>/ ? ) 8>/ Auper high freGuency CA>$D ?? )8>/ ? )3 8>/ E0tremely high freGuency CE>$D ?? )38>/ ? )33 8>/

AD-ANTAGES OF RADIO WA-ES The big advantages of radio waves are their ability to penetrate hard surfaces at ama/ing

WIRELESS BASED POWER LINE BREAKAGE MONITORING

speed. 2 radio wave travels around the earth % times in one second making it a very cost effective and capable information carrier. 2 Tag physically attaches to something thereby allowing its location, condition or status to be tracked via information sent using radio waves. .ecoding of a Tag occurs when it enters the antennas read /one. 2 read /one can be defined as the sweet spot of the antenna where radio waves may be sent and received in such a way that reliable communications take place between the Tag and the +eader. To further harden the communications on the radio link clever algorithms are able to resend or even repair damaged information. +$ . C+adio $reGuency dentification ')";, -": and -)).<&4>/*D tags come in a wide variety of si/es, shapes and forms but have common attributes, such asK low?energy transmits and receives antennas, data storage and operating circuitry. Tags come with and without batteriesH they can be read only or read=write. Typically, tags without batteries CpassiveD are smaller and lighter than those that are active Cwith batteriesD, and less e0pensive. Ehen multiple tags are present in the antennaIs sweet spot the +eader uses special ways to handle this work load. t tells tags to go to sleep and, therefore, talks to one at a time. 6nce data is sent by Tags and captured by the +eader, it is transferred through standard interfaces to a host computer, printer, database or programmable logic controller for storage or action. +eader electronics may be stationary or handheld. They are linked to other software systems that control the flow of data. n some cases the readers must power, engage, download and retransmit data to the tag they encounter.

COMPONENTS OF RFID 2n +$ . C+adio $reGuency dentificationD system is always made up of two componentsK the transponder, which is located on the object to be identified, The detector or reader, which, depending upon design and the technology used, may be a read or write=read device.

$ 8."." +E2.E+ 25. T>E T+25AP65.E+?T>E 42 5 !64P65E5TA 6$ +$ . ASATE4

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2 reader typically contains a high freGuency module Ctransmitter and receiverD, a control unit and a coupling element to the transponder. n addition, many readers are fitted with an additional interface C+A &)&, +A -:;D to enable it to forward the data received to another system CP!, robot control systemD. The main components of +$ . C+adio $reGuency dentificationD system are as shown in the fig."." The transponder, which represents the actual data carrying device of an +$ . system, normally consists of a coupling element and an electronic microchip. Ehen the transponder, which does not usually possess its own voltage supply CbatteryD, is not within the response range of a reader it is totally passive. The transponder is only activated when it is within the response range of a reader. The power reGuired to activate the transponder is supplied to the transponder through the coupling unit Ccontact lessD as is the timing pulse and data. OPERATING PRINCIPLES OF RFID SYSTEMS There is a huge variety of different operating principles for RFID (Radio Frequency Identification) systems.

Inductive Coupling An inductively coupled transponder comprises of an electronic data carrying device, usually a single microchip and a large area coil that functions as an antenna. Inductively coupled transponders are almost al ays operated passively. This means that all the energy needed for the operation of the microchip has to !e provided !y the reader. For this purpose, the reader"s antenna coil generates a strong, high frequency electro#magnetic field, hich penetrates the cross#section of the coil area and the area around the coil. $ecause the avelength of the frequency range used (% &'( )*+, -.// m, &'.(0 1*+, --.& m) is several times greater than the distance !et een the reader"s antenna and the transponder, the electro#magnetic field may !e treated as a simple magnetic alternating field ith regard to the distance !et een transponder and antenna. A small part of the emitted field penetrates the antenna coil of the transponder, hich is some distance a ay from the coil of the reader. $y induction, a voltage 2 i is generated in the transponder"s antenna coil. This voltage is rectified and serves as the po er supply for the data carrying device (microchip). A capacitor 3& is connected in parallel ith the reader"s antenna coil, the capacitance of hich is selected such that it com!ines ith the coil inductance of the antenna coil to form a parallel resonant circuit, ith a resonant frequency that corresponds ith the transmission frequency of the reader. 2ery high currents are generated in the antenna coil of the reader !y resonance step#up in the parallel resonant circuit, hich can !e used to generate the required field strengths for the operation of the remote transponder.

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The antenna coil of the transponder and the capacitor 3& to form a resonant circuit tuned to the transmission frequency of the reader. The voltage 2 at the transponder coil reaches a ma4imum due to resonance step#up in the parallel resonant circuit. The inductive coupling of transponder and the reader as sho n in fig.&.-.

$ 8.".&. 5.7!T VE !67P( 58 6$ T+25AP65.E+ 25. T>E +E2.E+ The inductively coupled systems are based upon a transformer?type coupling between the primary coil in the reader and the secondary coil in the transponder. This is true when the distance between the coils does not e0ceed 3."#T, so that the transponder is located in the near field of the transmitter antenna. Ehen a resonant transponder Ci.e. the self?resonant freGuency of the transponder corresponds with the transmission freGuency of the readerD is placed within the magnetic alternating field of the readerIs antenna, then this draws energy from the magnetic field. This additional power consumption can be measured as voltage drop at the internal resistance in the reader antennae through the supply current to the readerIs antenna. The switching on and off of a load resistance at the transponderIs antenna therefore effects voltage changes at the readerIs antenna and thus has the effect of an amplitude modulation of the antenna voltage by the remote transponder. f the switching on and off of the load resistor is controlled by data, then this data can be transferred from the transponder to the reader. This type of data transfer is called load modulation. The data in the reader can be reclaimed by rectifying the voltage measured at the readerIs antenna. This represents the demodulation of an amplitude modulated signal. f the additional load resistor in the transponder is switched on and off at a very high elementary freGuency f>C>igh $reGuencyD, then two spectral lines are created at a distance of Uf> around the transmission freGuency of the reader, and these can be easily detected Chowever f> must be less than f+E2.E+D. n the terminology of radio technology the new elementary freGuency is called a sub carrier. .ata transfer is by the 2A9 C2mplitude Ahift 9eyingD, $A9 C$reGuency Ahift 9eyingD or PA9 CPhase Ahift 9eyingD modulation of the sub carrier in time with the data flow. This represents an amplitude modulation of the sub carrier.

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Backscatter Coupling t is known that from the field of +2.2+ technology that electromagnetic waves are reflected by objects with dimensions greater than around half the wavelength of the wave. The efficiency with which an object reflects electromagnetic waves is described by its reflection cross?section. 6bjects that are in resonance with the wave front that hits them, as is the case for antenna at the appropriate freGuency for e0ample, have a particularly large reflection cross?section. The operating principle of a backscatter transponder as shown in fig.".).

$ 8.".). 6PE+2T 65 P+ 5! P(E 6$ 2 B2!9A!2TTE+ T+25AP65.E+ Power P" is emitted from the readerIs antenna, a small proportion of which Cfree space attenuationD reaches the transponderIs antenna. The power P"I is supplied to the antenna connections as >igh $reGuencyC>$D voltage and after rectification by the diodes ." and .& this can be used as turn on voltage for the deactivation or activation of the power saving Jpower?downJ mode. The diodes used here are low barrier Achottky diodes, which have a particularly low threshold voltage. The voltage obtained may also be sufficient to serve as a power supply for short ranges. 2 proportion of the incoming power P"I is reflected by the antenna and returned as power P&. The reflection characteristics CO reflection cross?sectionD of the antenna can be influenced by altering the load connected to the antenna. n order to transmit data from the transponder to the reader, a load resistor +( connected in parallel with the antenna is switched on and off in time with the data stream to be transmitted. The amplitude of the power P& reflected from the transponder can thus be modulated CV modulated backscatterD. The power P& reflected from the transponder is radiated into free space. 2 small proportion of this Cfree space attenuationD is picked up by the readerIs antenna. The reflected signal therefore travels into the antenna connection of the reader in the Jbackwards directionJ and can be decoupled using a directional coupler and transferred to the receiver input of a reader. The JforwardJ signal of the transmitter, which is stronger by powers of ten, is to a large degree suppressed by the directional coupler.

WIRELESS BASED POWER LINE BREAKAGE MONITORING

The ratio of power transmitted by the reader and power returning from the transponder CP" = P&D can be estimated using the radar eGuation. RFID vsD BAR CODE +$ .1s C+adio $reGuency dentificationD benefits this blog compares its capabilities to an e0isting industry standard, the Bar !ode. Pundits for the technology claim that +$ . will eventually replace the bar code. By understanding how +$ . compares to bar codes you will gain an appreciation for its potential while learning more about how it works. P3&sica Si*e Tags range in si/e from a postage stamp to a book. The aspect ratio of a TagIs length vs. width is very fle0ible and not a significant factor for the +eader. Bar codes are larger than the smallest tag and very sensitive to the aspect ratio for presentation to a scanner. The ratio of a bar codeIs length vs. width is critical to its operation. LiGes%an Tags have no moving parts and are embedded in protective material for an indestructible case and multi?year lifespan. Bar !odes have unlimited self life but are subject to degradation with handling. 1ars3 Environments Tags may be placed in e0treme environments and perform to specification. They are very robust to handling, sensitive to environment, and generally degrade once used, stored or handled in a non?office environment. Pro6)ct Co6e .igital data is stored on the Tag and provides for a significant capability to encodeK "D Tag originator &D 7ser data as needed by the segment or application )D Aerial number as needed by the segment=application 4ajor vertical markets like +etail have standards which are e0cellent at coding product type and manufacturer. 2dditional information beyond these basic parameters is not feasible because the si/e of the Bar !ode CB!D becomes too large. Co)nterGeitin( Tags are produced with a 7niGue dentity !ode C7 !D or serial number from the manufacturer. This is embedded digitally on the microchip and may not be changed,

WIRELESS BASED POWER LINE BREAKAGE MONITORING

therefore, making them e0tremely resistant to counterfeiting. Bar !odes may easily be duplicated and attached to products and are, therefore, easily counterfeited. D&namic <%6ates Tags may be written to and offer on board memory to retain information. This feature may be used to store a product calibration history, preventive maintenance, etc. 7pdates may be made within the blink of an eye and automatically without human intervention. 6nce a Bar !ode is printed it remains fro/en. The !ode and the process of attaching the B! are not supportive of real time updates. t is a labor intensive process to update any information on a Bar !ode CB!D once printed. TraceaH e The combination of 7 ! C7niGue dentification !odeD, user data, serial number and on?board memory makes it possible to track, recall, or document the life span of a single item. $or e0ample, with livestock this means that the birthplace of the animal, its vaccine history, feed lots, slaughter house, processor, etc may all be tracked. This kind of information supports a complete pedigree for an item attached to the Tag. B! is limited to an entire class of products and unable to drill down to a uniGue item. t is not feasible to recall, track or document a single item. Scannin( +$ . C+adio $reGuency dentificationD offers a range from inches to hundreds of feet and does not reGuire line of sight. This means that individual Tags placed within a carton, packed in a bo0 and stored on a pallet may be read. Sou do not have to open each bo0 and present the individual item. B! CBar !odeD ? 6ffers a range over inches and reGuires line of sight to read the code. The Bar !ode must be presented to the scanner in an orientation and distance that is very limited. ndividual reading reGuires that each bo0 on a pallet be opened and the item pulled for presentation to the scanner. Sim) taneo)s Scannin( +$ . C+adio $reGuency dentificationD ? Atandards have algorithms to support simultaneous reading of Tags at one time. B! CBar !odeD ? (imited to one bar code at a time. 7nable to support simultaneous reads.

Re)saH e +$ . ? Ses

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B! ? 5o $rom this comparison it is clear that +$ . is capable to greatly amplify the benefits received from traditional bar coding. By eliminating the manual task of reading a bar code, +$ . automates data entry. This permits new ways of processing items, events or transactions.

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Intro6)ction The high performance of the P !micro devices can be attributed to a number of architectural features commonly found in + A! microprocessors. These includeK W >arvard architecture W (ong Eord nstructions W Aingle Eord nstructions W Aingle !ycle nstructions W nstruction Pipelining W +educed nstruction Aet W +egister $ile 2rchitecture W 6rthogonal CAymmetricD nstructions $igure shows a simple core memory bus arrangement for 4id?+ange 4!7 devices.

1arvar6 Arc3itect)reA >arvard architecture has the program memory and data memory as separate memories and is accessed from separate buses. This improves bandwidth over traditional von 5eumann architecture in which program and data are fetched from the same memory using the same bus. To e0ecute an instruction, a von 5eumann machine must make one or more Cgenerally moreD accesses across the :?bit bus to fetch the instruction. Then data may need to be fetched, operated on, and possibly written. 2s can be seen from this description, that bus can be e0tremely congested. Ehile with >arvard architecture, the instruction is fetched in a single instruction cycle Call "-?bitsD.Ehile the program memory is being accessed, the data memory is on an independent bus and can be read and written. These separated buses allow one instruction to e0ecute while the ne0t instruction is fetched. 2 comparison of >arvard vs. von? 5eumann architectures is shown in $igure.

1arvar6 vsD von Ne)mann B oc5 Arc3itect)res

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Lon( Wor6 Instr)ctionsA (ong word instructions have a wider Cmore bitsD instruction bus than the :?bit .ata 4emory Bus.This is possible because the two buses are separate. This further allows instructions to be si/ed differently than the :?bit wide data word which allows a more efficient use of the program memory,since the program memory width is optimi/ed to the architectural reGuirements.

Sin( e Wor6 Instr)ctionsA Aingle Eord instruction opcodes are "-?bits wide making it possible to have all single word instructions. 2 "-?bit wide program memory access bus fetches a "-?bit instruction in a single cycle. Eith single word instructions, the number of words of program memory locations eGuals the number of instructions for the device. This means that all locations are valid instructions.Typically in the von 5eumann architecture, most instructions are multi?byte. n general, a device with -?9Bytes of program memory would allow appro0imately &9 of instructions. This &K" ratio is generali/ed and dependent on the application code. Aince each instruction may take multiple bytes, there is no assurance that each location is a valid instruction.

Lon( Wor6 Instr)ctionsA (ong word instructions have a wider Cmore bitsD instruction bus than the :?bit .ata 4emory Bus.This is possible because the two buses are separate. This further allows instructions to be si/ed differently than the :?bit wide data word which allows a more efficient use of the program memory, since the program memory width is optimi/ed to the architectural reGuirements.

Sin( e Wor6 Instr)ctionsA

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Aingle Eord instruction opcodes are "-?bits wide making it possible to have all single word instructions. 2 "-?bit wide program memory access bus fetches a "-?bit instruction in a single cycle. Eith single word instructions, the number of words of program memory locations eGuals the number of instructions for the device. This means that all locations are valid instructions.Typically in the von 5eumann architecture, most instructions are multi?byte. n general, a device with -?9Bytes of program memory would allow appro0imately &9 of instructions. This &K" ratio is generali/ed and dependent on the application code. Aince each instruction may take multiple bytes, there is no assurance that each location is a valid instruction.

nera Mi6?ran(e PICmicro B oc5 Dia(ram

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Instr)ction F o'0Pi%e inin( 2n L nstruction !ycleN consists of four B cycles CB", B&, B), and B-D. $etch takes one instruction cycle while decode and e0ecute takes another instruction cycle. >owever, due to Pipelining, each instruction effectively e0ecutes in one cycle. f an instruction causes the program counter to change Ce.g.86T6D then an e0tra cycle is reGuired to complete the instruction . The instruction Getc3 begins with the program counter incrementing in B".

n the E@ec)tion cycle, the fetched instruction is latched into the L nstruction +egister C +DN in cycle B". This instruction is then decoded and e0ecuted during the B&, B), and Bcycles. .ata memory is read during B& Coperand readD and written during B- Cdestinations writeD. E0ample shows the operation of the two stage pipeline for the instruction seGuence shown. 2t time T !S 3, the first instruction is fetched from program memory. .uring T !S ", the

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first instruction e0ecutes while the second instruction is fetched. .uring T !S &, the second instruction e0ecutes while the third instruction is fetched. .uring T !S ), the fourth instruction is fetched while the third instruction C!2(( A7BX"D is e0ecuted. Ehen the third instruction completes e0ecution, the !P7 forces the address of instruction four onto the Atack and then changes the Program !ounterCP!D to the address of A7BX". This means that the instruction that was fetched during T !S ) needs to be LflushedN from the pipeline. .uring T !S -, instruction four is flushed Ce0ecuted as a 56P D and the instruction at address A7BX" is fetched. $inally during T !S ;, instruction five is e0ecuted and the instruction at address A7BX" @ " is fetched. Instr)ction Pi%e ine F o'

nput output lines INTROD<CTION 8eneral purpose =6 pins can be considered the simplest of peripherals. They allow the P !micro to monitor and control other devices. To add fle0ibility and functionality to a device, some pins are multiple0ed with an alternate functionCsD. These functions depend on which peripheral features are on the device. n general, when a peripheral is functioning, that pin may not be used as a general purpose =6 pin.

The direction of the =6 pins Cinput or outputD is controlled by the data direction register, called the T+ A register. T+ AY0Z controls the direction of P6+TY0Z. 2 ["1 in the T+ A bit corresponds to that pin being an input, while a [31 corresponds to that pin being an output.

The P6+T register is the latch for the data to be output. Ehen the P6+T is read, the device reads the levels present on the =6 pins Cnot the latchD. This means that care should be taken with read?modify?write commands on the ports and changing the direction of a pin from an input to an output.

$igure shows a typical =6 port. This does not take into account peripheral functions that maybe multiple0ed onto the =6 pin. +eading the P6+T register reads the status of the pins whereas writing to it will write to the port latch. 2ll write operations Csuch as BA$ and B!$ instructionsD are read?modify?write operations. Therefore a write to a port implies that the port pins are readH

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this value is modified, and then written to the port data latch.

Ehen peripheral functions are multiple0ed onto general =6 pins, the functionality of the =6 pins may change to accommodate the reGuirements of the peripheral module. E0amples of this are the 2nalog?to?.igital C2=.D converter and (!. driver modules, which force the =6 pin to the peripheral function when the device is reset. n the case of the 2=., this prevents the device from consuming e0cess current if any analog levels were on the 2=. pins after a reset occurred.

Eith some peripherals, the T+ A bit is overridden while the peripheral is enabled. Therefore, read?modify?write instructions CBA$, B!$, and ,6+E$D with T+ A as destination should be avoided. The user should refer to the corresponding peripheral section for the correct T+ A bit settings.

P6+T pins may be multiple0ed with analog inputs and analog V+E$ input. The operation of each of these pins is selected, to be an analog input or digital =6, by clearing=setting the control bits in the 2.!65" register C2=. !ontrol +egister"D. Ehen selected as an analog input, these pins will read as [31s.The T+ A registers control the direction of the port pins, even when they are being used as analog inputs. The user must ensure the T+ A bits are maintained set when using the pins as analog inputs.

Note !A f pins are multiple0ed with 2nalog inputs, then on a Power?on +eset these pins are configured as analog inputs, as controlled by the 2.!65" register. +eading port pins configured as analog inputs read a [31.

Note $A f pins are multiple0ed with comparator inputs, then on a Power?on +eset these pins are configured as analog inputs, as controlled by the !4!65 register. +eading port

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pins configured as analog inputs read a [31.

Note .A f pins are multiple0ed with (!. driver segments, then on a Power?on +eset these pins are configured as (!. driver segments, as controlled by the (!.AE register. To configure the pins as a digital port, the corresponding bits in the (!.AE register must be cleared. 2ny bit set in the (!.AE register overrides any bit settings in the corresponding T+ A register. Note 4A Pins may be multiple0ed with the Parallel Alave Port CPAPD. $or the PAP to function the =6 pins must be configured as digital inputs and the PAP46.E bit must be set. Note ,A 2t present the Parallel Alave Port CPAPD is only multiple0ed onto P6+T. and P6+TE. The microprocessor port becomes enabled when the PAP46.E bit is set. n this mode, the user must make sure that the T+ AE bits are set Cpins are configured as digital inputsD and that P6+TE is configured for digital =6. P6+T. will override the values in the T+ A. register. n this mode the P6+T. and P6+TE input buffers are TT(. The control bits for the PAP operation are located in T+ AE. PORTA an6 t3e TRISA Re(ister The +2- pin is a Achmitt Trigger input and an open drain output. 2ll other +2 port pins have TT( input levels and full !46A output drivers. 2ll pins have data direction bits T+ A registersD which can configure these pins as output or input. Aetting a T+ A2 register bit puts the corresponding output driver in a hi?impedance mode. !learing bit in the T+ A2 register puts the contents of the output latch on the selected pinCsD. E@am% e !A Initia i*in( PORTA !(+$ AT2T7A !(+$ P6+T2 H Bank3 H nitiali/e P6+T2 by clearing output H data latches BA$ AT2T7A, +P3 46V(E 30!$ 46VE$ T+ A2 H Aelect Bank" H Value used to initiali/e data direction H P6+T2Y)K3Z O inputs P6+T2Y;K-Z O outputs H T+ A2Y%K#Z always read as I3I

PORTB an6 t3e TRISB Re(ister

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P6+TB is an :?bit wide bi?directional port. The corresponding data direction register is T+ AB. Aetting a bit in the T+ AB register puts the corresponding output driver in a high? impedance input mode. !learing a bit in the T+ AB register puts the contents of the output latch on the selected pinCsD. E@am% eA Initia i*in( PORTB Each of the P6+TB pins has a weak internal pull?up. 2 single control bit can turn on all the pull?ups. This is performed by clearing bit +BP7 C6PT 65Y%ZD. The weak pull?up is automatically turned off when the port pin is configured as an output. The pull?ups are disabled on a Power?on +eset. !(+$ AT2T7A !(+$ P6+TB H Bank3 H nitiali/e P6+TB by clearing output H data latches BA$ AT2T7A, +P3 46V(E 30!$ 46VE$ T+ AB H Aelect Bank" H Value used to initiali/e data direction H P6+TBY)K3Z O inputs, P6+TBY;K-Z O outputs H P6+TBY%K#Z O inputs Each of the P6+TB pins has a weak internal pull?up. 2 single control bit can turn on all the pull?ups. This is performed by clearing bit +BP7 C6PT 65Y%ZD. The weak pull?up is automatically turned off when the port pin is configured as an output. The pull?ups are disabled on a Power?on +eset.

PORTC an6 t3e TRISC Re(ister P6+T! is an :?bit bi?directional port. Each pin is individually configurable as an input or output through the T+ A! register. P6+T! pins have Achmitt Trigger input buffers.

Ehen enabling peripheral functions, care should be taken in defining T+ A bits for each P6+T! pin. Aome peripherals override the T+ A bit to make a pin an output, while other peripherals override the T+ A bit to make a pin an input.

E@am% eA Initia i*in( PORTC

!(+$ AT2T7A !(+$ P6+T!

H Bank3 H nitiali/e P6+T! by clearing output

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H data latches BA$ AT2T7A, +P3 46V(E 30!$ 46VE$ T+ A! H Aelect Bank" H Value used to initiali/e data direction H P6+T!Y)K3Z O inputs, P6+T!Y;K-Z O outputs H P6+T!Y%K#Z O inputs Intro6)ction The !entral Processing 7nit C!P7D is responsible for using the information in the program memory CinstructionsD to control the operation of the device. 4any of these instructions operate on data memory. To operate on data memory, the 2rithmetic (ogical 7nit C2(7D is reGuired. n addition to performing arithmetical and logical operations, the 2(7 controls status bits Cwhich are found in the AT2T7A registerD. The results of some instructions force status bits to a value depending on the state of the result. The machine codes that the !P7 recogni/es are show in Table.

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Mi6?Ran(e MC< Instr)ction Set

!P7

Genera Instr)ction Format The 4id?+ange 4!7 instructions can be broken down into four general formats as shown in $igure. 2s can be seen the opcode for the instruction varies from )?bits to #?bits. This variable opcode si/e is what allows ); instructions to be implemented.

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Genera Format Gor Instr)ctions

Centra Processin( <nit 8CP<; The !P7 can be thought of as the LbrainsN of the device. t is responsible for fetching the correct instruction for e0ecution, decoding that instruction, and then e0ecuting that instruction.

The !P7 sometimes works in conjunction with the 2(7 to complete the e0ecution of the instruction Cin arithmetic and logical operationsD.

The !P7 controls the program memory address bus, the data memory address bus, and accesses to the stack.

Instr)ction C oc5 Each instruction cycle CT!SD is comprised of four B cycles CB"?B-D. The B cycle time is the same as the device oscillator cycle time CT6A!D. The B cycles provide the timing=designation for the .ecode, +ead, Process .ata, Erite, etc., of each instruction cycle. The following diagram shows the relationship of the B cycles to the instruction cycle.

The four B cycles that make up an instruction cycle CT!SD can be generali/ed asK B"K nstruction .ecode !ycle or forced 5o operation B&K nstruction +ead .ata !ycle or 5o operation B)K Process the .ata

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B-K nstruction Erite .ata !ycle or 5o operation Each instruction will show a detailed B cycle operation for the instruction. F C&c e Activit&

Arit3metic Lo(ica <nit 8AL<; P ! micro 4!7s contain an :?bit 2(7 and an :?bit working register. The 2(7 is a general purpose arithmetic and logical unit. t performs arithmetic and Boolean functions between the data in the working register and any register file. O%eration oG t3e AL< an6 W Re(ister

The 2(7 is :?bits wide and is capable of addition, subtraction, shift and logical operations. 7nless otherwise mentioned, arithmetic operations are twoIs complement in nature. n two?operand instructions, typically one operand is the working register CE registerD. The other operand is a file register or an immediate constant. n single operand instructions, the operand is either the E register or a file register.

The E register is an :?bit working register used for 2(7 operations. t is not an addressable register.

.epending on the instruction e0ecuted, the 2(7 may affect the values of the !arry C!D, .igit !arry C.!D, and Fero CFD bits in the AT2T7A register. The ! and .! bits operate as a borrow bit and a digit borrow out bit, respectively, in subtraction. Aee the A7B(E and A7BE$ instructions for e0amples.

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STAT<S Re(ister The AT2T7A register, shown in $igure, contains the arithmetic status of the 2(7, the +EAET status and the bank select bits for data memory. Aince the selection of the .ata 4emory banks is controlled by this register, it is reGuired to be present in every bank. 2lso, this register is in the same relative position CoffsetD in each bank

The AT2T7A register can be the destination for any instruction, as with any other register. f the AT2T7A register is the destination for an instruction that affects the F, .! or ! bits, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. $urthermore, the T6 and P. bits are not writable. Therefore, the result of an instruction with the AT2T7A register as destination may be different than intended.

$or e0ample, !(+$ AT2T7A will clear the upper?three bits and set the F bit. This leaves the AT2T7A register as 333u u"uu Cwhere u O unchangedD.

t is recommended, therefore, that only B!$, BA$, AE2P$ and 46VE$ instructions are used to alter the AT2T7A register because these instructions do not affect the F, ! or .! bits from the AT2T7A register. $or other instructions, not affecting any status bits, see Table. Note !A Aome devices do not reGuire the +P and +P" CAT2T7AY%K#ZD bits. These bits are not used by the Aection ;. !P7 and 2(7 and should be maintained clear. 7se of these bits as general purpose +=E bits is 56T recommended, since this may affect upward code compatibility with future products.

Note $A The ! and .! bits operate as a borrow and digit borrow bit, respectively, in subtraction.

STAT<S Re(ister

Bit % IRPA +egister Bank Aelect bit Cused for indirect addressingD " O Bank &, ) C"33h ? "$$hD

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3 O Bank 3, " C33h ? $$hD $or devices with only Bank3 and Bank" the +P bit is reserved, always maintain this bit clear.

Bit #K; RP!ARP/A +egister Bank Aelect bits Cused for direct addressingD "" O Bank ) C":3h ? "$$hD "3 O Bank & C"33h ? "%$hD 3" O Bank " C:3h ? $$hD 33 O Bank 3 C33h ? %$hD Each bank is "&: bytes. $or devices with only Bank3 and Bank" the +P bit is reserved, always maintain this bit clear.

Bit - TOA Time?out bit " O 2fter power?up, !(+E.T instruction, or A(EEP instruction 3 O 2 E.T time?out occurred

Bit ) PDA Power?down bit " O 2fter power?up or by the !(+E.T instruction 3 O By e0ecution of the A(EEP instruction

Bit& 2A Fero bit " O The result of an arithmetic or logic operation is /ero 3 O The result of an arithmetic or logic operation is not /ero

Bit " DCA .igit carry=borrow bit C2..E$ 2..(E, A7B(E, A7BE$ instructionsD Cfor borrow the polarity sreversedD " O 2 carry?out from the -th low order bit of the result occurred 3 O 5o carry?out from the -th low order bit of the result

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Bit 3 CA !arry=borrow bit C2..E$, 2..(E, A7B(E, A7BE$ instructionsD " O 2 carry?out from the most significant bit of the result occurred 3 O 5o carry?out from the most significant bit of the result occurred

NoteA $or borrow the polarity is reversed. 2 subtraction is e0ecuted by adding the two1s complement of the second operand. $or rotate C++$,+($ D instructions, this bit is loaded with either the high or low order bit of the source register.

OPTIONIREG Re(ister The 6PT 65X+E8 register is a readable and writable register which contains various control bits to configure the T4+3=E.T prescaler, the e0ternal 5T nterrupt, T4+3, and the weak pull?ups on P6+TB.

OPTIONIREG Re(ister

Bit % RBP<A P6+TB Pull?up Enable bit " O P6+TB pull?ups are disabled 3 O P6+TB pull?ups are enabled by individual port latch values

Bit # INTEDGA nterrupt Edge Aelect bit " O nterrupt on rising edge of 5T pin 3 O nterrupt on falling edge of 5T pin

Bit ; T/CSA T4+3 !lock Aource Aelect bit " O Transition on T3!9 pin 3 O nternal instruction cycle clock C!(967TD

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Bit - T/SEA T4+3 Aource Edge Aelect bit " O ncrement on high?to?low transition on T3!9 pin 3 O ncrement on low?to?high transition on T3!9 pin

Bit ) PSAA Prescaler 2ssignment bit " O Prescaler is assigned to the E.T 3 O Prescaler is assigned to the Timer3 module

bit &?3 PS$APS/ K Prescaler +ate Aelect bits

PCON Re(ister The Power !ontrol CP!65D register contains flag bitCsD, that together with the T6 and P. bits, allows the user to differentiate between the device resets.

Note !A B6+ is unknown on Power?on +eset. t must then be set by the user and checked on subseGuent resets to see if B6+ is clear, indicating a brown?out has occurred. The B6+ status bit is a donIt care and is not necessarily predictable if the brown?out circuit is disabled Cby clearing the B6.E5 bit in the !onfiguration wordD.

Note $A t is recommended that the P6+ bit be cleared after a power?on reset has been .etected, so that subseGuent power?on resets may be detected.

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PCON Re(ister

Bit % MPEENK 4emory Parity Error !ircuitry Atatus bit This bit reflects the value of the 4PEE5 configuration bit.

Bit #K) <nim% emente6A +ead as I3I

Bit & PERK 4emory Parity Error +eset Atatus bit " O 5o error occurred 3 O 2 program memory fetch parity error occurred Cmust be set in software after a Power?on +eset occursD

Bit " PORK Power?on +eset Atatus bit " O 5o Power?on +eset occurred 3 O 2 Power?on +eset occurred Cmust be set in software after a Power?on +eset occursD

Bit 3 BORK Brown?out +eset Atatus bit " O 5o Brown?out +eset occurred 3 O 2 Brown?out +eset occurred Cmust be set in software after a Brown?out +eset occursD

Intro6)ction The analog?to?digital C2=.D converter module can have up to eight analog inputs for a device. The analog input charges a sample and hold capacitor. The output of the sample and hold capacitor is the input into the converter. The converter then generates a digital result of this analog level via successive appro0imation. This 2=. conversion of the analog input signal, results in a corresponding "3?bit digital number.

The analog reference voltages Cpositive and negative supplyD are software selectable to

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either the device1s supply voltages C2V.., 2VssD or the voltage level on the 25)=V+E$@ and 25&=V+E$?pins. The 2=. converter has a uniGue feature of being able to operate while the device is in A(EEP mode. The 2=. module has four registers. These registers areK

W 2=. +esult >igh +egister C2.+EA>D W 2=. +esult (ow +egister C2.+EA(D W 2=. !ontrol +egister3 C2.!653D W 2=. !ontrol +egister" C2.!65"D

The 2.!653 register, shown in $igure ", controls the operation of the 2=. module. The 2.!65" register, shown in $igure &, configures the functions of the port pins. The port pins can be configured as analog inputs C25) and 25& can also be the voltage referencesD or as digital =6. !/?Hit A0D B oc5 Dia(ram

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Contro Re(ister

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+egister "K 2.!653 +egister

Bit %K# ? 2.!A"K2.!A3K 2=. !onversion !lock Aelect bits 33O $6A!=& 3"O $6A!=: "3O $6A!=)& ""O $+!Cclock derived from the internal 2=. +! oscillatorD

Bit ;K) ? !>A&K!>A3K 2nalog !hannel Aelect bits 333O channel 3, C253D 33"O channel ", C25"D 3"3O channel &, C25&D 3""O channel ), C25)D "33O channel -, C25-D "3"O channel ;, C25;D ""3O channel #, C25#D """O channel %, C25%D

NoteA $or devices that do not implement the full : 2=. channels, the unimplemented selections are reserved. .o not select any unimplemented channel.

Bit & ? GO0DONEA 2=. !onversion Atatus bit Ehen 2.65 O "

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" O 2=. conversion in progress Csetting this bit starts the 2=. conversion which is automatically cleared by hardware when the 2=. conversion is completeD 3 O 2=. conversion not in progress

Bit " ? 7nimplementedA +ead as I3I

Bit 3 ? 2.65K 2=. 6n bit " O 2=. converter module is powered up 3 O 2=. converter module is shut off and consumes no operating current

ADCON! Re(ister

Bit %K# <nim% emente6A Rea6 as J/J

Bit ; ? ADFM K 2=. +esult format select " O +ight justified. # 4ost Aignificant bits of 2.+EA> are read as 131. 3 O (eft justified. # (east Aignificant bits of 2.+EA( are read as 131.

Bit - <nim% emente6A Rea6 as J/J

Bit )K3 PCFG.APCFG/K 2=. Port !onfiguration !ontrol bits

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O%eration The 2.+EA>K 2.+EA( registers contains the "3?bit result of the 2=. conversion. Ehen the 2=. conversion is complete, the result is loaded into this 2=. result register pair, the 86=.65E bit C2.!653Y&ZD is cleared, and 2=. interrupt flag bit, 2. $, is set. The block diagrams of the 2=. module are shown in $igure. 2fter the 2=. module has been configured as desired, the selected channel must be acGuired before the conversion is started. The analog input channels must have their corresponding T+ A bits selected as inputs.

A0D Ac7)isition Re7)irementsD 2fter this acGuisition time has elapsed the 2=. conversion can be started. The following steps should be followed for doing an 2=. conversionK ". !onfigure the 2=. moduleK W !onfigure analog pins = voltage reference= and digital =6 C2.!65"D W Aelect 2=. input channel C2.!653D W Aelect 2=. conversion clock C2.!653D W Turn on 2=. module C2.!653D &. !onfigure 2=. interrupt Cif desiredDK W !lear the 2. $ bit W Aet the 2. E bit W Aet the 8 E bit

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). Eait the reGuired acGuisition time. -. Atart conversionK W Aet the 86=.65E bit C2.!653D ;. Eait for 2=. conversion to complete, by eitherK W Polling for the 86=.65E bit to be cleared or 2. $ bit to be set 6+ W Eaiting for the 2=. interrupt #. +ead 2=. +esult register pair C2.+EA>K2.+EA(D, clear the 2. $ bit, if reGuired. %. $or ne0t conversion, go to step " or step & as reGuired.

The $igure shown below shows the conversion seGuence, and the terms that are used. 2cGuisition time is the time that the 2=. module1s holding capacitor is connected to the e0ternal voltage level. Then there is the conversion time of "& T2., which is started when the 86 bit is set. The sum of these two times is the sampling time. There is a minimum acGuisition time to ensure that the holding capacitor is charged to a level that will give the desired accuracy for the 2=. conversion.

A0D Conversion Se7)ence

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ConGi()rin( Ana o( Port Pins The 2.!65" and T+ A registers control the operation of the 2=. port pins. The port pins that are desired as analog inputs must have their corresponding T+ A bits set CinputD. f the T+ A bit is cleared CoutputD, the digital output level CV6> or V6(D will be converted.The 2=. operation is independent of the state of the !>A&K!>A3 bits and the T+ A bits.

A0D Conversions The E0ample shown below shows how to perform an 2=. conversion for the P !"%!%;#. The P6+T$ and lower four P6+T8 pins are configured as analog inputs. The analog references CV+E$@ and V+E$?D are the device 2V.. and 2VAA. The 2=. interrupt is enabled, and the 2=. conversion clock is $+!. The conversion is performed on the 253 pin Cchannel 3D.!learing the 86=.65E bit during a conversion will abort the current conversion. The 2=. result register pair will 56T be updated with the partially completed 2=. conversion sample. That is, the 2.+EA>K2.+EA( registers will continue to contain the value of the last completed conversion Cor the last value written to the 2.+EA>K2.+EA( registersD. 2fter the 2=. conversion is aborted, a &T2. wait is reGuired before the ne0t acGuisition is started. 2fter this &T2. wait, acGuisition on the selected channel is automatically started.

A0D Conversion

A0D Res) t Re(isters The 2.+EA>K 2.+EA( register pair is the location where the "3?bit 2=. result is loaded at the completion of the 2=. conversion. This register pair is "#?bits wide. The 2=. module gives the fle0ibility to left or right justify the "3?bit result in the "#?bit result register. The 2=. $ormat Aelect bit C2.$4D controls this justification. $igure below shows the operation of the 2=. result justification.The e0tra bits are loaded with [31s1. Ehen an 2=. result will not overwrite these locations C2=. disableD, these registers may be used as two general purpose :?bit registers.

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A0D Res) t K)stiGication

O%eration D)rin( S ee% The 2=. module can operate during A(EEP mode. This reGuires that the 2=. clock source be set to +! C2.!A"K2.!A3 O ""D. Ehen the +! clock source is selected, the 2=. module waits one instruction cycle before starting the conversion. This allows the A(EEP instruction to be e0ecuted, which eliminates all internal digital switching noise from the conversion. Ehen the conversion is completed the 86=.65E bit will be cleared, and the result is loaded into the 2.+EA register. f the 2=. interrupt is enabled, the device will wake?up from A(EEP. f the 2=. interrupt is not enabled, the 2=. module will then be turned off, although the 2.65 bit will remain set. Ehen the 2=. clock source is another clock option Cnot +!D, a A(EEP instruction will cause the present conversion to be aborted and the 2=. module to be turned off Cto conserve powerD,though the 2.65 bit will remain set.Turning off the 2=. places the 2=. module in its lowest current consumption state. EGGects oG a Reset 2 device reset forces all registers to their reset state. This forces the 2=. module to be turned off, and any conversion is aborted.The value that is in the 2.+EA>K2.+EA( registers is not modified for a Power?on +eset. The2.+EA>K2.+EA( registers will contain unknown data after a Power?on +eset.

A0D Initia i*ation

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Osci ator The internal oscillator circuit is used to generate the device clock. The device clock is reGuired for the device to e0ecute instructions and for the peripherals to function. $our device clock periods generate one internal instruction clock CT!SD cycle. There are up to eight different modes which the oscillator may have. There are two modes which allow the selection of the internal +! oscillator clock out C!(967TD to be driven on an =6 pin, or allow that =6 pin to be used for a general purpose function. The oscillator mode is selected by the device configuration bits. The device configuration bits are nonvolatile memory locations and the operating mode is determined by the value written during device programming. The oscillator modes areK W (P (ow $reGuency CPowerD !rystal W ,T !rystal=+esonator W >A >igh Apeed !rystal=+esonator W +! E0ternal +esistor=!apacitor Csame as E,T+! with !(967TD W E,T+! E0ternal +esistor=!apacitor W E,T+! E0ternal +esistor=!apacitor with !(967T W 5T+! nternal - 4>/ +esistor=!apacitor W 5T+! nternal - 4>/ +esistor=!apacitor with !(967T These oscillator options are made available to allow a single device type the fle0ibility to fit applications with different oscillator reGuirements. The +! oscillator option saves system cost while the (P crystal option saves power. !onfiguration bits are used to select the various options.

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Osci ator ConGi()rations Osci ator T&%es 4id?+ange devices can have up to eight different oscillator modes. The user can program up to three device configuration bits C$6A!&, $6A!" and $6A!3D to select one of these eight modesK W (P (ow $reGuency CPowerD !rystal W ,T !rystal=+esonator W >A >igh Apeed !rystal=+esonator W +! E0ternal +esistor=!apacitor Csame as E,T+! with !(967TD W E,T+! E0ternal +esistor=!apacitor W E,T+! E0ternal +esistor=!apacitor with !(967T W 5T+! nternal - 4>/ +esistor=!apacitor W 5T+! nternal - 4>/ +esistor=!apacitor with !(967T The main difference between the (P, ,T, and >A modes is the gain of the internal inverter of the oscillator circuit which allows the different freGuency ranges. Tables give information to aid in selecting an oscillator mode. n general, use the oscillator option with the lowest possible gain which still meets specifications. This will result in lower dynamic currents C ..D.

The freGuency range of each oscillator mode is the recommended CtestedD freGuency cutoffs, but the selection of a different gain mode is acceptable as long as a thorough validation is performed Cvoltage, temperature, component variations C+esistor, !apacitor, and internal microcontroller oscillator circuitryDD.

The +! mode and the E,T+! with !(967T mode have the same functionality. They are named like this to help describe their operation vs. the other oscillator modes.

Se ectin( t3e Osci ator Mo6e Gor Devices 'it3 FOSC!AFOSC/

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WIRELESS BASED POWER LINE BREAKAGE MONITORING

CONCL<SION
The project titled LWIRELESS BASED POWER LINE MONITORINGM is successfully working. believe it1s satisfied to all. hope this project is very useful for vehicles. 2nd also about this field work. BREAKAGE

gain more knowledge

This project is based with microcontroller so it is very helpful in all section. Being a microcontroller based systemH it has got the following features. C"D >igh 2ccuracy and Precision C&D Economic \ (ess Power consumption. The major advantage of using microcontroller is the resulting fle0ibility and speed of operation. The software developed is sufficiently simple with a few peripheral chips. 4oreover the hardware supported by the software is simpler and therefore ine0pensive. Thus the all above details regarding this project is user friendly device.

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BIBLIOGRAP1Y
". (et 7s ! R Sashwanth 9anetkar

&.

6p?2mps \ (inear c1s R +amakant 2. 8ayakwad

Eayne Eolf, !omputers as !omponentsK Principles of Embedded !omputer Aystem.esign, Aan $ranciscoK 4organ 9aufman, &333.

8iovanni .e 4icheli and +ajesh 8upta, J>ardware?software co?design,J Proceedings of the EEE, :;C)D, 4arch, "<<%, pp. )-<?)#;.

+olf Ernst, J!odesign of embedded systemsK status and trends,J EEE .esign and Test of !omputers, ";C&D, 2pril=4ay=]une "<<:, pp. -;?;-.

!hang Sun Park and 2lan !. Ahaw, LE0periments with a program timing tool based on source?level timing scheme,N EEE !omputer, &-C;D, 4ay, "<<", pp. -:?;%.

ntegrated !ircuits R 9.+.Botkar

WeHsites A66resses www.national.com www.analog.com www.microchip.com www.sparktech.org