GFDFGG
GFDFGG
GFDFGG
D
D
D
D
SN54HCT139 . . . J OR W PACKAGE
SN74HCT139 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
16
15
14
13
12
11
10
VCC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
SN54HCT139 . . . FK PACKAGE
(TOP VIEW)
description
1A
1G
NC
VCC
2G
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2A
2B
NC
2Y0
2Y1
1Y3
GND
NC
2Y3
2Y2
1B
1Y0
NC
1Y1
1Y2
NC No internal connection
The SN54HCT139 is characterized for operation over the full military temperature range of 55C to 125C. The
SN74HCT139 is characterized for operation from 40C to 85C.
FUNCTION TABLE
INPUTS
OUTPUTS
SELECT
G
Y0
Y1
Y2
Y3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997
2A
2B
2G
2
3
1
0
1
1
EN
4
5
6
7
12
14
11
13
10
15
DMUX
1Y0
1A
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
1B
1G
2A
2B
2G
2
3
0
0
1
0
G
3
12
14
11
13
10
15
2Y3
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
1G
1Y0
5
1Y1
1Y2
2
1A
7
1B
1Y3
12
2Y0
15
11
2G
2Y1
10
2Y2
2A
14
9
13
2B
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
2Y3
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997
Supply voltage
VIL
VI
VO
tt
TA
SN74HCT139
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5.5
4.5
5.5
UNIT
V
V
0.8
0.8
Input voltage
VCC
VCC
VCC
VCC
Output voltage
Input transition (rise and fall) time
500
500
ns
55
125
40
85
TEST CONDITIONS
VCC
VOH
VI = VIH or VIL
IOH = 20 A
IOH = 4 mA
45V
4.5
VOL
VI = VIH or VIL
IOL = 20 A
IOL = 4 mA
45V
4.5
II
ICC
VI = VCC or 0
VI = VCC or 0,
ICC
IO = 0
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
Ci
5.5 V
MIN
TA = 25C
TYP
MAX
4.5 V
to 5.5 V
MIN
MAX
SN74HCT139
MIN
4.4
4.499
4.4
4.4
3.98
4.3
3.7
3.84
MAX
UNIT
V
0.001
0.1
0.1
0.1
0.17
0.26
0.4
0.33
0.1
100
1000
1000
nA
160
80
1.4
2.4
2.9
mA
10
10
10
pF
5.5 V
5.5 V
SN54HCT139
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997
FROM
(INPUT)
TO
(OUTPUT)
A or B
tpd
d
Y
G
tt
VCC
MIN
TA = 25C
TYP
MAX
SN54HCT139
MIN
SN74HCT139
MAX
MIN
MAX
4.5 V
14
34
51
43
5.5 V
12
30
50
40
4.5 V
11
34
51
43
5.5 V
10
30
50
40
4.5 V
15
22
19
5.5 V
14
21
17
UNIT
ns
ns
TEST CONDITIONS
No load
TYP
UNIT
25
pF
3V
Test
Point
Input
1.3 V
1.3 V
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
1.3 V
10%
tPHL
90%
90%
tr
Input 1.3 V
0.3 V
2.7 V
tPHL
3V
2.7 V
1.3 V
0.3 V 0 V
tr
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOH
1.3 V
10% V
OL
tf
tPLH
1.3 V
10%
tf
1.3 V
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
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accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
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