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SN54HCT139, SN74HCT139

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS


SCLS066B MARCH 1982 REVISED MAY 1997

D
D
D
D

SN54HCT139 . . . J OR W PACKAGE
SN74HCT139 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)

Inputs Are TTL-Voltage Compatible


Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs

1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND

16

15

14

13

12

11

10

VCC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3

SN54HCT139 . . . FK PACKAGE
(TOP VIEW)

description

1A
1G
NC
VCC
2G

The HCT139 are designed for high-performance


memory-decoding or data-routing applications
requiring very short propagation delay times. In
high-performance memory systems, these
decoders can minimize the effects of system
decoding. When employed with high-speed
memories utilizing a fast enable circuit, the delay
time of these decoders and the enable time of the
memory are usually less than the typical access
time of the memory. This means that the effective
system delay introduced by the decoders is
negligible.

3 2 1 20 19
18

17

16

15

14
9 10 11 12 13

2A
2B
NC
2Y0
2Y1

1Y3
GND
NC
2Y3
2Y2

1B
1Y0
NC
1Y1
1Y2

NC No internal connection

The HCT139 comprise two individual 2-line to


4-line decoders in a single package. The
active-low enable (G) input can be used as a data
line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered
inputs, each of which represents only one
normalized load to its driving circuit.

The SN54HCT139 is characterized for operation over the full military temperature range of 55C to 125C. The
SN74HCT139 is characterized for operation from 40C to 85C.
FUNCTION TABLE
INPUTS

OUTPUTS

SELECT
G

Y0

Y1

Y2

Y3

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION


DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303

DALLAS, TEXAS 75265

SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997

logic symbols (alternatives)


X/Y
1A
1B
1G

2A
2B
2G

2
3
1

0
1
1

EN

4
5
6
7
12

14

11

13

10

15

DMUX
1Y0
1A
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2

1B
1G

2A
2B
2G

2
3

0
0
1

0
G
3

12

14

11

13

10

15

2Y3

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.

logic diagram (positive logic)


4

1G

1Y0

5
1Y1

1Y2

2
1A
7
1B

1Y3

12
2Y0
15
11

2G

2Y1

10
2Y2
2A

14
9

13
2B
Pin numbers shown are for the D, DB, J, N, PW, and W packages.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

2Y3

1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3

SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997

absolute maximum ratings over operating free-air temperature range


Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.

recommended operating conditions


SN54HCT139
VCC
VIH

Supply voltage

VIL
VI

Low-level input voltage

VO
tt
TA

Operating free-air temperature

High-level input voltage

VCC = 4.5 V to 5.5 V


VCC = 4.5 V to 5.5 V

SN74HCT139

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5.5

4.5

5.5

UNIT
V
V

0.8

0.8

Input voltage

VCC
VCC

VCC
VCC

Output voltage
Input transition (rise and fall) time

500

500

ns

55

125

40

85

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
PARAMETER

TEST CONDITIONS

VCC

VOH

VI = VIH or VIL

IOH = 20 A
IOH = 4 mA

45V
4.5

VOL

VI = VIH or VIL

IOL = 20 A
IOL = 4 mA

45V
4.5

II
ICC

VI = VCC or 0
VI = VCC or 0,

ICC

IO = 0
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC

Ci

5.5 V

MIN

TA = 25C
TYP
MAX

4.5 V
to 5.5 V

MIN

MAX

SN74HCT139
MIN

4.4

4.499

4.4

4.4

3.98

4.3

3.7

3.84

MAX

UNIT
V

0.001

0.1

0.1

0.1

0.17

0.26

0.4

0.33

0.1

100

1000

1000

nA

160

80

1.4

2.4

2.9

mA

10

10

10

pF

5.5 V
5.5 V

SN54HCT139

This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.

PRODUCT PREVIEW information concerns products in the formative or


design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

SN54HCT139, SN74HCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS066B MARCH 1982 REVISED MAY 1997

switching characteristics over recommended operating free-air temperature range, CL = 50 pF


(unless otherwise noted) (see Figure 1)
PARAMETER

FROM
(INPUT)

TO
(OUTPUT)

A or B

tpd
d
Y

G
tt

VCC

MIN

TA = 25C
TYP
MAX

SN54HCT139
MIN

SN74HCT139

MAX

MIN

MAX

4.5 V

14

34

51

43

5.5 V

12

30

50

40

4.5 V

11

34

51

43

5.5 V

10

30

50

40

4.5 V

15

22

19

5.5 V

14

21

17

UNIT

ns

ns

operating characteristics, TA = 25C


PARAMETER
Cpd

TEST CONDITIONS

Power dissipation capacitance per decoder

No load

TYP

UNIT

25

pF

PARAMETER MEASUREMENT INFORMATION


From Output
Under Test

3V

Test
Point

Input

1.3 V

1.3 V
0V

CL = 50 pF
(see Note A)

tPLH
In-Phase
Output

LOAD CIRCUIT

1.3 V
10%

tPHL
90%

90%

tr
Input 1.3 V
0.3 V

2.7 V

tPHL

3V

2.7 V

1.3 V
0.3 V 0 V

tr

Out-of-Phase
Output

90%

tf

VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES

VOH
1.3 V
10% V
OL
tf

tPLH
1.3 V
10%
tf

1.3 V
10%

90%

VOH
VOL

tr

VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES

NOTES: A. CL includes probe and test-fixture capacitance.


B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

PRODUCT PREVIEW information concerns products in the formative or


design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.

Copyright 1998, Texas Instruments Incorporated

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