DRIVER ICS

Coreless Transformer Provides

Innovative Features
The expansion of the EiceDRIVER-family
Coreless transformer technology was introduced in the market by Infineon Technologies
in 2003 [1, 2] as a core technology for IGBT gate drive ICs. Coreless transformer technology may be either used to replace half-bridge drivers, which use level shifters, or to
replace optocouplers.
By Wolfgang Frank, Bernhard Strzalkowski, Uwe Jansen; Infineon Technologies Germany
Since coreless transformer technology provides a total galvanic isolation, negative transients at the high-side floating supply return are not
a concern any more. The technology has been improved this year to
make it even more resistant to system-level burst stress. Two new
parts incorporating new innovative functions for cutting down system
cost have been released.
Basics of coreless transformer technology
Coreless transformer technology uses semiconductor manufacturing
processes to integrate a transformer consisting of metal spirals and
silicon oxide insulation (Figure 1). The transformer is placed on the
receiver chip in this example, but it may also be located on the transmitting chip without a change in functionality. Bond wires connect the
upper winding with IC 1.

Since level-shift topologies use high-voltage transistors in pulsed

operation to transmit the signal to the high side, there is considerable
power dissipation during transmission. This power dissipation is proportional to switching frequency and DC-link voltage. Therefore the
applicability in systems with higher switching frequency is limited.
Coreless transformer technology does not have this sort of power
dissipation. The transmission of the control signal takes place with
very low power dissipation in the transmission section. This allows
coreless transformer technology to be used in high-frequency switching applications.
Improvements regarding EMI and package: 2ED020I12-FI
The 2ED020I12-FI is a half-bridge driver IC that is fully operational
up to 1200 V. Its driving capability is 1 A sourcing and -2 A sinking,
which makes this device suitable for IGBT with a current rating of up
to 100 A without an additional booster circuit. Figure 2 shows the
block diagram of this IC.

Figure 1: Cross-section of a coreless transformer

It is important to note that this technology is able to transmit pulse
information at a rate of several MHz. This is a very big advantage,
because it is useful for a wide variety of applications.
Advantages of coreless transformer in comparison to level-shift
technologies
Level-shift technologies do not provide galvanic isolation. Therefore,
it is impossible to enable features such as reinforced isolation directly
with these technologies. Further current paths via the substrate material may lead to malfunction of the IC at specific operating points, if
the semiconductor technology does not prevent this by using dielectric isolation or by separating the circuit onto two chips. A critical point
is, for example, when the high-side reference potential runs below
the potential of the low-side output reference. Then, the high-side
output becomes insensitive to control signals. This means that short
circuits can be actively triggered repetitively. Excessive power dissipation and system breakdown may result. These kinds of malfunctions can be avoided by using a coreless transformer due to their galvanic isolation.

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Figure 2: Internal block diagram of 2ED020I12-FI

The non-inverting control input pins for the high-side and the low-side
IGBT are compatible with 3.3 V and 5 V TTL logic levels, and contain
internal pull-down resistors. The integrated pull-down resistors
reduce the number of external components. A dedicated shut-down
function at pin /SD can inhibit the transmission of control signals to
the high- and low-side drivers. This makes it possible to design a fast
shutdown capability in case of a malfunction such as a short circuit.

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The propagation delay times with respect of

the high-side gate drive signals are very
small due to the high frequency transmission
of the coreless transformer. However, an
additional delay circuit is designed for the
low-side gate drive section in order to compensate for the delay time of the coreless
transformer of the high side. The delay circuit assures a maximum difference of 10 ns
between the propagation delay times.
With an improved transmission protocol
compared to the 2ED020I12-F, inverters that
use the new 2ED020I12-FI are now able to
manage high positive as well as high negative voltages in respect to bus bar ground.
Power inverters including the 2ED020I12-FI
pass the system-level burst test requirements according to level 4 of IEC 61000-4-4.
An advanced package now allows the
2ED020I12-FI to meet RoHS specifications
and mass- production requirements for leadfree soldering.

The effective active Miller clamp function

avoids the need for negative gate driving in
most applications. The lack of negative gate
bias voltages lowers the system cost effectively, but it is important to avoid parasitic
turn-on of the IGBT. High dvCE/dt rates lead
to a displacement current through the
reverse capacitance (Miller capacitance)
Cres and the input capacitance Cies according to the red path in Figure 3. This raises
the gate voltage according to the transfer
characteristic of the capacitive voltage
divider. If the voltage shift is higher than the
Miller voltage of the IGBT, parasitic turn-on
of the IGBT is caused. This leads to a shortterm short circuit of the half-bridge, and
increases switching losses significantly. The
gate resistor Rg actually decouples the gatedrive stage of the IC from this effect [4]. The
active Miller clamp (pin CLAMP) now connects directly the gate pin of the IGBT module with an integrated, low-ohmic FET and
pulls it down effectively, so that the IGBT is
kept off. The integrated FET is able to sink
up to 1 A.

A unique feature of the 2ED020I12-FI is the

integrated comparator and operational amplifier (OpAmp), which can be used, for example, for current sensing by using a shunt
according to [3]. Furthermore, the OpAmp
and comparator can be used for general
functions such as monitoring of the DC link
voltage or triggering the start of the chopper,
etc.
1ED020I12-S single-channel driver IC with
innovative features
The 1ED020I12-S is an advanced, galvanically-isolated IGBT gate driver IC, which was
designed to provide reinforced isolation.
However, the process to define standards for
the reinforced isolation of inductive couplers
has just started. A preliminary standard from
Verband der Elektrotechnik Elektronik
Informationstechnik e.V. (VDE) for reinforced isolation for magnetic and capacitive
couplers is scheduled for publication in
December 2006.
Due to the use of a state-of-the-art BICMOS
process, control and protection functions
superior to those in optocoupler-based drivers could be included. This allows the
designer to build highly-reliable designs with
fewer components. These functions and features are:
# Active Miller clamp
# Two-level turn-off
# Rail-to-rail output
# Desaturation protection with high precision
# High-side status signalling with FAULT and
READY

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Figure 4 Two-level turn-off

a) Application schematic
b) Timing
Another new feature is the rail-to-rail output.
This means, that the gate-drive voltage
reaches the supply voltage VCC2 according
to Figure 5. A rail-to-rail driver output
enables the user to provide easy clamping of
the IGBT gate voltage during short circuit of
the IGBT via a Schottky diode from the gate
pin of the IGBT to the high-side supply of the
1ED020I12-S. Thus, an increase of short-circuit current due to the feedback via the
Miller capacitance can be avoided. Common
gate-drive ICs do not offer this feature.
Therefore, the supply voltage of the output
stage is increased to 17 V or 18 V in order
to obtain a gate-emitter voltage of VGE =
15V. As a result, effective gate clamping with
a diode to the supply is not possible with
common gate-drive ICs that do not provide a
rail-to-rail output.

Figure 3: Application circuit using the active

Miller clamp function of 1ED020I12-S
The two-level turn-off optimizes the switching
of the IGBT in case of short circuits or
severe overcurrents. By activating two-level
turn-off, the gate voltage prior to turn-off is
reduced to a programmable level in order to
reduce the carrier density in the IGBT. This
action avoids a dangerous excessive overvoltage across the IGBT during short-circuit
turn-off. The intermediate level of reduced
gate voltage is defined by the voltage of the
external Zener diode DTL as shown by a) in
Figure 4. The turn-off delay TTL shown in b)
of Figure 4 is programmable through an
external capacitor CTL for accurate timing.
The turn-off delay TTL is also used to delay
the turn-on signal to prevent distortion of the
input-pulse width. The overvoltage with twolevel turn-off activated is significantly lower
compared to short-circuit turn-off without this
protective feature. This considerably increases the reverse bias safe operating area
(SOA) of the IGBT and the module, respectively. Although two-level turn-off is also in
operation for normal switching events, it
does not have an adverse effect on switching losses.

Bodos Power Systems - January 2007

Figure 5: Rail-to-rail output and effective

gate-voltage clamping
These features are important steps toward
building very reliable, high-performance,
high-power drive systems. They reduce the
component count dramatically by comparison with standard approaches using optocouplers. Figure 6 shows two gate-drive
PCBs for half-bridge modules, each with the
same functionality.
The upper photo shows the evaluation board
of 1ED020I12-S for a half-bridge driver
design, which supports all functions of the
1ED020I12-S. This design saves four optocoupler and a large number of discrete components that would be necessary to provide
the same features. The evaluation board is
available from December 2006 onward.

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DRIVER ICS

Conclusions
The coreless transformer technology is very
attractive for gate-drive ICs. Infineons existing portfolio with the 2ED020I12-F has been

expanded by adding the new half-bridge

driver 2ED020I12-FI and the single-channel
driver 1ED020I12-S. Coreless transformer
technology is very robust and can easily be

combined with innovative functions such as

active Miller clamping, two-level turn-off or
rail-to-rail outputs. These functions help
design engineers to meet their targets in
terms of cost, reliability, and time-to-market.
References
[1] B. Strzalkowski: A monolithic integrated
transformer in control circuitry of power electronics; EDPE 2001 Kosice/Slovak Republic
[2] M. Mnzer, et al.: Coreless Transformer
a new technology to drive power semiconductors the intelligent way; Proceedings of
PCIM 2003; Nrnberg, 2003
[3] A. Volke, et al.: IGBT/MOSFET
Applications based on Coreless Transformer
Driver IC 2ED020I12-F; Proceedings of
PCIM 2004, Nrnberg, 2004.
[4] Infineon Technologies: Driving IGBTs
with unipolar gate voltage; Application Note
AN-2006-01, Infineon Technologies,
Germany, 2005.

Figure 6: Fewer components in a PCB designed with 1ED020I12-S (upper design)

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