AN-1252

APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

How to Configure the AD5933/AD5934

by Miguel Usach

INTRODUCTION
The AD5933 and AD5934 are high precision impedance The output programmable gain amplifier (PGA) is used for
converter system solutions. The main difference between conditioning the output signal. It can be configured in four user
these two solutions is the maximum measurable frequency. selectable excitation voltages.
This application note applies to both parts. The main blocks Receive Stage
of the AD5933 and AD5934 are shown in Figure 1.
The receive stage consists of
The impedance converter is a finite system and has some
limitations. This application note only aims to explain the • The transimpedance amplifier (TIA) that converts the
optimum setup for measurements. current that crosses the impedance into voltage
• The input PGA that amplifies the TIA signal ×1 or ×5
IMPEDANCE MEASUREMENT BLOCKS • The ADC that samples the signal and fills the internal
Impedance converters can be divided into three different buffer (1024 points)
blocks: a transmit stage, a receive stage, and a discrete Fourier
transform (DFT) engine. DFT Engine
The DFT engine processes the data and generates real (R) and
Transmit Stage
imaginary (I) number components.
The DDS core and the high speed DAC generate a sine wave
signal used to excite the impedance.
MCLK

DDS + DAC OUTPUT

OSCILLATOR PGA VOUT

Z(ω)

AD5933/AD5934

RFB

3pF

VIN
1024-POINT ADC INPUT
DFT ENGINE TIA
(12 BITS) PGA
LPF
11834-001

VDD/2

Figure 1. AD5933/AD5934 Block Diagram

Rev. 0 | Page 1 of 12
AN-1252 Application Note

TABLE OF CONTENTS
Introduction ...................................................................................... 1 Choosing an Appropriate Settling Time ....................................5
Impedance Measurement Blocks .................................................... 1 Calculating the Gain Factor .........................................................5
Revision History ............................................................................... 2 When the Impedance is Outside the Maximum AD5933/
Getting Started .................................................................................. 3 AD5934 Measurable Range..........................................................7

Benefits of Adding an External AFE .......................................... 3 Example ..........................................................................................7

Rebiasing the DC Level................................................................ 3 Measuring a Complex Impedance ..............................................8

Reducing the Output Impedance ............................................... 3 Measuring Liquid ..........................................................................8

Configuring the Part ........................................................................ 5 Setting Up and Programming ..........................................................9

Selecting the Excitation Voltage ................................................. 5 Setting Up the Part ........................................................................9

Identifying the Impedance Range .............................................. 5 Programming the Part ..................................................................9

Choosing an Appropriate Value for RFB..................................... 5

REVISION HISTORY
11/13—Revision 0: Initial Version

Rev. 0 | Page 2 of 12
Application Note AN-1252

GETTING STARTED
BENEFITS OF ADDING AN EXTERNAL AFE An example of the different dc bias voltages is shown Figure 3
CN-217 describes an external analog front end (AFE) designed for Range 1 where VDD = 5 V.
to improve measurements. 5.00V

This AFE has two main benefits: to reduce the output

impedance of the signal source and to rebias the excitation 3.74V
voltage signal. 1.24V

2.50V
REBIASING THE DC LEVEL 3V p-p
2.24V
When connecting the impedance between VIN and VOUT, as 1.76V

shown in Figure 2, notice that the dc bias voltage is slightly

different in the transmit stage and receive stage.

11834-003
0.74V

Figure 3. Excitation Output Voltage Without AFE

Due to this mismatch, the dc level difference is amplified by the

VOUT
RFB, or, in other words, the ADC dynamic range is reduced.
ROUT
Additionally, a dc voltage across a sensor can polarize it and/or
Z(ω)
degrade it over the sensor lifetime.

RFB REDUCING THE OUTPUT IMPEDANCE

The internal output impedance depends on the amplitude
VIN
voltage range selected and this may be as high as 2.4 kΩ.
Therefore, since impedance cannot be considered negligible, it
11834-002

VDD2 needs to be added into the equation. Typical values are shown
in Table 2.
Figure 2. AD5933 Without External AFE

The receiver dc offset is set to the ADC midscale, noninverting Table 2. System Output Impedance
pin of the TIA, VDD/2, while the dc offset in the transmitter Range No. Typical Output Impedance, ZOUT
depends on the selected output voltage shown in Table 1. 1 to 4 >100 Ω
(Adding external op amp)
Table 1. DC Offset Voltage vs. Output Range for 3.3 V 1 200 Ω
Range No. DC Offset Voltage V p-p 2 2.4 kΩ
1 1.48 1.98 3 1 kΩ
2 0.76 0.97 4 600 Ω
3 0.31 0.383
4 0.173 0.173

Rev. 0 | Page 3 of 12
AN-1252 Application Note

The total measurable impedance is the unknown impedance 1.48V VDD/2

and the system output impedance. To measure small

impedances, adding the system output impedance may VDD
dramatically increase the range thus increasing the total VDD

measurable impedance. Consequently, this reduces the output VOUT 50kΩ A1

current. To compensate, the value of RFB needs to increase. In ROUT 47nF 50kΩ
other words, a high RFB value means worse SNR and lower
sensitivity in your system.
Implementing these suggestions is relatively easy. Rebiasing the A1, A2 ARE
½ AD8606
ZUNKNOWN

dc level is straightforward; just add a high-pass filter. If you

are planning to design the high-pass filter, refer to AN-581 RFB
RFB
Application Note, Biasing and Decoupling Op Amps in Single 20kΩ
Supply Applications.
VIN 20kΩ
A2
To reduce the output impedance and have the ability to measure
VDD
low impedances, the recommended op amp of choice is the
20kΩ
AD8606 (ZOUT = 1 Ω). You may consider the AD8602 as a lower
cost alternative. Figure 4 shows the AFE implementation in the

11834-004
20kΩ
EVAL-AD5933EBZ, Rev. C1.
The second AD8606 is used as a TIA due to the lower leakage Figure 4. AD5933 with AFE
and noise; the internal receive stage TIA is operating as a
voltage follower.

Rev. 0 | Page 4 of 12
Application Note AN-1252

CONFIGURING THE PART

Correctly configuring the AD5933/AD5934 is key to getting Note that if you are rebiasing, the signal VDCOFFSET is VDD/2.
the most accurate measurement from the part. At this point, it is important to clarify that the equations are
SELECTING THE EXCITATION VOLTAGE based on a headroom of 200 mV below VDD.
The recommendation is to use the maximum output voltage CHOOSING AN APPROPRIATE SETTLING TIME
because the SNR is degraded with lower amplitudes. The part allows preexcitation of the impedance before begin-
IDENTIFYING THE IMPEDANCE RANGE ning measurements. This is recommended if the imaginary part
The ratio between the maximum and minimum impedance of the load is bigger than the real part or if the distance sensor
is limited by the ADC resolution, supply, and dc offset for the load is high. The settling time is referred to as the actual output
selected range. The maximum ratio, ZMAX/ZMIN, is shown in frequency. Therefore, if you are generating a frequency sweep,
Table 3. the delay is different for each excitation frequency.

Table 3. Maximum Ratio Allowable

CALCULATING THE GAIN FACTOR
DC Level Range No. Ratio To calculate the gain factor, it is always recommended to use a
Rebiasing 1 to 4 ×45 discrete resistor rather than a complex impedance.
No Rebiasing 1 ×40 The reason for calibrating the system with a discrete resistor is
2 ×15 simple. The algorithm to calculate the phase is relative, in other
3 ×5 words, the unknown impedance phase is the difference between
4 ×2 the calibrated phase minus the unknown measured phase.
Therefore, to avoid confusion, it is necessary to calibrate the
Remember to add the system output impedance into the
part using a zero phase delay impedance. The recommended
impedance range. This depends on the selected range as shown
impedance value for calibration is
in Table 2.
1
If the unknown impedance range does not fit within the maxi- 𝑅𝐶𝐴𝐿 = (𝑍𝑀𝐼𝑁 + 𝑍𝑀𝐴𝑋 ) ×
3
mum range, split your impedance range into subgroups. If this
is the case, your system should be capable of changing the TIA Recommendation
gain. This can be done by adding an external mux or switch Regardless of how one wants to calculate the gain factor, it is
(that is, ADG1419) with different RFB values as shown in always recommended to measure the system phase for each
Figure 5. frequency because a typical op amp phase is not constant for
VOUT
some frequencies as shown in the example in Figure 6.
RFB 0
VS = ±2.5V

AD5933 Z(ω)
MUX
3:1
11834-005

–45
VIN
PHASE (Degrees)

Figure 5. Variable TIA Gain

–90
CHOOSING AN APPROPRIATE VALUE FOR RFB
The internal ADC reference is VDD. It is important to guarantee
that, in the worst case, the voltage generated by the TIA does –135
not saturate the converter. The RFB value is defined as
𝑉𝐷𝐷
� − 0.2� × 𝑍𝑀𝐼𝑁 1
𝑅𝐹𝐵 = 2 ×
–180
11834-006

𝑉𝐷𝐷 𝐺𝐴𝐼𝑁
10 100 1k 10k 100k 1M 10M 100M
�𝑉𝑃𝐾 + 2 − 𝑉𝐷𝐶𝑂𝐹𝐹𝑆𝐸𝑇 � FREQUENCY (Hz)

Figure 6. Phase Linearity Example

where:
VPK is the peak voltage of the selected output range. There are different ways to calculate the gain factor depending
ZMIN is the minimum impedance. on the frequency range and memory space constrains.
GAIN is the selected PGA gain, ×1 or ×5.
VDD is the supply.
VDCOFFSET is the dc offset voltage for the selected range shown in
Table 1.

Rev. 0 | Page 5 of 12
AN-1252 Application Note
Calculating the Gain Factor Using Single Impedance and Improvements: Best Fit Equation
Single Frequency This is a method to correct offset and gain errors in the system,
The impedance is excited with a single frequency. Typically, in other words, to linearize the system within a range.
this is a frequency in the middle of your frequency sweep.
First, the gain factor is calculated using one of the methods
This type of calibration is fast and requires minimum space described in this application note.
in memory, but offers less precision than other methods.
Once the gain factor is calculated, measure the impedance in
Specifically, the AD5933 DFT engine uses a method called the extremes of the range as shown in Table 7.
single point DFT. Rather than analyze the entire spectrum The equations to correct the measured value are
and calculate the energy for a given frequency, the algorithm
returns a single bin that contains multiple frequencies, at 𝑍 =𝑀×𝑋+𝐶
approximately 976.56 Hz at 1MSPS. (𝑍𝑀𝐴𝑋 − 𝑍𝑀𝐼𝑁 )
𝑀=
For example, when configuring a measurement for a 1 kHz (𝑋𝑀𝐴𝑋 − 𝑋𝑀𝐼𝑁 )
excitation signal, the bin will contain the energy stored from 𝐶 = 𝑍𝑀𝐼𝑁 − (𝑀 × 𝑋𝑀𝐼𝑁 )
976 Hz to 1952 Hz. where:
On the board, there are many devices generating noise at ZMAX is the real maximum impedance.
different frequencies, such as an SMPS regulator; this could add ZMIN is the real minimum impedance.
more energy to the bin that the energy measured only in the XMAX is the maximum measured impedance.
impedance. XMIN is the minimum measured impedance.
Calculating the Gain Factor Using Multipoint The best fit equation for each frequency can be calculated, but
Frequencies, Single Impedance this increases memory requirements.
In this case, calculate the gain factor for each frequency.
This method is preferred if your frequency span is wide because
it helps to reduce errors related to the op amp bandwidth as well
MEASURED IMPEDANCE

as reducing bin errors.

There are two different ways to implement this method. The
first way is to generate a look-up table in your controller for the
Y = Mx + C
gain factor. The second way is to calculate the gain factor on-
the-fly by adding an external mux/switch as shown in Figure 7.
It is necessary to generate a sweep and repeat the measurement
twice, once with RCAL and a second time with the impedance
(Z(ω)).

11834-008
ZMIN ZMAX

REAL IMPEDANCE

Figure 8. AD5933 with AFE

VOUT D

ADG849

S1 S2

RCAL Z(ω)

RFB

VIN
11834-007

Figure 7. AD5933 for On-the-Fly Calibration

Rev. 0 | Page 6 of 12
Application Note AN-1252
WHEN THE IMPEDANCE IS OUTSIDE THE In this case, the error is due to an assumption; the output
MAXIMUM AD5933/AD5934 MEASURABLE impedance is 2.4. Figure 10 shows the error assuming that the
RANGE output impedance is 2.4 ± 5%. To be considered negligible, the
error added by the output impedance tolerance, ZMIN, should be
There are some limitations in terms of maximum and
at least 10 times larger than the amplifier output impedance.
minimum measurable impedance. In this case, the easy way
1.4
to overcome the limitation is by adding a series or parallel
resistance to decrease or increase the impedance as needed. 1.2
This method decreases the accuracy because the unknown
impedance is measured artificially in a different range. 1.0
4.7kΩ NO AFE 1V p-p 47kΩ NO AFE 1V p-p
EXAMPLE 4.7kΩ NO AFE 2V p-p 47kΩ NO AFE 2V p-p

ERROR (%)
0.8
4.7kΩ AFE 1V p-p 47kΩ AFE 1V p-p
Consider a simple example that works for several scenarios, 4.7kΩ AFE 2V p-p 47kΩ AFE 2V p-p

where VDD = 3.3 V. 0.6

In this case condition, the unknown impedance range is from 0.4

4.7 kΩ to 47 kΩ. Because the AD5933 measures impedance, not
capacitance or inductance, calculate the equivalent impedance 0.2

for your maximum and minimum excitation frequency (see

0
Table 7).

11834-009
1950 3900 5850 7800 9750 11700
FREQUENCY (Hz)
As shown in Table 4, only Range 1 and Range 2 can be used for
Figure 9. Experimental Results Error
the measurements; all four ranges can be used if an external
1.8
buffer is added. For this example, the selected op amp is the
AD8606 as shown in CN-217. 1.6

1.4
Table 4. Selecting Ranges
AFE Range No. Within Ratio 1.2
4.7kΩ, NO AFE 1V p-p 47kΩ, NO AFE 1V p-p
ERROR (%)

Using AD8606 1 to 4 Yes 1.0 4.7kΩ, 2.4kΩ –5% 47kΩ, 2.4kΩ –5%
4.7kΩ, 2.4kΩ +5% 47kΩ, 2.4kΩ +5%
Without AFE 1 Yes 0.8
2 Yes
0.6
3 No
4 No 0.4

Calculate ZMIN and ZMAX according to Table 5. 0.2

11834-010
Table 5. Maximum and Minimum Impedance to Measure 31 32 33 34 35 36 37 38 39 40 41
FREQUENCY (kHz)
With AFE Without AFE
AD8606 Range 1 Range 2 Figure 10. Error with Output Impedance Tolerance

ZMIN, 4.7 kΩ ZMIN, 4.9 kΩ ZMIN, 7.1 kΩ If the system adds an external buffer, there are not big
ZMAX, 47 kΩ ZMAX, 47.2 kΩ ZMAX, 49.4 kΩ differences using gain ×1 or ×5 as shown in Figure 11.
0.25
Calculate RFB according to Table 6. 4.7kΩ AFE 1V p-p 47kΩ AFE 1V p-p
4.7kΩ AFE 2V p-p 47kΩ AFE 2V p-p
4.7kΩ AFE 2V p-p ×5 47kΩ AFE 2V p-p ×5
Table 6. RFB Values for Different PGA Configurations 0.20 4.7kΩ AFE 1V p-p ×5 47kΩ AFE 1V p-p ×5
With AFE Without AFE
Range 1 Range 1 Range 2
0.15
ERROR (%)

×1, 6.8 kΩ ×1, 6.1 kΩ ×1, 7.4 kΩ

×5, 1.4 kΩ ×5, 1.2 kΩ ×5, 1.5 kΩ
0.10
Calibrate the system, using
1
𝑅𝐶𝐴𝐿 = (𝑍𝑀𝐼𝑁 + 𝑍𝑀𝐴𝑋 ) × = 17 kΩ 0.05
3

To analyze the results, note the performance results using

multipoint calibration. 0
11834-011

31 32 33 34 35 36 37 38 39 40 41
As shown in Figure 9 through Figure 12, the results without the FREQUENCY (kHz)

AFE are slightly worse than those with an AFE. In all cases, the Figure 11. Error With and Without PGA Stage Enabled for System
results are below the 1% except for Range 2 at low impedance. with External AFE

Rev. 0 | Page 7 of 12
AN-1252 Application Note
If the system does not add an external buffer, there is a slight maximum data rate, the internal 1024-point buffer cannot store
improvement using ×5 gain as shown in Figure 12. a full period; this adds a considerable error to the final result.
1.4
If you need to measure below 1 kHz, the recommendation is
1.2
to reduce the MCLK frequency. This increases the calculation
time; the DFT engine clock is MCLK and requires an external
1.0 filter to attenuate harmonics. Keep the Nyquist theorem in
47kΩ NO AFE 2V p-p ×5 4.7kΩ NO AFE 2V p-p ×5 mind since the internal filters are optimized for the maximum
47kΩ NO AFE 2V p-p 4.7kΩ NO AFE 2V p-p
ERROR (%)

0.8 47kΩ NO AFE 1V p-p 4.7kΩ NO AFE 1V p-p

4.7kΩ NO AFE 1V p-p ×5
sample rate of 1 MSPS. For example, to measure the impedance
47kΩ NO AFE 1V p-p ×5
at 10 Hz, MCLK ≈16 MHz/100 ≈160 kHz
0.6
Inductance Can Be Measured
0.4
The examples found in the data sheet are based on capacitors,
0.2 but there are no restrictions or reasons why you cannot measure
an inductor.
0
31 32 33 34 35 36 37 38 39 40 41 11834-012 MEASURING LIQUID
FREQUENCY (kHz)
To measure liquid, buy a commercial sensor or design your
Figure 12. Error With and Without Gain Stage Enabled
own. A sensor for this purpose typically has one or more
The difference is appreciable using Range 2 for 4.7 kΩ. The parallel plates, rings, or nets as shown in Figure 13.
reason behind this surprising result is the noise. The amplifier RING
noise is roughly estimated as
PCB
𝑛 𝑇𝑂𝑇𝐴𝐿 = 𝑛 𝑇𝐼𝐴 + 𝑛𝐺𝐴𝐼𝑁
LIQUID
2
𝑛 𝑇𝐼𝐴 = �(𝑍𝑈𝑁𝐾𝑁𝑂𝑊𝑁 × 𝐺𝐴𝐼𝑁)2 + 𝑅𝐹𝐵 CONNECTORS

11834-013
The equations intentionally omit the bandwidth contribution
and other noise sources added by the op amp itself.
Figure 13. Example of Sensor to Measure Liquids
The PGA stage noise is constant while the TIA noise depends
The measured impedance is defined by
directly on the TIA gain. The worst case scenario is at
maximum gain, ZLOAD = ZMIN. 𝑙
𝑍= 𝜌
𝐴
MEASURING A COMPLEX IMPEDANCE
where:
To measure complex impedance, refer to the conversion l is the distance between plates (or traces).
table (see Table 7) to calculate the maximum and minimum A is the area of the plates.
impedance based on the excitation frequency. This section ρ is the electric resistivity.
describes three points to keep in mind.
The conductivity of a liquid is defined as
Do Not Calibrate the System with a Complex Impedance
1
Otherwise, phase results will be not as expected. This is 𝜎=
𝜌
explained in the Calculating the Gain Factor section.
The parameters of the sensor are constant, thus the impedance
There is a Minimum Excitation Frequency changes are driven by the electric conductivity.
The ADC samples at MCLK/16 with a 1 MSPS maximum data
rate. For an excitation frequency below 1 kHz sampling at the

Rev. 0 | Page 8 of 12
Application Note AN-1252

SETTING UP AND PROGRAMMING

SETTING UP THE PART 3. Program ∆f.

Programming the part is a multistep process. Begin by setting 975 Hz

𝐷=� � × 227 = 0x0079E2
up the part as follows: 16.776 MHz ÷ 4
• Write 0x00 to Register Address 0x85
• Internal oscillator: MCLK = 16.776 MHz
• Write 0x79 to Register Address 0x86
• fSTART = 1950 Hz
• Write 0xE2 to Register Address 0x87
• ∆f = 975 Hz
4. Program the number of increments.
• Increments = 10
• Write 0x00 to Register Address 0x88
• PGA gain = ×1
• Write 0x0A to Register Address 0x89
• Output range = 2 V p-p
5. Program the delay in the measurements. The worst case is
• Settling time = 1 ms worst case at maximum frequency,
PROGRAMMING THE PART fMAX = 1950 + (975 × 10) = 11700 Hz
Once the part is set up, follow Step 1 through Step 7 to program D = 1 ms × 11700 = 12
the part.
• Write 0x00 to Register Address 0x8A
1. Reset the part.
• Write 0x0C to Register Address 0x8B
• Write 0x10 to Register Address 0x81
6. Initialize the system.
2. Program the start frequency.
• Write 0x11 to Register Address: 0x80
1.950 kHz
𝐷=� � × 227 = 0x00F3C5 • Wait several milliseconds.
16.776 MHz ÷ 4
• Write 0x00 to Register Address 0x82 7. Follow the flowchart in Figure 14 to sweep the frequency.
• Write 0xF3 to Register Address 0x83 If you need a new sweep, it is not necessary to reset the
part again. Simply place the part in standby mode and
• Write 0xC5 to Register Address 0x84
program the registers again.
• Write 0x30 to Register Address: 0x80

Rev. 0 | Page 9 of 12
Application Note AN-1252
START
FREQUENCY
SWEEP
REGISTER
ADDRESS: 0x80

DATA: 0x21

READ STATUS
REGISTER
REGISTER
ADDRESS: 0x8F

STATUS REGISTER NO
[DATA AND 0x02] > 0

YES

READ RESULT
REGISTER
ADDRESSES,
0x94
0x95
0x96
0x97

REPEAT
THE
DO YOU WANT TO MEASUREMENT
AVERAGE THE NO
MEASUREMENTS? REGISTER
--AVERAGE; ADDRESS: 0x80
AVERAGE== 0
DATA: 0x41

YES

READ STATUS

REGISTER
ADDRESS: 0x8F

GENERATE
NEXT
STATUS REGISTER NO FREQUENCY
[DATA AND 0x02] > 0
REGISTER
ADDRESS: 0x80
DATA: 0x31

YES

DONE

POWER DOWN
THE PART

REGISTER
11834-014

ADDRESS: 0x80
DATA: 0xA0

Figure 14. Flowchart

Rev. 0 | Page 10 of 12
Application Note AN-1252
Table 7. Example of Impedance Conversion
Schematic Impedance Phase Notes
𝑍𝑅 = 𝑅 0 Constant impedance
tan−1 = 0
R
𝑅

1 𝐶𝑤 𝜋 Use higher capacitance to calculate the

C 𝑍𝐶 = − tan−1 � � = − lowest impedance and minimum
𝐶𝑤𝑗 0 2
capacitance value to calculate highest
1 𝜋 180
|𝑍𝐶𝑀𝐴𝑋 | = − × = −90° impedance
2𝜋𝑓𝑀𝐼𝑁 𝐶 2 𝜋
1
|𝑍𝐶𝑀𝐼𝑁 | =
2𝜋𝑓𝑀𝐴𝑋 𝐶
𝑍𝐿 = 𝐿𝑤𝑗 𝜋 Use lower inductor to calculate the
tan−1 (𝐿𝑤) =
L 2 lowest impedance and maximum
|𝑍𝐿𝑀𝐴𝑋 | = 2𝜋𝑓𝑀𝐴𝑋 𝐿 inductor value to calculate highest
𝜋 180
|𝑍𝐿𝑀𝐼𝑁 | = 2𝜋𝑓𝑀𝐼𝑁 𝐿 × = 90° impedance
2 𝜋
1 1 1 0 𝑅𝐶𝑤
= + = 𝑌𝑇 tan−1 − tan−1
C R 𝑍𝑇 𝑍𝑅 𝑍𝐶 𝑅 1
1 1 + 𝑅𝐶𝑤𝑗 = − tan−1 𝑅𝐶𝑤
𝑌𝑇 = + 𝐶𝑤𝑗 =
𝑅 𝑅
𝑅
𝑍𝑇 =
1 + 𝑅𝐶𝑤𝑗
𝑅
|𝑍𝑇𝑀𝐴𝑋 | =
�1 + (2𝜋𝑅𝐶𝑓𝑀𝐼𝑁 ) 2
2

𝑅
|𝑍𝑇𝑀𝐼𝑁 | =
�12 + (2𝜋𝑅𝐶𝑓𝑀𝐴𝑋 ) 2

𝑍𝑇 = 𝑍𝑅 + 𝑍𝐶 𝑅𝐶𝑤 𝐶𝑤
tan−1 − tan−1
R
1 1 + 𝑅𝐶𝑤𝑗 1 0
C 𝑍𝑇 = 𝑅 + = 𝜋
𝐶𝑤𝑗 𝐶𝑤𝑗 = − tan−1 𝑅𝐶𝑤 −
2
�12 + (2𝜋𝑅𝐶𝑓𝑀𝐼𝑁 ) 2
|𝑍𝑇𝑀𝐴𝑋 | =
2𝜋𝑅𝐶𝑓𝑀𝐼𝑁
�12 + (2𝜋𝑅𝐶𝑓𝑀𝐴𝑋 ) 2
|𝑍𝑇𝑀𝐼𝑁 | =
2𝜋𝑅𝐶𝑓𝑀𝐴𝑋
𝑍𝑇 = 𝑍𝑅 + 𝑍𝐿 𝐿𝑤
tan−1
R
𝑍𝑇 = 𝑅 + 𝐿𝑤𝑗 𝑅
L |𝑍𝑇𝑀𝐴𝑋 | = �𝑅 2 + (2𝜋𝐿𝑓𝑀𝐴𝑋 )2
|𝑍𝑇𝑀𝐼𝑁 | = �𝑅 2 + (2𝜋𝐿𝑓𝑀𝐼𝑁 )2

𝑍𝑇 = 𝑍(𝑅||𝐶) + 𝑍𝐿 𝐿𝑤 𝑅𝐶𝑤 𝑗 = √−1

tan−1 2
− tan−1
C R
𝑅 𝑅 − 𝑅𝐿𝐶𝑤 1 𝑗 2 = −1
𝑍𝑇 = + 𝐿𝑤𝑗
1 + 𝑅𝐶𝑤𝑗
L
−𝑅𝐿𝐶𝑤 2 + 𝐿𝑤𝑗 + 𝑅
𝑍𝑇 =
1 + 𝑅𝐶𝑤𝑗

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AN-1252 Application Note

NOTES

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