LeCroy 5680
LeCroy 5680
LeCroy 5680
LT Series
Service Manual
Help on installation, calibration, and the use of LeCroy equipment is available from
the LeCroy Customer Service Center in your country.
1.3 Maintenance Agreements
LeCroy provides a variety of customer support services under Maintenance
Agreements. Such agreements give extended warranty and allow clients to budget
maintenance costs after the initial three-year warranty has expired. Other services
such as installation, training, enhancements and on-site repairs are available
through special supplemental support agreements.
1.4 Staying Up to Date
LeCroy is dedicated to offering state-of-the-art instruments, by continually refining
and improving the performance of LeCroy products. Because of the speed with
which physical modifications may be implemented, this manual and related
documentation may not agree in every detail with the products they describe. For
Note: Wherever possible, please use the original shipping carton. If a substitute
carton is used, it should be rigid and packed so that that the product is surrounded
by a minimum of four inches or 10 cm of shock-absorbent material.
• LeCroy Japan Corporation, Sasazuka Center Bldg – 6th floor, 1-6, 2-Chome,
Sasazuka, Shibuya-ku, Tokyo Japan 151-0073, tel. (81) 3 3376 9400
For safe operation of the instrument to its specifications, ensure that the operating
environment is maintained within the following parameters:
Temperature ............. 5 to 40 °C (41 to 104 °F) rated.
Where the following symbols or indications appear on the instrument’s front or rear
panels, or elsewhere in this manual, they alert the user to an aspect of safety.
........................... On (Supply)
WARNING
CAUTION
Specifications 3-1
DISPLAY SYSTEM
You control the display’s interactive, user-friendly interface using push-buttons and
knobs. Display as many as eight different waveforms at once on eight separate
grids. The parameters controlling signal capture are simultaneously reported. The
Waverunner display presents internal status and measurement results, as well as
operational, measurement, and waveform-analysis menus.
The 8.4-inch color flat-panel TFT-LCD screen presents waveforms and data using
advanced color management. Overlap-mixing and contrast-enhancement functions
ensure that overlapping waveforms remain distinct at all times. Both pre-set and
personal color schemes are available.
The Analog Persistence function offers display attributes of an analog instrument
with all the advantages of digital technology. The Full Screen function expands
waveform grids to fill the entire screen.
A hard copy of the screen can be easily produced by pressing the front-panel
PRINT SCREEN button.
INTERFACE AND PANEL SETUPS
Although Waverunner is a truly digital instrument, the front-panel layout and
controls are similar to an analog oscilloscope’s. Rapid response and instant
representation of waveforms on the high-resolution screen add to this impression.
Four front-panel setups can be stored internally and recalled either directly or by
remote control, thus ensuring rapid front-panel configuration. When power is
switched off, the current front-panel settings are automatically stored for
subsequent recall at the next power-on.
REMOTE CONTROL
Waverunner has also been designed for remote control operation in automated
testing and computer-aided measurement applications. You control the entire
measurement process — including cursor and pulse-parameter settings, dynamic
modification of front-panel settings, and display organization — through the rear-
panel industry-standard GPIB (IEEE-488) and standard RS-232-C ports. See this
manual’s Chapter 12, Use Waverunner with PC, and the Remote Control Manual.
3-2 Specifications
BLOCK DIAGRAM: Hi-Z, 50 W Amplifiers + Attenuators
Optional Storage
Devices
Sample Fast
CH1 8-Bit ADC(s)
& Hold memory Floppy Disk
Interface
CH2 Sample 8-Bit ADC(s) Fast
& Hold memory Centronics
RS-232-C
External
Trigger Trigger GPIB
Logic Timebase
Power PC
Microprocessor
with Integrated
Cache Memory
CH3 Sample 8-Bit ADC(s) Fast
& Hold memory
Front-Panel
Processor
Sample 8-Bit ADC(s) Fast
CH4
& Hold memory
Real-Time
Clock
Display
Processor Data Memories
Program Memory
Specifications 3-3
Specifications
MODELS
Waverunner LT342/322 Series: Two channels
Waverunner LT344 Series: Four channels
ACQUISITION SYSTEM
Bandwidth (− 3dB): LT342/LT344/LT322:500 MHz;LT224:200 MHz @ 50 Ω and at probe
tip with PP006
Bandwidth Limiter at 25 MHz and 200 MHz can be selected for each channel LT224 is
25MHz.
Input Impedance: 50 Ω ± 1.0 %; 1 MΩ ± 1.0 % // 16 pF typical
Input Coupling: 1 MΩ: AC, DC, GND; 50 Ω: DC, GND
Max Input: 50 Ω: 5 Vrms; 1 MΩ: 400 V max (peak AC <-5 kHz + DC)
Single Shot Sampling Rate: 500 MS/s
Acquisition Memory: LT342/LT344;250 000 points per channel; 1 M points per channel
on L modelsLT224/LT322; 100 000
Vertical Resolution: 8 bits
Sensitivity: 2 mV–10 V/div
Offset Range:
Ø 2 mV–99 mV/div: ± 1 V
Ø 100 mV–0.99 mV/div: ± 10 V
Ø 1 V–10 V/div: ± 100 V
ACQUISITION MODES
MODE TIME BASE SETTING MAXIMUM RATE DESCRIPTION
Single Shot
Repetitive
3-4 Specifications
Stores Multiple Events
with time stamp in
LT342/LT344 2–1000 segments 500 MS/s
segmented acquisition
memories
TIMEBASE SYSTEM
Timebases: Main and up to four zoom traces simultaneously
Time/Div Range: 1 ns/div to 1000 s/div
Clock Accuracy: ≤ 10 ppm
Interpolator Resolution: 5 ps
External Clock: ≤ 500 MHz, 50 Ω, or 1 MΩ impedance
TRIGGERING SYSTEM
Modes: NORMAL, AUTO, SINGLE and STOP
Sources: Any input channel, External, EXT 10 or line; slope, level and coupling are
unique to each source (except line trigger)
Coupling Modes: DC(DC to 250MHz/LT224; DC to 200MHz), AC(Applox.7.5Hz to
250MHz/LT224; Approx.7.5Hz to 200MHz), HF(to 500MHz/LT224 not have), HFREJ,
LFREJ (reject frequency 50 kHz typical)
Pre-Trigger Recording: 0–100 % of horizontal time scale
Post Trigger Delay: 0–10 000 divisions
Holdoff by Time or Events: Up to 20 s or from 1 to 99 999 999 events
Internal Trigger Range: ± 5 div
Maximum Trigger Frequency: Up to 500 MHz with HF coupling
External Trigger Input: ± 0.5 V, ± 5 V with Ext 10; max input same as input channels
SMART TRIGGER TYPES
Signal or pulse width: Triggers on glitches down to 2 ns(LT224 is 3ns). Pulse widths are
selectable between < 2.5 ns to 20 s.
Signal interval: Triggers on intervals selectable between 10 ns and 20 s.
Specifications 3-5
TV: Triggers on line (up to 1500) and field 1 or 2 (odd or even) for PAL (SECAM), NTSC,
or non-standard video.
State/Edge qualified: Triggers on any input source only if a given state (or transition) has
occurred on another source. Delay between sources is selectable by time or number of
events.
Dropout: Triggers if the input signal drops out for longer than a selected time out between
25 ns and 20 s.
AUTOSETUP
Automatically sets timebase, trigger, and sensitivity to display a wide range of repetitive
signals.
Vertical Find: Automatically sets sensitivity for the selected input signal
PROBES
Model PP006: PP006 with auto-detect: 10:1, 10 MΩ; one probe per channel
Probe System: ProBus Intelligent Probe System supports active, high-voltage, current,
and differential probes, and differential amplifiers
COLOR WAVEFORM DISPLAY
Type: Color 8.4-inch flat-panel TFT-LCD with VGA, 640 x 480 resolution
Screen Saver: Display blanks after 10 minutes
Real Time Clock: Date, hours, minutes, and seconds displayed with waveform
Number of Traces: Maximum eight on LT344/LT224 Series, six on LT342/LT322 Series;
simultaneously display channel, zoom, memory, and math traces
Grid Styles: Single, Dual, Quad, Octal, XY, Single+XY, Dual+XY; Full Screen gives
enlarged view of each style
Waveform Display Styles: Sample dots joined or dots only — regular or bold
ANALOG PERSISTENCE DISPLAY
Analog Persistence and Color Graded Persistence: Variable saturation levels; stores
each trace’s persistence data in memory
Trace Display: Opaque or transparent overlap
ZOOM EXPANSION TRACES
Style: Display up to four zoom traces
Vertical Zoom: Up to 5x expansion, 50x with averaging
Horizontal Zoom: Expand to 2 pts/div, magnify to 50 000x
Autoscroll: Automatically scan and display a captured signal
RAPID SIGNAL PROCESSING
Processor: Power PC 603eTM
3-6 Specifications
LT342/LT322 LT344/LT224 LT342L LT344L
2.1.1 16 Mbytes 2.1.2 16 Mbytes 2.1.3 32 Mbytes 2.1.4 32 Mbytes
64 MBYTE SYSTEM MEMORY OPTIONAL FOR ALL MODELS
Specifications 3-7
WAVEANALYZER OPTION
Adds math processing to include FFTs of 1 Mpoint waveforms, power spectrum density,
spectrum averaging, waveform averaging to one million sweeps, continuous averaging,
waveform histograms, and histogram parameters. Includes the Extended Math and
Measurement option.
SPECIAL APPLICATION SOLUTIONS
Jitter and Timing Analysis (JTA): Precision cycle-to-cycle timing measurements with
enhanced accuracy, histograms on persistence traces, persistence to waveform tracing
and full statistical analysis.
PowerMeasure : A complete solution for the power conversion engineer. Includes timing
deskew of voltage and current, and rescale to electrical units.
INTERFACE
Remote Control: Full control via GPIB and RS-232-C
Floppy Drive: Internal, DOS-format, 3.5" high-density
PC Card Slot: Supports memory and hard drive cards
External Monitor Port: 15-pin D-Type VGA-compatible
Centronics Port: Parallel printer interface
Internal graphics printer (optional): 25 mm/s max, 112 mm paper width; provides
hardcopy output in <10 seconds
OUTPUTS
Calibrator signal: 500 Hz–1 MHz square wave, − 1.0 to +1.0, test point, and ground lug on
front panel
Control signals: Choice of trigger ready, trigger out, or Pass/Fail status; TTL levels into 1
MΩ at rear panel BNC (output resistance 300 Ω ± 10 %)
GENERAL
Operating Conditions: Temperature 5–40°C; humidity 80 % non-condensing at 40°C;
altitude ≤ 2000 m
Shock and Vibration: Conforms to MIL-PRF-28800P; Class C
Power Requirements: 90–132 V AC and 180–250 V AC; 45–66 Hz; maximum power
dissipation 150 VA–230 VA, depending on model
Certifications: CE, UL and cUL
Dimensions (HWD): 210 mm x 350 mm x 300 mm (8.3" x 13.8" x 11.8"); height excludes
scope feet
Weight: 8 kg (18 lbs)
Warranty and Calibration: Three years; calibration recommended yearly
3-8 Specifications
Theory of Operation
4. Theory of Operation
4.1 Processor Board
MPC603e Processor
The PowerPC603e on the processor board is a 4-bit RISC processor having
2x32Kbyte cache and features high speed processing and quick memory access.
The processor is designed to operate with an internal clock which is several times
the external bus clock cycles and is used under the 32bit mode.
These two circuit-blocks are connected through MC68150 (dynamic bus sizer).
Power Supply
The board requires two power sources (Vcc and +12V). +12V source is used for
OP-amp and small-peripheral operation.
The processor requires 3.3V, and all other logic devices are operated by the +5V
source. All of the signals are TTL compatible.
The processor allows +5V input signals and does not require logic level conversion.
An OP-amp and MOSFET transistor consist of 3.3V power source. The reference
voltage is taken through the voltage-resistor divider network across +5V power
source.
32bit Peripherals
There are six devices hooked on the processor’s 32bit data bus:
• VGA video controller
• DRAM system
• bus sizer, an interface to 8bit circuit-block
• DMA controller
• Super-I/O
• MAIN board
CPU:PowerPC 603e
DRAM:2X128MB max
DMAC:71071
Super I/O
RS232C, Parallel, Floppy Disk
MAIN Board I/F
VGA:65545
BUS Sizer:MC68150
Interrupt Controller
GP-IB
Small Peripherals
8bit BUS
Refresh Timing
The 32 KHz clock from the RTC chip is used to generate the timing to refresh
DRAM. Without this clock, the DRAM would not be refreshed and all the data in it
would be erased out. DRAMC detects the rising edge and the falling edge of this
32KHz clock. At the each edge, it generates the CAS before RAS refreshes the
cycles.
The arbitration logics between other accesses (bus cycle with the processor and
DMA cycle) and refresh cycles reside in the DRAMC.
DMA Timing
The DMA access can be used for data transfer to and from floppy disks.
Memory Mapping
When the main switch is on, the internal software automatically sets the system’s
memory size to the largest capacity available with the SIMM mounted (2 pieces of
128 MB SIMM size). It also checks whether all the addresses are perennial or not to
prevent having "holes" in the address space. Through this operation, available
memory capacity in the SIMM mounted is correctly judged and the capacity
information is stored again into the DRAMC register. Thus, all the address spaces
are assured for perennial address continuation.
VGA controller
The VGA controller chip 65545(IC29) contains the logic circuits to decode its own
addresses. It generates all the video signals (RGB, H/V, and all control lines to drive
the flat panel), and controls its associated 1 MB video DRAM (to read, write and
refresh).
The total of video DRAMs mounted are two pieces of 2MB (but 512KB each of the
DRAM only are used).
All timings are extracted from the 16MHz bus clock; therefore, no external crystal or
time-base is required. The horizontal and vertical synchronization signals are sent to
the external video connector (a half pitch, D-SUB15 pin connector is used).
The 65545 chip can support several bus interfaces (PCI, ISA, VL, etc), the system
employs it for VL-bus applications with the mode of 256-color palette operations.
The controller has an 18bit color palette and can display 256 colors out of the
available 260,000. However, the liquid crystal panel can only use 12-bit color data,
and color display is limited to 256 out of 4,096 colors (the color data will be
extended to 18bits in the future).
The power supply circuit for the liquid crystal panel has a MOSFET switch that turns
the power for the LCD with the reset signal, since the LCD needs to minimize its
start-up time.
Super-I/O
This device controls RS-232Cs, floppy disks, and parallel port operations. The
controller has its own time-base with a 24MHz crystal. RS-232C can be used by
simply connecting the MAX232 buffer (IC31) to it. Since the Super I/O chip has a
16-byte buffer, high speed data transfer is easily carried out.
A 2HD disk drive can be directly connected to the system without any external
components other than a piece of pull-up resistor; it can be operated in either
interruption mode or DMA mode.
The parallel interface is also activated without other external components other than
a piece of pull-up resistor, for the use of 2-way communication.
This IC chip has an IDE interface function in it, but this board does not support the
function.
Bus Sizer
The MPC603e processor does not support dynamic bus sizing, which is performed
with the 68K processor family. Each 8bit of a 32bit bus is fixed or assigned with the
lower addresses, or 0 through 3 bits. Therefore, if an 8bit device were directly
connected to the bus, this device would be seen in 4byte steps each in the memory
map area. To avoid this, the 8bit-bus peripheral unit shall be connected to the 32bit-
bus through the bus sizer, MC68150 (IC15). The bus sizer divides one bus cycle for
accessing 32 bit-bus of the processor into four cycles each of 8bit accessing cycle,
and/or assigns 8bit-bus data to a corresponding 8bits within the 32bits.
8bit Peripherals
The following devices are listed as 8bit data bus units:
• PCMCIA Interface
• Flash PROM
• NVRAM
• RTC
• Interrupt Controller
• GPIB Interface
• Small-peripherals Interface
• Internal printer Interface
• Front-Panel I/F
• Other registers and ports
Flash PROM
Two pieces of the Intel’s 29F008-compatible 1MB PROMs (IC45 and 46) are used
to operate in the 8-bit bus mode. These ICs do not require any programming
voltage to write.
From a hardware point of view, a flash PROM is regarded the same as an EPROM
in read mode.
To erase or write to memory, commands are written into the data bus. Writing and
erasing must be performed over monitoring the status-signals (RY/#BY) on the port
(IC49).
The program may be seen to start from the Flash PROM. The Flash PROM is,
however, not regarded as the program or its program area even when start-up
(even when the screen appears) is completed, because the program must be
processed in the DRAM after transferring the program content from the Flash
PROM into the DRAM.
NVRAM
This memory chip is powered from the VCCO in the RTC. When the main power is
set to off, the required power for the NVRAM is fed through the lithium battery
installed. When the power is set to on, it is powered from the VCC.
The #CS1 signals are also controlled through the RTC. When the main power is set
to off, the RTC sets the chip select to the “high” level through a pull-up resistor to
place the SRAM a power-down mode to prevent any accidental overwriting.
RTC
The DS1689 real time clock has several functions:
• Keeping the time-of-day and current-date information while power is off.
• Generating 32KHz clock for DRAM refreshment.
• Giving 128Hz of periodic interrupt signals to force bus accessing from the
processor and allowing periodic updating of the time display.
• Providing a unique ID that identifies the origination of scope ID.
• Feeding the power and the chip select signal to the NVRAM.
The chip generates timing clocks necessary for time keeping and driving all other
circuits by connecting to 32.768KHz crystal. A few discrete components around it
leave the chip powered, when the system is set to off, by the backup lithium battery
while the rest of the board is not powered, and charge the battery when the power is
on again.
Accesses from the processor are done through the circuit for the bus separation, for
addresses and data are multiplexed.
The unique ID was already written in the RTC by the manufacturer, since every
different value must be stored in each chip.
Interrupt Controller
Front Panel
The front panel is accessed by serial read/write signals passing through the IC47
and IC48.
The CPU board can be reset by resetting the 3 buttons on the front panel. This
function becomes effective by setting a bit of IC52 for enabling.
Both LED and BEEP are activated by serial writing. LED and BEEP are initialized off
by the resetting operation.
GPIB Interface
The NEC 7210-compatible device, NAT7210, is employed as the controller, and the
TI’s conventional drivers, 75160 and 75161, are also used as the receivers.
The GALs which are not shown in this block-diagram are the ARBT and RW32.
• ARBT does the bus arbitration during the DMA’s execution. It also generates a
bus error when the bus cycle passes over the defined time.
• RW32 controls both the RW signals when the DMA is executed and the byte-
enable signals for the VGA controller.
CA
DEC DRAM
From CPU
To CPU (Ack)
ACK32 BUS sizer
DEC8 ACK8
Wa Wa
Flash
71059
GP-IB
NVRAM
RTC
Small
Peripherals
The main functions of the Front end without the amplifier HFE428 and HTR420 are:
• Four channels operation, calibration with Software control.
• Input protection (clamp + thermal detection) and coupling (AC, DC, 1MΩ, 50Ω).
• Attenuator by 10 & by 100.
• Offset control.
• Offset control of ±1V and CAL control of ±1.4V.
• Detection of 50Ω over loading.
• Input of signal for calibration.
Block diagram 1
Input coupling
Control port Relay GND 1M,DC 1M,AC 50,DC
GND/*MES RL2 H L L L
1M/*50 RL1 H H H L
AC/*DC RL5 H L H L
1/*10 RL3 H X X X
1/*100 RL4 L X X X
Switch of attenuator
Control port Relay 2mV-99mV 100mV-0.99V 1V-10V
1/*10 RL3 H L L
1/*100 RL4 H H L
Divide gain
The gain ratio in each block and input range is a table below.
At the BNC the dynamic range is 16 mV to 80V FS (full scale) and the output is 500 mV
differential (HAD626 input).
Range V/div
Block 2mV 5mV 10mV 20mV 50mV 100mV 200mV 500mV 1V 2V 5V 10V
ATT 1/*10 1 1 1 1 1 0.1 0.1 0.1 0.1 0.1 0.1 0.1
ATT 1/*100 1 1 1 1 1 1 1 1 0.1 0.1 0.1 0.1
HFE428 31.25 12.5 6.25 3.125 1.25 6.25 3.125 1.25 6.25 3.125 1.25 0.625
Total(ratio) 31.25 12.5 6.25 3.125 1.25 0.625 0.3125 0.125 0.0625 0.03125 0.0125 0.00625
Calibration
The front end executes the calibration of GAIN, BALANCE when the panel setups and the
ambient temperature change, so guarantees the accuracy.
Block figure 2 shows the supply of the reference voltage INT CAL.
The calibration executes with INT CAL of standard DC voltage.
The INT CAL is all CH common signal and standard DC voltage of the maximum +/-
600mV.
The INT CAL is attenuated to 1/10 in +/-60mV or less.
The CAL OUT signal of DC-1MHz is independent with an internal calibration. The signal
can be monitored with an external terminal by switching the internal calibration signal.
Block diagram 2
HAD626
Chip on board MCM (Multi Chip Module).
Hybrid Acquisition Module containing both track & hold amplifier and 8bit ADC.
Differential signal input. (Nominal 500mVpp full scale.)
Differential ECL clock input. (up to 500M S/s.)
Differential ECL compatible data outputs and memory clock.
ECL compatible serial interface for internal ADC gain and offset control.
HMM436
Chip on board MCM.
Hybrid Memory Module containing MAM424.
Maximum buffer length is up to maximum 1Mbytes per channel.
MAM424 (Monolithic Access Memory) captures 8bit data at maximum rate of
500Mbytes/s.
Internal memory consists of a 2Mbit SRAM. (up to 250kbytes per channel.)
HMM436 (LTXXX) : one MAM424 per channel.
HMM436L (LTXXXL): four MAM424’s per channel.
Parallel interface for reading data and writing registers.
HTR420
Chip on board MCM.
Hybrid TRigger module designed for a trigger conditioning in DSO.
Differential signal input. (Nominal 500mVpp full scale.)
Dual threshold inputs controlled by DC generator output.
Selectable filtering of input signal. (DC, AC, HF REJ, LF REJ)
Frequency divider by four. (HF)
Dual differential ECL outputs. (Trigger signal and qualifier signal)
Single ended analog output for TV trigger.
Serial interface for the internal settings.
TV trigger
This circuit is able to trigger on different TV line number standards.
TV trigger uses a commercial chip (LM1881).
LM1881 generates composite sync output, vertical sync output and odd/even
output.
MST412(Edge qualified function) triggers on video signal using the outputs of
LM1881.
LINE trigger
This circuit makes LINE trigger signal from AC line signal of Power Board.
Polarity of line trigger.
MST412
Trigger functions (Standard trigger, Hold off, Pulse width, Interval, State qualified,
Edge qualified, Drop out) are made in Monolithic Smart Trigger.
Dual differential ECL inputs. (Trigger signal and qualifier signal)
Differential ECL clock input.
Differential ECL trigger output.
Parallel interface for writing resisters.
400MHz OSC
generates the 400MHz clock for MST412.
ECL single ended output.
The clock frequency of oscillator is adjustable by analog signal from 8bit DAC.
The clock stops for Standard trigger, Hold off by events, TV trigger and LINE
trigger.
MTB411A
Monolithic Time Base has five main sections:
TIMEBASE comprises five counters and associated logic circuitry
for the timebase system.
TDC consists of two counters for interpolated and real computation.
TRIGGER is made up of two counters to be used by trigger circuitry.
FREQUENCY is made up of one counter to be used by the main oscillator circuitry.
DIVIDER consists of a bunch of dividers with multiplexer for probe calibration pulse.
Parallel interface for reading data and writing resistor.
MCG426
Monolithic Clock Generator.
generates sampling clock for sample & hold up to 500MHz (2GHz).
generates different clocks for MTB411A.
generates MCLR (Master CLeaR) to reset clock divider of HAD626.
generates RAMPST (RAMP STart) signal for Time to Digital Converter.
generates TRT (Test Real Time clock) signal to calibrate 400MHz clock for
MST412.
implements divider and phase detector of a PLL to generate clock system at 2GHz.
Parallel interface for reading data and writing resister.
DC Generator
generates analog signals to control Front End offset, HFE428 gain, HTR420
threshold levels and the other circuits.
8bit microprocessor controls DC generator system.
DC generator uses a commercial 16bit DAC (DAC712).
Nominal +/-400mV full scale.
Gain and offset of output are adjusted by analog signals from 8bit DAC.
Probe calibrator
Continuous gain control using DC generator output, -1.0V to +1.0V.
Frequency control using MTB411A’s divider, DC or 500Hz to 1MHz.
HMM436 control
generates special signals for access to HMM436.
MCG426 control
generates special signals for access to MCG426.
generates *ATTenuator ENable signal to protect 50ohm input during power-up.
MST412 control
generates special signals for writing commands to MST412.
IIC-BUS control
controls Pro-Bus system via serial IIC-bus.
uses a commercial chip (PCF8584).
PCF8584 serves as an interface between parallel bus and the serial IIC-bus.
Thermometer
measures temperature of Main Board.
Acquired data are used to determine condition of internal calibration.
EEPROM
4kbit EEPROM.
stores main board calibration data.
This power unit consists of, roughly divided, five independent switching power
supplies and two other circuits.
1. Input circuit (noise filters and rectifiers are included)
2. Harmonic-current correction power supply
By employing a step-up converter system, the input current waveform is
controlled to be similar to the waveform of input voltage. The control unit is a
PFC unit made with IC1. The output voltage is regulated to +377 V DC.
3. Auxiliary power supply (to feed the power for the Harmonic-current control power
supply in the above 2).
Uses an RCC type converter, and outputs +20 V DC.
4. Main power supply-A
Uses a flyback converter, and outputs -4.5 V DC (DIG), ±5 V DC (ANA), and ±12
V DC (ANA) respectively. The output of -4.5 V DC is regulated, but the other
outputs are not regulated and may fluctuate a little in the voltages depending on
the load conditions.
5. Main power supply-B
Uses a flyback converter, and outputs are +5 V DC (DIG), +12 V DC (DIG), and
+24 V DC (DIG), respectively. The outputs of +5 V DC and +12 V DC are
regulated, but the output of +24 V DC may largely fluctuate according to the load
conditions.
6. Auxiliary power supply (to feed the power for both Main power supplies- A and -
B).
Uses an RCC converter, and outputs are +22 V DC and +27 V DC.
7. Series regulator.
Stabilizes the outputs of the main power source of ±5 V DC (ANA), ±12 V DC
(ANA), and reduces the level of ripple noises.
The power switch is located on the secondary side (not the primary side) in order to
switch-on and -off of the outputs at the secondary side; the whole control is made
by switching on and off of the current control oscillator which is configured with the
IC 2 and IC6. Although the power switch is placed to its off position, therefore, the
power is being fed to all the components in the power supply units (stand-by mode),
as long as the waverunner supply is connected to the AC outlet.
The above switching-on and -off function is actually made by shorting and opening
of pins 6 and 7 of "CN3" in the power unit.
Since the design of this waverunner power supply is made based on the use of
Releasing of the overheat protection circuit from its activated mode must not be
made within the time less than five seconds by disconnecting the AC inlet plug out
of the AC receptacle.
Do not touch any electric parts inside the power supplies during operation as the
primary side of the power unit has many portions of over 500 Vrms of magnitudes to
grounding.
The coils, L2, L3, L4, and L5, and capacitors, C1, C2, C3, C4, C5, C6, C94, and
C105, configure the circuits of noise filters to the AC power lines.
The resistor, R2, which contains a thermo-fuse, is to limit the in-rush current when it
flows into the input circuit. In case an abnormal input current keeps flowing, even
when the power switch(through switching operation) is placed to off, the thermo-
fuse melts down and disconnects the input circuit.
When the switching power supplies operate normally, the TRIAC, D2, turns on to
bypass the R2 current, to reduce R2's electric losses during the operation.
The diode, D4, is a bridge circuit and is used for direct full wave rectification of the
AC input.
# Circuit No. 2 / 7
The IC1 in the PFC unit receives its operating power from the auxiliary power supply
which consists of the transistor Q2 and transformer T1, etc; outputs the driving
signals (Gate Signals) for the transistor Q1, and operates the Harmonic control
power supply which consists of the choking coil L6, diode D5, capacitors C13, etc.,
to obtain the output of +377 V DC.
The variable resistor, R16, is to adjust the output voltage of +377 V DC in the
Harmonic control power source.
# Circuit No. 4 / 7
The outputs of ±5 V DC (ANA) and ±12 V DC (ANA) use the series regulator,
consisting of the transistors Q10 to Q18 and IC9, which stabilizes the output voltage
and reduces the ripple voltages. Also, the series regulator performs the remote
sensing function (by using No. 2 to No. 5 pins of Connector CN3) in order to keep
the voltage of the main-board on the load side constant.
The variable resistor, R152, is for controlling the DC output voltages of ±5 V (ANA)
and ±12 V (ANA). The DC output voltages of ±5 V (ANA) and ±12 V (ANA) are the
tracking outputs (voltages of 4 outputs vary with each other).
# Circuit No. 5 / 7
The variable resistor, R73, is used to adjust the regulated output voltage of +5 V DC
(DIG).
#Circuit No. 6 / 7
The posistor, R 33, shows high resistance property when its temperature increases
over 90°C (due to the temperature rises in Q10 or Q12), and stops IC2 and IC6
oscillations, causing disconnection of the voltage output circuits (through activation
of the overheat protection circuit). Releasing of the overheat protection circuit from
its activated mode must be made by confirming the heat-sink temperature of the
protection circuit to be cooled under 80°C, by leaving the unit more than five
seconds while the AC inlet plug out of the AC receptacle is disconnected.
The posistor, R160, becomes high resistance when its temperature increases over
80°C (due to the temperature rises in Q14 or Q16), and stops IC2 and IC6
oscillations, causing disconnection of the voltage output circuits (through activation
of the overheat protection circuit). Releasing of the overheat protection circuit from
its activated mode must be made by confirming the heat-sink temperature of the
protection circuit to be cooled under 70°C, by leaving the unit more than five
seconds while the AC inlet plug out of the AC receptacle is disconnected.
The posistor, R166, becomes high resistance when the temperature of R 166
increases over 110°C due to the temperature rise in Q1, and stops IC2 and IC6
oscillations which cause disconnection of the voltage output circuits (through
activation of the overheat protection circuit). Releasing of the overheat protection
circuit from its activated mode must be made by confirming the heat-sink
temperature of the protection circuit to be cooled under 100°C, by leaving the unit
more than five seconds while the AC inlet plug out of the AC receptacle is
disconnected.
# Circuit No. 7 / 7
The IC2 in the circuit of the switching power control ICs receives the power which is
fed by the auxiliary power supply (circuit No.6/7) consisting of the transistor Q4 and
the transformer T2, to output the driving signals (Gate signals) for the transistor Q6
(circuit No.5/7); and drives the Main power supply-A (circuit No.5/7) consisting of the
The IC6 in the circuit of the switching power control ICs receives the power which is
fed by the auxiliary power supply (circuit No.6/7) consisting of the transistor Q4 and
the transformer T2, to output the driving signals (Gate signals) for the transistor Q8
(circuit No.3/7); and drives the Main power supply-B (circuit No.3/7) consisting of the
transformer T4 and others. The Main power supply-B generates the output voltages
of ±5 V DC (for ANA circuit), ±12 V DC (for ANA circuit), and -4.5V DC (for DIG
circuit).
This chapter contains procedures suitable for determining if the LT Series Digital
Storage Oscilloscope performs correctly and as warranted.
They check all the characteristics listed in subsection 5.1.1.
Because they require time and suitable test equipment, you may not need to
perform all of these procedures, depending on what you want to accomplish.
This subsection lists the characteristics that are tested in terms of quantifiable
performance limits.
• Input Impedance
• Leakage Current
• Noise
• DC Gain Accuracy
• Offset Accuracy
• Bandwidth
• Trigger Level
• Smart Trigger
• Time Base Accuracy
• Overshoot and Rise Time
• Overload
The last pages of this document contain LT Series test records in the format
tables. Keep them as masters and use a photocopy for each calibration.
5.3 Turn On
If you are not familiar with operating the LT Series, read the operator's manual.
§ Wait for about 20 minutes for the scope to reach a stable operating
temperature, and verify
The impedance values for 50Ω and 1MΩ couplings are measured with a high
precision digital multimeter. The DMM is connected to the DSO in 4 wire
configuration (input and sense), allowing for accurate measurements.
a. DC 1MΩ
§ Connect it to Channel 1.
§ Record the measurements in Table 2, and compare the test results to the
limits in the test record.
b. AC 1MΩ
§ Record the measurements in Table 2, and compare the results to the limits in
the test record.
c. DC 50Ω
§ Repeat the test for all input channels. Record the measurements in Table 2,
and compare the results to the limits in the test record.
5.4.2 External Trigger Input Impedance
a. DC 1MΩ
§ Record the test result in Table 2, and compare the result to the limits in
the test record.
b. DC 50Ω
Trigger on : EXT
External : DC 50Ω
§ Record the input impedance in Table 2, and compare the result to the limit in
the test record.
The leakage current is tested by measuring the voltage across the input channel.
Test limit
DC 1MΩ : ±1 mV
a. DC 50Ω
External : DC 50Ω
Noise tests with open inputs are executed on all channels for both 1MΩ and 50Ω input
impedance, with AC and DC input coupling, 0 mV offset, at a gain setting of 5mV/div.,
and different Time base settings.
The scope parameters functions are used to measure the RMS amplitude.
Test limits
Procedure
a. DC 1MΩ
§ Measure for at least 50 sweeps, then press Stop to halt the acquisition.
§ Record the four high sdev parameter values in Table 4, and compare the test
results to the limits in the test record.
§ Repeat the test for Time base : 1 msec/div., 50 µsec/div., and 2 µsec/div.
§ Record the measurements (high sdev of 1,2,3,4) in Table 4, and compare the
results to the limits in the test record.
b. AC 1MΩ
§ Measure for at least 50 sweeps, then press Stop to halt the acquisition.
§ Measure for at least 50 sweeps, then press Stop to halt the acquisition.
§ Record the four high sdev parameter values in Table 4, and compare the test
results to the limits in the test record.
§ Record the measurements (high sdev of 1,2,3,4) in Table 4, and compare the
results to the limits in the test record.
Test limit
Procedure
Redefine A : A=1-1
Use Math? : Yes
Math Type : Arithmetic
Difference : 1 minus 1
Redefine B : B=2
Use Math? : No
Trace B is Zoom of 2
Redefine D : D=M1
Use Math? : No
Trace D is Zoom of M1
Measure : Parameters
Mode : Pass
Testing : On
Select : Change Test Conditions
On line : Action
If : Fail
Then : Stop Yes
Store No
Dump No
Beep Yes
Pulse No
On line 1 : Test on Mask
True if all points of 1 are inside mask D
On line 2 : Test on Mask
True if all points of 2 are inside mask D
On line 3 : Test on Mask
True if all points of 3 are inside mask D
On line 4 : Test on Mask
True if all points of 4 are inside mask D
From : W'form
Into : M1
Use W'form : A
Delta V : 0.20 div
Delta T : 0.00 div
§ After 1000 sweeps for LT322 and LT224, or 400 sweeps for LT344 and
LT342, or after 100 sweeps for LT344L check that the number of Passed equals
the number of Sweeps on all 4 Channels.
Procedure
§Recall LTxxxP017.PNL or configure the DSO:
Change parameters
§ For the low sensitivities: 2 mV, 5 mV, 10 mV and 20 mV/div., connect the test
equipment as shown in Figure 5-1.
§
Figure 5-1: DC 1MΩ Accuracy Equipment Setup for 2,5,10 and 20 mV/div.
§ For 100 mV/div, connect the test equipment as shown in Figure 5-2.
§ For 5V/div no attenuator is required, connect the test equipment as shown in
Figure 5-3.
4) After 100 sweeps, read off the DSO mean parameter, and record the
measurement in Table 6, column Mean.
§ For each DC voltage applied to the DSO input, repeat parts 1), 2), 3) and 4).
§ Repeat step 5.7 Procedure for the other channels, substituting channel controls
and input connector.
The offset test is done at 5mV/div, with a signal of ±1 Volt cancelled by an offset
of the other polarity.
Specifications
Procedure
1) Verify that the displayed trace A : Average (1) is on the screen, near the
center horizontal graticule line. If the trace is not visible, modify the DC voltage
reference source output until the trace is within ± 2 divisions of center.
2) Connect the DMM and record the voltage reading in Table 7, column DMM.
5) After 100 sweeps, Read off the DSO Mean parameter voltage, and record
the measurement in Table 7, column Mean.
§ Repeat the test for the other channels, substituting channel controls and input
connector. Record the measurements in Table 7.
§ Repeat the test the other offset settings –1V and 0V.
Recall LTxxxP019.PNL for Input offset –1V.
Recall LTxxxP020.PNL for Input offset 0V.
§ Record the test result in Table 7, and compare the Difference ( ∆ ) to the
corresponding limit in the test record.
The purpose of this test is to ensure that the entire system has a bandwidth of at
least 500MHz or 200MHz. An external source is used as the reference to provide
a signal where amplitude and frequency are well controlled.
The amplitude of the generator as a function of frequency and power is calibrated
using an HP8482A sensor on an HP437B power meter or equivalent.
Procedure
§ Zero and calibrate the HP8482A power sensor using the power meter Power
Ref output.
§Read the displayed generator output amplitude, and record it in the third
column of Table 8.
§Repeat the above measurement for 1.1 MHz, 10.1 MHz, 100.1 MHz,
200.1MHz,
300.1 MHz & 500.1 MHz. Record the generator output amplitude readout in the
third column of Table 8.
§ Disconnect the RF output of the HP8648B generator from the HP8482A power
sensor.
§ Measure for at least 100 sweeps, record the average value of sdev(1) I
nTable 8
§ Repeat the above 3 steps for Channel 2, Channel 3 & Channel 4 substituting
channel controls and input connector. Record the measurements in Table 8.
§ Repeat the above measurement for all channels for 1.1 MHz, 10.1 MHz,
100.1 MHz, 200.1MHz, 300.1 MHz and 500.1 MHz and record the values in
Table 8.
§ Read the displayed generator output amplitude, and record it in the third
column of Table 9.
§ Repeat the above measurement for 1.1 MHz, 10.1 MHz, 100.1 MHz, 200.1MHz,
300.1 MHz & 500.1 MHz. Record the generator output amplitude readout in the
third column of Table 9.
§ Disconnect the RF output of the HP8648B generator from the HP8482A power
sensor.
§ Measure for at least 100 sweeps, record the average value of sdev(1) in Table
9
§ Repeat the above 3 steps for Channel 2, Channel 3 & Channel 4 substituting
channel controls and input connector. Record the measurements in Table 9.
§ Repeat the above measurement for all channels for 1.1 MHz, 10.1 MHz,
100.1 MHz, 200.1MHz, 300.1 MHz and 500.1 MHz and record the values in
Table 9.
§ Increase the generator frequency until sdev(1) = 140 mV. (typically 25 MHz)
§ Check that the frequency is within the limits specified in Table 10.
§ Increase the generator frequency until sdev(1) = 140 mV. (typically 200 MHz)
§ Repeat the 25 MHz and 200 MHz Bandwidth limiter tests for the other
channels, substituting channel controls and input connector.
§ Record the test results in Table 10, and compare the results to the limits.
The trigger capabilities are tested for several cases of the standard edge trigger:
a. DC Coupling
§ Use the "cursor position" knob, to move the Time marker at 0.0 µs
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
100 mV in the icon 1, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Repeat steps 5.10.1.a. and 5.10.1.b. for all input channels, substituting channel
controls ( DC, HFREJ, Pos, Neg ) and input connector.
Recall LTxxxP028.PNL for Channel 2, LTxxxP029.PNL for Channel 3,
LTxxxP030.PNL for Channel 4, or select Trigger on the Channel under
test.
The Trigger level is displayed in either the icon 2, 3 or 4
a. DC Coupling
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
100 mV in the icon 1, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
100 mV in the icon 1, at top left.
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Repeat steps 5.10.2.a. and 5.10.2.b. for all input channels, substituting channel
controls ( DC, HFREJ, Pos, Neg ) and input connector.
Recall LTxxxP032.PNL for Channel 2, LTxxxP033.PNL for Channel 3,
LTxxxP034.PNL for Channel 4, or select Trigger on the Channel under test.
The Trigger level is displayed in either the icon 2, 3 or 4
a. DC Coupling
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
100 mV in the icon 1, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 11 the level readout displayed below
100 mV in the icon 1, at top left.
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Acquire 10 sweeps and record in Table 12 the level readout displayed below
100 mV in the icon 1, at top left.
§ Repeat steps 5.10.3.a. and 5.10.3.b. for all input channels, substituting channel
controls ( DC, HFREJ, Pos, Neg ) and input connector.
Recall LTxxxP036.PNL for Channel 2, LTxxxP037.PNL for Channel 3,
LTxxxP038.PNL for Channel 4, or select Trigger on the Channel under test.
The Trigger level is displayed in either the icon 2, 3 or 4
§ Record the measurements in Table 11 & 12 and compare the test results to the
corresponding limits in the test record.
a. DC Coupling
§ Set the output of the LeCroy LW420 or equivalent audio frequency signal
generator to 1 kHz.
§ Adjust the sine wave output amplitude to get 8 divisions peak to peak .
§ Use the "cursor position" knob, to move the Time marker at 0.0 µs
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
a. DC Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
a. DC Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
a. DC Coupling
§ Set the output of the LeCroy LW420 or equivalent audio frequency signal
generator to 1 kHz.
§ Adjust the sine wave output amplitude to get 8 divisions peak to peak .
§ Use the "cursor position" knob, to move the Time marker at 0.0 µs
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
a. DC Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
b. HFREJ Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
a. DC Coupling
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Acquire 10 sweeps and record in Table 13 the level readout displayed below
100 mV in the icon 2, at top left.
§ Compare the test results to the corresponding limit in the test record.
§ Connect the RF output of the HP8648B generator through a 5ns 50 Ohm BNC
coaxial cable into Channel 1.
§ Set the generator frequency to 100 MHz. Adjust the generator output amplitude
to get 5 divisions peak to peak .
§ Check that the scope Triggers. Record the test result in Table 14.
§ Check that the scope doesn’t trigger : slow trigger and no flashes in box next
to normal. Record the test result in Table 14.
§ Check that the scope Triggers. Record the test result in Table 14.
§ Check that the scope doesn’t trigger : slow trigger and no flashes in box.
Record the test result in Table 14.
§ Check that the scope Triggers. Record the test result in Table 14.
§ Set Width < 100 nsec Off and Width > 100 nsec ON
§ Check that the scope doesn’t trigger : slow trigger and no flashes in box next
to normal. Record the test result in Table 14.
§ Set Width < 100 nsec Off and Width > 100 nsec ON
§ Check that the scope Triggers. Record the test result in Table 14.
§ Set Width < 100 nsec On and Width > 100 nsec Off
§ Check that the scope doesn’t trigger : slow trigger and no flashes in box.
Record the test result in Table 14.
An external sine wave generator of 0.1 MHz with a frequency accuracy better than
1 PPM is used.
Procedure
§ Connect the RF output of the HP8648B generator through a 5ns 50 Ohm BNC
coaxial cable into Channel 1.
§ Recall Memory 1 to A
§ Press : MEASURE TOOLS
§ Change parameters
§ On line 1 : Delay of 1
§ On line 2 : Delay of A
§ Check that the displayed Channel 1 trace is aligned with the sine wave from
memory 1.
§ This allows the accuracy of the time base clock to be checked 5000 periods
after the trigger point. A difference of ±0.5 µsec corresponds to ±10 PPM.
§ Record the test result in Table 15, and compare it to the limit in the test record.
Test limit
Overshoot < 12%, rise time < 0.80 ns LT344/L, LT342/L, LT322
Overshoot < 10%, rise time < 1.9 ns LT224
Procedure
Change Parameters :
On displayed trace : A
On line 1 :
Measure : Over + of A
On line 2 :
Measure : Rise of A
§After 100 sweeps record over+(A) and rise(A) measurements in Table 16.
§ Repeat the DC 50Ω Overshoot and Rise time test for the other channels,
substituting channel controls and input connector.
§ Record the test results in Table 16, and compare the results to the limits.
Test limit
§ When the channel overload trips press Stop to halt the acquisition.
§ Measure on the screen the overload trip time and record it in Table 17.
§ Repeat the above tests for Channel 2, Channel 3 and Channel 4 substituting
the input connector.
§ Record the test results in Table 17, and compare the results to the limits.
§ For all Channel clear the overload by selecting DC 50Ω in the Coupling menu.
§ For all channels check that the overload doesn't trip for at least 60 seconds.
Record the test result in Table 17.
§ When the External overload trips press Stop to halt the acquisition.
§ Measure on the screen the overload trip time and record it in Table 17.
§ Check that the External overload doesn't trip for at least 60 seconds.
Record the test result in Table 17.
Performance Certificate
LT Series Manual Performance Test Procedure Version B - September 1999
Software Version
Temperature Humidity %
Place of Inspection
Approved By
Signal Generator
Radio Frequency
Signal Generator
Audio Frequency
Voltage Generator
DC Power Supply
Step Generator
Fast Pulser
Digital Multimeter
Voltmeter, Ohmmeter
Traceable to
1 of 12
LT Series Test Record
Coupling Volts/div. Measured Measured Measured Measured Measured Measured Lower Upper
Channel 1 Channel 2 Channel 3 Channel 4 External External/10 Limit Limit
Impedance Impedance Impedance Impedance Impedance Impedance
Ω, MΩ Ω, MΩ Ω, MΩ Ω, MΩ Ω, MΩ Ω, MΩ Ω, MΩ Ω, MΩ
DC 1MΩ 50 mV/div 0.99 MΩ 1.01 MΩ
DC 1MΩ 200 mV/div N/A N/A 0.99 MΩ 1.01 MΩ
AC 1MΩ 50 mV/div N/A N/A 1.188 MΩ 1.212 MΩ
AC 1MΩ 200 mV/div N/A N/A 1.188 MΩ 1.212 MΩ
DC 50Ω 50 mV/div N/A 49.5 Ω 50.5 Ω
DC 50Ω 200 mV/div N/A N/A 49.5 Ω 50.5 Ω
2 of 12
LT Series Test Record
3 of 12
LT Series Test Record
Volts Attenu PS Measured Channel 1 Measured Channel 2 Measured Channel 3 Measured Channel 4 Limits
/div ator Out V & mV V & mV V & mV V & mV
Put DMM Mean ∆1 DMM Mean ∆2 DMM Mean ∆3 DMM Mean ∆4
1 (A) Mean− 2 (B) Mean− 3 (C) Mean− 4 (D) Mean−
DMM DMM DMM DMM
2 mV X 100 +0.6 V ±1.25mV
-0.6V ±1.25mV
5 mV X 100 +1.5 V ±1.625 mV
-1.5V ±1.625 mV
10 mV X 100 +3.0 V ±2.25 mV
-3.0V ±2.25 mV
20 mV X 100 +6.0 V ±2.5 mV
-6.0V ±2.5 mV
50 mV X 10 +1.5V ±7.25mV
-1.5V ±7.25mV
0.1 V X 10 +3.0 V ±13.5mV
-3.0V ±13.5mV
1V X1 +3.0 V ±126mV
-3.0V ±126mV
5V X1 +15V ±0.626V
-15V ±0.626V
4 of 12
LT Series Test Record
Volt Coupling DSO PS Measured Channel 1 Measured Channel 2 Measured Channel 3 Measured Channel 4 Limits
/div. DC offset output V & mV V & mV V & mV V & mV
DMM Mean ∆1 DMM Mean ∆2 DMM Mean ∆3 DMM Mean ∆4
1 (A) Mean− 2 (B) Mean− 3 (C) Mean− 4 (D) Mean−
DMM DMM DMM DMM mV
5mV 1 MΩ +1 V −1 V ±16.2
5mV 1 MΩ -1 V +1 V ±16.2
5mV 1MΩ 0V 0V ±1.2
5 of 12
LT Series Test Record
LT224
Frequency Measured Generator Measured Measured Measured Measured Lower Upper
Power Amplitude Channel 1 Channel 2 Channel 3 Channel 4 Limit Limit
Sdev(1) Ratio(1) Sdev(2) Ratio(2) Sdev(3) Ratio(3) Sdev(4) Ratio(4)
MHz mW mV mV to 0.3 mV to 0.3 mV to 0.3 mV to 0.3
0.300 0.200 N/A N/A N/A N/A N/A N/A
1.1 0.200 0.92 1.08
10.1 0.200 0.92 1.08
100.1 0.200 0.80 1.20
200.1 0.200 0.70 N/A
6 of 12
LT Series Test Record
LT344/L, LT342/L,LT322
Frequency Measured Generator Measured Measured Measured Measured Lower Upper
Power Amplitude Channel 1 Channel 2 Channel 3 Channel 4 Limit Limit
Sdev(1) Ratio(1) Sdev(2) Ratio(2) Sdev(3) Ratio(3) Sdev(4) Ratio(4)
MHz mW mV mV to 0.3 mV to 0.3 mV to 0.3 mV to 0.3
0.300 0.800 N/A N/A N/A N/A N/A N/A
1.1 0.800 0.92 1.08
10.1 0.800 0.92 1.08
100.1 0.800 0.86 1.14
300.1 0.800 0.80 1.20
500.1 0.800 0.70 N/A
LT224
Frequency Measured Generator Measured Measured Measured Measured Lower Upper
Power Amplitude Channel 1 Channel 2 Channel 3 Channel 4 Limit Limit
MHz mW mV Sdev(1) Ratio(1) Sdev(2) Ratio(2) Sdev(3) Ratio(3) Sdev(4) Ratio(4)
mV to 0.3 mV to 0.3 mV to 0.3 mV to 0.3
0.300 0.800 N/A N/A N/A N/A N/A N/A
1.1 0.800 0.92 1.08
10.1 0.800 0.92 1.08
100.1 0.800 0.80 1.20
200.1 0.800 0.70 N/A
7 of 12
LT Series Test Record
LT224
Global Amplitude Measured Measured Measured Measured Lower Upper
BWL at 300 kHz Channel 1 Channel 2 Channel 3 Channel 4 Limit Limit
8 of 12
LT Series Test Record
9 of 12
LT Series Test Record
Table 13: External & Ext/10 DC and HFREJ Trigger Test Record
10 of 12
LT Series Test Record
0.8 1.9
11 of 12
LT Series Test Record
12 of 12
6. Maintenance
6.1 Introduction
The symbol used in this manual indicates dangers that could result in
personal injury.
The symbol used in this manual identify conditions or practices that could
damage the instrument.
The following servicing instructions are for use by qualified personnel only.
Do not perform any servicing other than contained in service instructions. Refer to
procedures prior to performing any service.
Exercise extreme safety when testing high energy power circuits. Always
turn the power OFF, disconnect the power cord, discharge the cathode ray tube
and all capacitors before disassembling the instrument.
Any static charge that builds on your person or clothing may be sufficient to
destroy CMOS components, integrated circuits, Gate array’s..........etc.
In order to avoid possible damage, the usual precautions against static electricity
are required.
• Handle the boards in antistatic boxes or containers with foam specially designed
to prevent static build-up.
• Ground yourself with a suitable wrist strap.
• Disassemble the instrument at a properly grounded work station equipped with
antistatic mat.
• When handling the boards, do not touch the pins.
• Stock the boards in antistatic bags.
Maintenance 6-1
6.2 Software Update Procedure
After any software change, reboot the scope or perform a general reset of the
instrument by simultaneously depressing the F2 button, the F5 menu button and
the CH1 button.
• Format a single high density 1.44Mb floppy in the scope ( not in the PC )
• Create a directory LECROY_P in the root directory of the disk
• Copy the file VXFOUND.FLA, into the directory created above.
• Label this disk “Firmware Update Disk “
• Cycle power to the scope with no floppy inserted.
• When the scope boots enter the “Show Status“ , “System“ menu to verify that
version 08.1.1 or later is currently running.
• Insert the Firmware Update Disk into the scope’s floppy drive.
• Select “Utilities“, “Special Modes“, “Firmware Update“, “Update from Floppy“.
• Press twice “Update Flash“.
• Wait for two minutes until displaying “FLASH UPDATE SUCCESSFUL”on the
DSO.
• When the operation is complete remove the floppy and reboot the scope.
• When the scope boots enter the “Show Status“, “System “menu to verify
that the new version is currently running.
Warning:
Reprograming the Flash memory is a procedure to be perform with
care.
Any loss of power during the update process could cause the scope
to require Factory service.
Note that once software has update it is not possible to revert to the
previous software version.
6-2 Maintenance
• Cycle power to the scope with no floppy or card inserted.
• When the scope boots enter the “Show Status“ , “System“ menu to verify that
version 8.1.1 or later is running.
• Insert the Card created above into the PCMCIA Slot.
• Select “Utilities“, “Special Modes“, “Firmware Update“, “Update from Card“.
• Press twice “Update Flash“.
• Wait for two minutes until displaying “FLASH UPDATE SUCCESSFUL”on the
DSO.
• When the operation is complete remove the card and reboot the scope.
• When the scope boots enter the “Show Status“, “System “ menu to verify that
the new version is currently running.
The scope ID and scope s/n: are used to request a Software Option Key
• Enter the scope's Software Options menu (located under the STATUS,
SYSTEM menu ).
• Note the SCOPEID, i.e: C63B9B-A5 and Scope s/n: LT34400156 that are
found on that menu.
Then check in the system summary, by using the show status button on the front
panel, the scope serial number.
Maintenance 6-3
6.3 Equipment and Spare Parts Recommended for Service
The other parts are not on the above list because the probability of failure is very
low.
See chapter 7 and 8 for mechanical and electrical replaceable parts.
The serial number of the LT Series oscilloscope is loaded in the real time clock
memory which is battery backed up. If it becomes necessary to replace the
processor board, the serial number must be loaded in the memory of the new
board by using LeCroy program " LeCalsoft " under GPIB remote control.
To run " LeCalsoft " type SKP.exe, in the main menu type S, and follow the
instructions, use five digits to enter the serial number ( i.e. 10281).
Then check in the system summary, by using the show status button on the front
panel, the scope serial number.
6-4 Maintenance
6.4.2 Main Board Exchange Procedure
Note ; Do not press the other menu keys, or some calibration data of Main Board
may be lost.
This section does not include the other manual adjustments of Main Board,
and does not contain any instructions or descriptions about Main Board calibration.
Main Board adjustments required complex test set-up and calibration Software.
For information on the availability of the tester and software, contact your nearest
LeCroy service centre.
After Power Board is exchanged, confirm the voltage as the following procedure.
• Remove the upper cover and the lower cover. (see 7.G)
• Turn the scope upside down.
• Turn on the power, set the scope to Auto Trigger and 500MS/s.
• Confirm the following voltage on solder side of Main Board within ten minutes.
This section does not include the other manual adjustments of Power Board, and
does not contain any instructions or descriptions about Power Board calibration.
Power Board adjustments required complex test set-up.
Maintenance 6-5
For information on the availability of the tester, contact your nearest LeCroy service
centre.
6.5.1 Introduction
The power supply of the oscilloscope is protected against short circuits and
overload by means of two T6.3A / 250 V fuses located above the main plugs.
Turn off the power and disconnect the line cord from the instrument
Disconnect the instrument from other equipment.
• Open the fuse box by inserting a small flat screwdriver under the plastic cover
and remove the fuse carrier from the holder
• Remove the fuse and replace it with the proper type: T6.3 A / 250 V, LeCroy
part number: 433 162 630
Most procedures in this section will allow troubleshooting down to the BOARD
LEVEL.
6-6 Maintenance
Fan Problem See Section 6.5.4
Power Supply
See Section 6.5.5
Problem
Abnormal Image on
See Section 6.5.7
Screen
Front Panel
Controls Do not See Section 6.5.8
Operate
Performance
Verification Tests See Section 6.5.10
Fail
Floppy Disk
See Section 6.5.11
Problem
Graphic Printer
See Section 6.5.12
Problem
Centronics or
External VGA See Section 6.5.13
Video Problem
Maintenance 6-7
6.5.4 Fan Problem
Start
Y
Main AC Line
Voltage 90 to N Repair as
250V OK ? Needed.
AC Power Cord
OK ? N Repair Power
Code.
Is +12V from
Power Supply to N See Power
Fan Correct ? Supply Problem
Section 6.5.5.
Y
Replace Fan
Assembly.
Y
End
6-8 Maintenance
6.5.5 Power Supply Voltage Problem
Start
Y Y Y
Power Supply is
Broken. Replace Fan-mortor
Replace Power Assembly.
Supply Unit. Cool Down and Take Off AC
Power Cord from Power
Supply Unit over 10
seconds.
End
Maintenance 6-9
6.5.6 Display Problem
Start
Do a General Reset.
Is External VGA
Video Correct ? N Replace CPU
board.
Y
Replace Main
board.
Is LCD Back Light
Y Correct ?
Check All Cables are
Correctly Connected.
Replace Front
Panel.
N
Replace LCD
connector. Replace Back Light
Module.
End
Replace LCD.
Replace LCD.
End End
6-10 Maintenance
6.5.7 Front Panel Controls Do not Operate
Start
Y
Do a General Reset.
Is Flat Cable to
Panel Correctly N Reseat or
Installed ? Replace Flat
Cable from CPU
board J6.
Y
Replace Front
Panel.
Replace Main
Board.
End
Maintenance 6-11
6.5.8 Remote Control GPIB or RS232 Problem
Start
Is DSO
GPIB/RS232 N Change Setting
Setup Correct ? in DSO Utilities
Main Menu.
Is Appropriate
Device Settings N Change Device
Correct ? Settings.
Is RS232 Cable
Configuration N Check RS232
Correct ? Cable Pinout
from DSO to
Device.
Y
Replace CPU board.
End
6-12 Maintenance
6.5.9 Floppy Disk Drive Problem
Start
Is Cable to Floppy
Disk Drive N Fix Flat Cable
Properly from CPU board
Installed ? to Floppy Disk
Drive.
Y
Do a General Reset.
Replace Floppy
Disk Drive.
End
Maintenance 6-13
6.5.10 Performance Verification Fails
Start
Replace Main
Do all N Board
Performance
Tests Pass ?
See Section 5
End
6-14 Maintenance
6.5.11 Graphic Printer Problem
Start
Is Cable to Printer
Controller Properly N Fix Flat Cable
Installed ? from CPU Board
to Printer
Controller Board.
Replace CPU
board.
End
Maintenance 6-15
6.5.12 Centronics Problem
Start
Check Setting in
DSO Utilites Menu,
Hard Copy Setup,
Output to
Centronics.
Check Appropriate
Protocol.
Do a General
Reset.
Replace CPU
Board.
End
6-16 Maintenance
6.5.13 Hard Disk Drive Problem
Start
Check Setting in
DSO Utilites Menu,
Hard Copy Setup,
Output to Hard
Disk.
Replace CPU
Board.
End
Maintenance 6-17
Mechanical Parts & Removal
[A1] [A4]
1
2
Slide by 5 mm
[A2] [A5]
[A3]
Press
4
6
4 6
3 4 3
2 5
1
2 2
2
[C1] [C3]
1
10
[C2 ] View as the rear side of the printer unit lifted [C4]
Printer 3
5
CN6/power 3P cable
J7/FFC cable
Rear
[D1] [D2]
1
2
Front Side
J6 J1 P5
KB(+) 3x6S (NIP) KB(+) 3x6S (NIP) KB(+) 3x6S (NIP)
P11
J5
J3
J8
J4
Rear Side
1
3
[E3]
[F1a]
Press
2
21J1, 21J2
3
21J3
20J4
16J2
[G1] [G3]
2
1 2
Main frame
[G2]
To CN7
4 1
H1 Replaceable Parts
Item IWATSU Part Number Quantity Description
1 KBA784011 1.0 MAIN FRAME
2 KBA784911 1.0 SIDE FRAME L
3 KBA785011 1.0 SIDE FRAME R
4 MKD130061 4.0 Screw M3x6
5 MZT903161 7.0 Metallic support PSC60
[H2] 5 2 4 1
5 5
5 5
H2 Replaceable Parts 5 3
Item IWATSU Part Number Quantity Description
1 KPL143211 1.0 INVERTER PLATE UL-1
2 KBA784121 1.0 FRONT FRAME A
3 KBA784211 1.0 FRONT FRAME B
4 MKB130062 2.0 Screw M3x6
5 MSQ901661 8.0 Screw TT2(+) 3x8S
LCD
LQ084VIDG21
[H4] [H5]
2
3
H3 to H5 Replaceable Parts
Item IWATSU Part Number Quantity Description
1 MSQ903511 4.0 Screw PKB 2.5x8S
2 21302-5615 1.0 LCD CONNECTOR BOARD
UL-M
3 21302-5680 1.0 LT LCD UNIT
See Fig [H5]
7
2
1
[H7]
4
[H8]
2:KEY RUBBER
5:KNOB-D9
6:KNOB-D12
5:KNOB-D9
6:KNOB-D12
[I1] [I2]
2 3
5
• Fan : Check the fan cable direction. Note the air flow, the fan extracts air from
the unit and expels it.
• Feet : Check that the lower feet and rear cord rack are aligned and properly
tightened before re-assembly.
• Floppy : Adjust the floppy position to obtain the front face tangential to face of
the front panel. Check that the door is moving freely and shuts correctly.
Insert a floppy and eject it to check the mechanism.
• Front Panel : Check that knobs rotate freely, are the right size and in the right
place. Do not forget the gasket, see Fig [H6].
• Main Board :The main card must be parallel and tacked against the bend of the
lower cover. Being careful not to bend the board or damage components
underneath.
• Processor : Check that the memory card insertion guide is correctly inserted in
the front panel.
• Printer : If the graphic printer is used, before closing don’t forget to plug input
cable to the option and the driver cable to the processor card.
This chapter contains the schematics, layouts and parts list of the following
subassemblies:
CPU Board
Printer
Power Supply
Panel Board
LCD Connector
OVER ALL (1)
CPU 31 DRAM 32
CIRCUIT IWATSU DESCRIPTION CIRCUIT IWATSU DESCRIPTION
REFERENCE PART NO. REFERENCE PART NO.
31C1 to 31C3 DCC810571 C2012F 1H 104Z A TD0804N 32IC7, 32IC8 DCN997011 SIMM 52706-7220
31C4, 31C5 DCE219051 SME-CE04W 1A 101M TC04R 32IC9 to 32IC11 DIC199381 74F157AF
31C6, 31C76 DCC810571 C2012F 1H 104Z A TD0804N 32IC13 DIC471641 EPM 7032STC44-10 (K0323DRM)
31C149 to 31C151 DCC810571 C2012F 1H 104Z A TD0804N 32IC14 DIC471831 PALCE16V8H-10JC/4 K0314CAS
31C187 DCC820021 C2012F 1C 105Z A TD84N 32IC84 DIC483711 74HC374F/AF TE2412B
31IC1 DIC560411 XPC 603PFE166LC 32P2 DCN125971 CONNECTOR A1-10PA-2.54DSA
31IC2 DIC484991 MC 88916DW80R2 TE2412B 32Q8 DTR890521 DTC143TK/RN1410 TE0804L
31IC3 DHF060141 FXO-31FH 16.000MHZ TE1608B 32R19 DRZ832411 RK73H 2A 4.7K F TD0804N
31IC4 DIC699231 M51957BFP TE1208F 32R20 DRZ832341 RK73H 2A 2.4K F TD0804N
31IC6 DIC471621 74VHCT04AF 32R85 DRZ832491 RK73H 2A 10K F TD0804N
31IC77 to 31IC79 DIC484491 74VHCT541AF EL TE2412B 32R96, 32R97 DRZ832091 RK73H 2A 220 F TD0804N
31L12 DCL119361 BL02RN2-R62 TD04N 32R100, 32R101 DRZ832091 RK73H 2A 220 F TD0804N
31R2, 31R3 DRZ833011 RK73H 2A 47 F TD0804N 32R129 to 32R134 DRZ832131 RK73H 2A 330 F TD0804N
31R4 DRZ832131 RK73H 2A 330 F TD0804N 32RA26 to 32RA28 DFB810041 RAC16 4D 220J A TD0804M
31R5 DRZ832971 RK73H 2A 1.0M F TD0804N 32RA29, 32RA90 DFB810051 RAC16 4D 103J A TD0804M
31R7 to 31R9 DRZ832011 RK73H 2A 100 F TD0804N
31R12 DRZ832011 RK73H 2A 100 F TD0804N
31R14 DRZ833441 RK73H 2A 10 F TD0804N
31R15 DRZ832251 RK73H 2A 1.0K F TD0804N
31R17 DRZ832491 RK73H 2A 10K F TD0804N
31R18 DRZ832391 RK73H 2A 3.9K F TD0804N
31R95 DRZ831501 MCR10 000E TD0804N
31RA1 to 31RA5 DFB810051 RAC16 4D 103J A TD0804M
31RA6, 31RA7 DFB810081 RAC16 4D 102J A TD0804M
31RA8 to 31RA24 DFB810051 RAC16 4D 103J A TD0804M
31RA25 DFB810081 RAC16 4D 102J A TD0804M
PRINTER 43 PRINTER 43
CIRCUIT IWATSU DESCRIPTION CIRCUIT IWATSU DESCRIPTION
REFERENCE PART NO. REFERENCE PART NO.
43C1 to 43C9 DCC816601 C2012CH 1H 101J A TD84N 43R29, 43R30 DRD137031 PSS1/4S 3.0ΩJ TA21N
43C10 DCC820021 C2012F 1C 105Z A TD84N 43R31 DRZ832251 RK73H 2A 1.0KΩF TD0804N
43C11, 43C12 DCC816521 C2012CH 1H 220J A TD84N 43RL1 DKD016271 JV-5S-KT
43C13 to 43C15 DCC810571 C2012F 1E 104Z A TD84N 43S1 DSW017502 SWITCH TKM-D1-H38
43C16 DCE249391 SME-CE04W 1H 101M TC04R 43X1 DHF013521 AT-51 10.00MHZ
43C17, 43C18 DCC810571 C2012F 1E 104Z A TD84N
43C20 to 43C22 DCE935371 LXV 35VB-2200M M30
43C24 DCC810511 C2012F 1H 103Z A TD84N
43C25 DCC810571 C2012F 1E 104Z A TD84N
43C26, 43C27 DCC816761 C2012CH 1H 471J A TD84N
43C28, 43C29 DCC810921 C2012B 1H 472K A TD84N
43C30, 43C31 DCC816601 C2012CH 1H 101J A TD84N
43C32, 43C33 DCC810571 C2012F 1E 104Z A TD84N
43C34 DCE219051 SME-CE04W 1A 101M TC04R
43C36, 43C37 DCC810571 C2012F 1E 104Z A TD84N
43D1 to 43D4 DDD820031 D1FS4 TE1204R
43D5, 43D6 DDD810241 1SS 272 TE0804R
43D7 DDD830181 RD12M-T1B B/MA3120 TE0804L
43IC1 DIC554551 µPD 78P014GC-AB8 (NEC)
43IC2 DIC699231 M51957BFP TE1208F
43IC3 DIC992271 UDN 2916LB
43IC4 DIC484491 74VHCT541AF EL TE2412B
43IC6 DIC619101 NJM 4558M (TE3) TE1208L
43IC7 DIC495721 74HC123AF TE1612B
43J1 DCN129381 52808-2691 TE4412B
43L1 to 43L5 DCL119361 BL02RN2-R62 TD04N
43P1 DCN995081 B16B-PH-K-S
43P2 DCN994271 B4B-PH-K-S
43P3 DCN995251 B5B-PH-K-S
43P4 DCN125991 CONNECTOR 53258-0310
43P4 DCN125991 CONNECTOR 53258-0310
43Q1 DTR890431 DTA114EK/RN2402 TE0804L
43Q2 DTR215791 2SK 2287
43Q4 DTR890551 DTC114EK/RN1402 TE0804L
43R1 to 43R6 DRZ832491 RK73H 2A 10KΩF TD0804N
43R7 DRZ832391 RK73H 2A 3.9KΩF TD0804N
43R8 DRZ832411 RK73H 2A 4.7KΩF TD0804N
43R10, 43R11 DRZ832591 RK73H 2A 27KΩF TD0804N
43R12, 43R13 DRZ832251 RK73H 2A 1.0KΩF TD0804N
43R14, 43R15 DRD137031 PSS1/4S 3.0ΩJ TA21N
43R16 DRZ832411 RK73H 2A 4.7KΩF TD0804N
43R17 DRZ832591 RK73H 2A 27KΩF TD0804N
43R18 DRZ832411 RK73H 2A 4.7KΩF TD0804N
43R19 DRZ832071 RK73H 2A 180ΩF TD0804N
43R20 DRZ832531 RK73H 2A 15KΩF TD0804N
43R21 DRZ832491 RK73H 2A 10KΩF TD0804N
43R22 DRZ833551 RK73H 2A 33ΩF TD0804N
43R23 DRZ832831 RK73H 2A 270KΩF TD0804N
43R24 DRZ832531 RK73H 2A 15KΩF TD0804N
43R25 DRZ832391 RK73H 2A 3.9KΩF TD0804N
43R26 DRZ832361 RK73H 2A 3.0KΩF TD0804N
43R28 DRZ832071 RK73H 2A 180ΩF TD0804N
PANEL BOARD 40
CIRCUIT IWATSU DESCRIPTION
REFERENCE PART NO.
40BZ1 DSB040911 CB-09FP
40C1 DCE219051 SME-CE04W 1A 101M TC04R
40C2 DCC810921 C2012B 1H 472K A TD84N
40C3 to 40C6 DCC810571 C2012F 1E 104Z A TD84N
40C7 to 40C22 DCC816561 C2012CH 1H 470J A TD84N
40D1 to 40D11 DDD810241 1SS 272 TE0804R
40D14 to 40D17 DDD810241 1SS 272 TE0804R
40D18 DDD074141 MBG5064X
40IC1 DIC891051 MFP414 FRONT PANEL IC
40IC2 DIC499371 74HC74F/AF TE1612B
40IC3 DIC499321 74HC04F/AF TE1612B
40J1 DCN125021 52793-2290 TE4412B
40J2 DCN126101 MDF7-16DP-2.54DSA (01)
40Q1, 40Q2 DTR890521 DTC143TK/RN1410 TE0804L
40R1 DRZ832051 RK73H 2A 150ΩF TD0804N
40R2 DRZ832491 RK73H 2A 10KΩF TD0804N
40R3 DRZ832631 RK73H 2A 39KΩF TD0804N
40R4, 40R5 DRZ832491 RK73H 2A 10KΩF TD0804N
40RA1 to 40RA6 DFB810051 RAC16 4D 103J A TD0804M
40S1, 40S2 DME990401 ROTARY ENCODER EC16B241040B
40S3 DME990411 ROTARY ENCODER EC16B242040A
40S4 to 40S7 DME990401 ROTARY ENCODER EC16B241040B
40S8 DME990411 ROTARY ENCODER EC16B242040A
40S9, 40S10 DME990401 ROTARY ENCODER EC16B241040B
40S11 DME990411 ROTARY ENCODER EC16B242040A
Mechanical Parts
Panel Board
Printer
Power Supply