BQ 24074

Download as pdf or txt
Download as pdf or txt
You are on page 1of 50

Product Sample & Technical Tools & Support &

Folder Buy Documents Software Community

bq24072, bq24073, bq24074, bq24075, bq24079


SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

bq2407x 1.5-A USB-Friendly Li-Ion Battery Charger and Power-Path Management IC


1 Features 2 Applications
1• Fully Compliant USB Charger • Smart Phones
– Selectable 100-mA and 500-mA Maximum • Portable Media Players
Input Current • Portable Navigation Devices
– 100-mA Maximum Current Limit Ensures • Low-Power Handheld Devices
Compliance to USB-IF Standard
– Input-Based Dynamic Power Management 3 Description
(VIN-DPM) for Protection Against Poor USB The bq2407x series of devices are integrated Li-Ion
Sources linear chargers and system power path management
• 28-V Input Rating with Overvoltage Protection devices targeted at space-limited portable
applications. The devices operate from either a USB
• Integrated Dynamic Power Path Management port or an AC adapter and support charge currents up
(DPPM) Function Simultaneously and to 1.5 A. The input voltage range with input
Independently Powers the System and Charges overvoltage protection supports unregulated
the Battery adapters. The USB input current limit accuracy and
• Supports up to 1.5-A Charge Current with Current start up sequence allow the bq2407x to meet USB-IF
Monitoring Output (ISET) inrush current specifications. Additionally, the input
dynamic power management (VIN-DPM) prevents the
• Programmable Input Current Limit up to 1.5 A for charger from crashing incorrectly configured USB
Wall Adapters sources.
• System Output Tracks Battery Voltage (bq24072)
The bq2407x features dynamic power path
• Programmable Termination Current (bq24074) management (DPPM) that powers the system while
• Battery Disconnect Function with SYSOFF Input simultaneously and independently charging the
(bq24075, bq24079) battery. The DPPM circuit reduces the charge current
• Programmable Pre-Charge and Fast-Charge when the input current limit causes the system output
to fall to the DPPM threshold; thus, supplying the
Safety Timers
system load at all times while monitoring the charge
• Reverse Current, Short-Circuit and Thermal current separately. This feature reduces the number
Protection of charge and discharge cycles on the battery, allows
• NTC Thermistor Input for proper charge termination and enables the system
• Proprietary Start-up Sequence Limits Inrush to run with a defective or absent battery pack.
Current
Device Information(1)
• Status Indication – Charging/Done, Power Good PART NUMBER PACKAGE BODY SIZE (NOM)
bq24072
Typical Application Circuit
bq24073
1kW
bq24074 VSON (16) 3.00 mm × 3.00 mm
1kW
bq24075
bq24079
7

9
PGOOD

CHG

(1) For all available packages, see the orderable addendum at


the end of the datasheet.
IN IN SYSTEM
13
OUT 10
11
1 mF
4.7mF
bq24075 EN 2 5
8 VSS
bq24079
BAT 2
3
System
ON/OFF 15 SYSOFF 4.7mF
Control PACK+
TEMP
ISET

TS 1
TMR

EN1

ILM
CE
14

12

16
4

PACK-
1.18kW 1.13kW

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Table of Contents
1 Features .................................................................. 1 9.3 Feature Description................................................. 15
2 Applications ........................................................... 1 9.4 Device Functional Modes........................................ 27
3 Description ............................................................. 1 10 Application and Implementation........................ 29
4 Revision History..................................................... 2 10.1 Application Information.......................................... 29
10.2 Typical Application ................................................ 29
5 Description (continued)......................................... 4
10.3 System Examples ................................................. 33
6 Device Comparison Table..................................... 4
11 Power Supply Recommendations ..................... 35
7 Pin Configuration and Functions ......................... 5
12 Layout................................................................... 35
8 Specifications......................................................... 6
12.1 Layout Guidelines ................................................. 35
8.1 Absolute Maximum Ratings ..................................... 6
12.2 Layout Example .................................................... 36
8.2 ESD Ratings.............................................................. 6
12.3 Thermal Considerations ........................................ 37
8.3 Recommended Operating Conditions....................... 7
8.4 Thermal Information .................................................. 7 13 Device and Documentation Support ................. 38
13.1 Device Support...................................................... 38
8.5 Dissipation Ratings ................................................... 7
13.2 Related Links ........................................................ 38
8.6 Electrical Characteristics........................................... 8
13.3 Trademarks ........................................................... 38
8.7 Typical Characteristics ............................................ 10
13.4 Electrostatic Discharge Caution ............................ 38
9 Detailed Description ............................................ 13
13.5 Glossary ................................................................ 38
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 14 14 Mechanical, Packaging, and Orderable
Information ........................................................... 38

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision J (January 2015) to Revision K Page

• Deleted package type code from Device Comparison Table. See the POA at the end of the data sheet. .......................... 4
• Changed ICHG Battery fast charge current range MIN specification from "150 mA" to "100 mA"........................................... 9

Changes from Revision I (January 2014) to Revision J Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1

Changes from Revision H (December 2013) to Revision I Page

• Changed resistor value from "3 kΩ" to "8.9 kΩ" in the Pin Functions table ISET Description paragraph.............................. 5
• Changed RISET spec MAX value from "3000" to "8900" in the Recommended Operating Conditions table. ......................... 7
• Changed resistor value from "3 kΩ" to "5.9 kΩ" in the Battery Charging section paragraph. .............................................. 21

Changes from Revision G (July 2011) to Revision H Page

• Changed ICHG Battery fast charge current range MIN specification from "300 mA" to "150 mA"........................................... 9

Changes from Revision F (September 2010) to Revision G Page

• Added ESD human body model specification to Abs Maximum Ratings table. ..................................................................... 6

2 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Changes from Revision E (August 2010) to Revision F Page

• Changed 10 x 45 s/kΩ to 10 x 48 s/kΩ under section Program 6.25hour......(TMR) ........................................................... 30

Changes from Revision D (June 2009) to Revision E Page

• Changed globally RT1 and RT2 to Rs and Rp..................................................................................................................... 26


• Added equations 2 and 3 plus explanations and table......................................................................................................... 26

Changes from Revision C (March 2009) to Revision D Page

• Added Device number bq24079. ............................................................................................................................................ 1

Changes from Revision B (January 2009) to Revision C Page

• Changed Maximum input current factor values. .................................................................................................................... 8

Changes from Revision A (December 2008) to Revision B Page

• Changed VBAT(REG) max value From 4.24 V To: 4.23 V.......................................................................................................... 9

Changes from Original (September 2008) to Revision A Page

• Changed device Features. ..................................................................................................................................................... 1


• Changed Typical Application Circuit....................................................................................................................................... 1
• Changed Description. ............................................................................................................................................................. 1
• Changed description of CHG pin............................................................................................................................................ 5
• Changed SYSOFF Description............................................................................................................................................... 5
• Added Figure 34 through Figure 1. ...................................................................................................................................... 10
• Changed DETAILED FUNCTIONAL DESCRIPTION section. ............................................................................................. 13
• Changed the Simplified Block Diagram ................................................................................................................................ 14
• Changed text in section - STATUS INDICATORS (PGOOD, CHG) .................................................................................... 24
• Changed Table - CHG STATUS INDICATOR...................................................................................................................... 24
• Changed Equation 8 and Equation 9 .................................................................................................................................. 26
• Changed APPLICATION CIRCUITS section........................................................................................................................ 29
• Added Using bq24075 to Disconnect the Battery from the System, Figure 42.................................................................... 34
• Changed section - Half-Wave Adaptors ............................................................................................................................... 35

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 3


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

5 Description (continued)
Additionally, the regulated system input enables instant system turn-on when plugged in even with a totally
discharged battery. The power-path management architecture also lets the battery supplement the system
current requirements when the adapter cannot deliver the peak system currents, thus enabling the use of a
smaller adapter.
The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the
internal temperature threshold is exceeded. The charger power stage and charge current sense functions are
fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status
display, and charge termination. The input current limit and charge current are programmable using external
resistors.

6 Device Comparison Table

OPTIONAL
PART NUMBER (1) (2)
VOVP VBAT(REG) VOUT(REG) VDPPM MARKING
FUNCTION
bq24072 6.6 V 4.2 V VBAT + 225 mV VO(REG) – 100 mV TD CKP
bq24073 6.6 V 4.2 V 4.4 V VO(REG) – 100 mV TD CKQ
bq24074 10.5 V 4.2 V 4.4 V VO(REG) – 100 mV ITERM BZF
bq24075 6.6 V 4.2 V 5.5 V 4.3 V SYSOFF CDU
bq24079 6.6 V 4.1 V 5.5 V 4.3 V SYSOFF ODI

(1) For all available packages, see the orderable addendum at the end of the datasheet
(2) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.

4 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

7 Pin Configuration and Functions

RGT Package
16 Pins
Top View

SYSOFF
ITERM

ISET
ISET

TMR
ISET
TMR

TMR
TD

IN
IN

IN
16 15 14 13 16 15 14 13 16 15 14 13
TS 1 12 ILIM TS 1 12 ILIM TS 1 12 ILIM
BAT 2 bq24072 11 OUT BAT 2 11 OUT BAT 2
bq24075
11 OUT
bq24073 bq24074
BAT 3 10 OUT BAT 3 10 OUT BAT 3 bq24079 10 OUT
CE 4 9 CHG CE 4 9 CHG CE 4 9 CHG
5 6 7 8 5 6 7 8 5 6 7 8

EN2
EN1
PGOOD
VSS
EN2
EN1
PGOOD
VSS

EN2
EN1
PGOOD
VSS
Pin Functions
PIN
I/O DESCRIPTION
NAME '72, '73 '74 '75, '79
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the
BAT 2, 3 2, 3 2, 3 I/O
battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby
mode. In standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low
CE 4 4 4 I
logic level to enable the battery charger. CE is internally pulled down with approximately 285 kΩ. Do not
leave CE unconnected to ensure proper operation.
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high
CHG 9 9 9 O impedance when charging is complete and when charger is disabled. Connect CHG to the desired logic
voltage rail using a 1kΩ-100kΩ resistor, or use with an LED for visual indication.
EN1 6 6 6 I Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable
USB compliance. See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled
EN2 5 5 5 I down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Adjustable Current Limit Programming Input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to program
ILIM 12 12 12 I the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery
charge current. Leaving ILIM unconnected disables all charging.
Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating
range is 4.35 V to 6.6 V (bq24072, bq24073, bq24075, and bq24079) or 4.35 V to 10.5 V (bq23074). The
IN 13 13 13 I
input can accept voltages up to 26 V without damage but operation is suspended. Connect bypass capacitor
1 μF to 10 μF to VSS.
Fast Charge Current Programming Input. Connect a 590-Ω to 8.9-kΩ resistor from ISET to VSS to program
the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at
ISET 16 16 16 I/O
ISET reflects the actual charging current and can be used to monitor charge current. See Charge Current
Translator for more details.
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the
ITERM – 15 – I termination current. Leave ITERM unconnected to set the termination current to the default 10% termination
threshold.
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and
above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT except
OUT 10, 11 10, 11 10, 11 O
when SYSOFF is high (bq24075 and bq24079 only). Connect OUT to the system load. Bypass OUT to VSS
with a 4.7-μF to 47-μF ceramic capacitor.
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is
PGOOD 7 7 7 O detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to
the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output.
When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation.
SYSOFF – – 15 I
SYSOFF is internally pulled up to VBAT through a large resistor (approximately 5 MΩ). Do not leave SYSOFF
unconnected to ensure proper operation.
Termination Disable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable
charger termination. TD is checked during startup only and cannot be changed during operation. See the TD
TD 15 – – I
section in this datasheet for a description of the behavior when termination is disabled. TD is internally pulled
down to VSS with approximately 285 kΩ. Do not leave TD unconnected to ensure proper operation.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 5


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Pin Functions (continued)


PIN
I/O DESCRIPTION
NAME '72, '73 '74 '75, '79
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device.
Thermal The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not
— — — –
Pad use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all
times.
Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS
TMR 14 14 14 I to disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers
a desired length. Leave TMR unconnected to set the timers to the default values.
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors
TS 1 1 1 I a 10kΩ NTC thermistor. For applications that do not use the TS function, connect a 10-kΩ fixed resistor from
TS to VSS to maintain a valid voltage level on TS.
VSS 8 8 8 – Ground. Connect to the thermal pad and to the ground rail of the circuit.

EN1/EN2 Settings
EN2 EN1 MAXIMUM INPUT CURRENT INTO IN PIN
0 0 100 mA. USB100 mode
0 1 500 mA. USB500 mode
1 0 Set by an external resistor from ILIM to VSS
1 1 Standby (USB suspend mode)

8 Specifications
8.1 Absolute Maximum Ratings (1)
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
IN (with respect to VSS) –0.3 28 V
BAT (with respect to VSS) –0.3 5 V
VI Input Voltage
OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM,
–0.3 7 V
TMR, ITERM, SYSOFF, TD (with respect to VSS)
II Input Current IN 1.6 A
OUT 5 A
Output Current
IO BAT (Discharge mode) 5 A
(Continuous)
BAT (Charging mode) 1.5 (2) A
Output Sink Current CHG, PGOOD 15 mA
TJ Junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.

8.2 ESD Ratings


VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22- ±500 V
C101 (2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

8.3 Recommended Operating Conditions


MIN MAX UNIT
IN voltage range 4.35 26 V
VI ’72, ’73, ‘75, '79 4.35 6.4
IN operating voltage range V
‘74 4.35 10.2
IIN Input current, IN pin 1.5 A
IOUT Current, OUT pin 4.5 A
IBAT Current, BAT pin (Discharging) 4.5 A
(1)
ICHG Current, BAT pin (Charging) 1.5 A
TJ Junction Temperature –40 125 °C
RILIM Maximum input current programming resistor 1100 8000 Ω
(2)
RISET Fast-charge current programming resistor 590 8900 Ω
RITERM Termination current programming resistor 0 15 kΩ
RTMR Timer programming resistor 18 72 kΩ

(1) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
(2) Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting.

8.4 Thermal Information


bq2407x
THERMAL METRIC (1) RGT UNIT
16 PINS
RθJA Junction-to-ambient thermal resistance 44.5
RθJC(top) Junction-to-case (top) thermal resistance 54.2
RθJB Junction-to-board thermal resistance 17.2
°C/W
ψJT Junction-to-top characterization parameter 1.0
ψJB Junction-to-board characterization parameter 17.1
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Dissipation Ratings


POWER RATING
PACKAGE (1) RθJA RθJC
TA ≤ 25°C TA = 85°C
(2)
RGT 39.47 °C/W 2.4 °C/W 2.3 W 225 mW

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2 × 3 via matrix.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 7


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

8.6 Electrical Characteristics


Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
UVLO Undervoltage lock-out VIN: 0 V → 4 V 3.2 3.3 3.4 V
Vhys Hysteresis on UVLO VIN: 4 V → 0 V 200 300 mV
Input power detected when VIN > VBAT + VIN(DT)
VIN(DT) Input power detection threshold 55 80 130 mV
VBAT = 3.6 V, VIN: 3.5 V → 4 V
Vhys Hysteresis on VIN(DT) VBAT = 3.6 V, VIN: 4 V → 3.5 V 20 mV
Time measured from VIN: 0 V → 5 V 1 μs
tDGL(PGOOD) Deglitch time, input power detected status 1.2 ms
rise-time to PGOOD = LO
VIN: 5 V → 7 V (’72, ’73, ’75, '79) 6.4 6.6 6.8
VOVP Input overvoltage protection threshold V
VIN: 5 V → 11 V (’74) 10.2 10.5 10.8
VIN: 7 V → 5V (’72, ’73, ’75, '79) 110
Vhys Hysteresis on OVP mV
VIN: 11 V → 5 V (’74) 175
tDGL(OVP) Input overvoltage blanking time (OVP fault deglitch) 50 μs
Time measured from VIN: 11 V → 5 V with 1 μs
tREC Input overvoltage recovery time 1.2 ms
fall-time to PGOOD = LO
ILIM, ISET SHORT-CIRCUIT DETECTION (CHECKED DURING STARTUP)
ISC Current source VIN > UVLO and VIN > VBAT + VIN(DT) 1.3 mA
VSC VIN > UVLO and VIN > VBAT + VIN(DT) 520 mV
QUIESCENT CURRENT
CE = LO or HI, input power not detected,
IBAT(PDWN) Sleep current into BAT pin 6.5 μA
No load on OUT pin, TJ = 85°C
EN1= HI, EN2=HI, VIN = 6 V, TJ= 85°C 50
IIN Standby current into IN pin μA
EN1= HI, EN2=HI, VIN = 10 V, TJ= 85°C 200
CE = LO, VIN = 6 V, no load on OUT pin,
ICC Active supply current, IN pin 1.5 mA
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)
POWER PATH
VDO(IN-OUT) VIN – VOUT VIN = 4.3 V, IIN = 1 A, VBAT = 4.2 V 300 475 mV
VDO(BAT-OUT) VBAT – VOUT IOUT = 1 A, VIN = 0 V, VBAT > 3 V 50 100 mV
VIN > VOUT + VDO(IN-OUT), VBAT < 3.2 V 3.3 3.4 3.5
OUT pin voltage regulation (bq24072) VBAT + VBAT + VBAT +
VIN > VOUT + VDO(IN-OUT), VBAT ≥ 3.2 V
VO(REG) 150mV 225mV 270mV V
OUT pin voltage regulation (bq24073, bq24074) VIN > VOUT + VDO(IN-OUT) 4.3 4.4 4.5
OUT pin voltage regulation (bq24075, bq24079) VIN > VOUT + VDO(IN-OUT) 5.4 5.5 5.6
EN1 = LO, EN2 = LO 90 95 100
mA
IINmax Maximum input current EN1 = HI, EN2 = LO 450 475 500
EN2 = HI, EN1 = LO KILIM/RILIM A
ILIM = 500 mA to 1.5 A 1500 1610 1720
KILIM Maximum input current factor AΩ
ILIM = 200 mA to 500 mA 1330 1525 1720
IINmax Programmable input current limit range EN2 = HI, EN1 = LO, RILIM = 8 kΩ to 1.1 kΩ 200 1500 mA
Input voltage threshold when input current is
VIN-DPM EN2 = LO, EN1 = X 4.35 4.5 4.63 V
reduced
VO(REG) – VO(REG) – VO(REG) –
Output voltage threshold when charging current is (’72, ’73, ’74) V
VDPPM 180mV 100mV 30mV
reduced
(’75, '79) 4.2 4.3 4.4 V
VOUT ≤ VBAT
VBSUP1 Enter battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω → 2 Ω V
–40mV
VOUT ≥
VBSUP2 Exit battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω → 10 Ω V
VBAT–20mV
VO(SC1) Output short-circuit detection threshold, power-on VIN > VUVLO and VIN > VBAT + VIN(DT) 0.8 0.9 1 V
Output short-circuit detection threshold, supplement
VO(SC2) VIN > VUVLO and VIN > VBAT + VIN(DT) 200 250 300 mV
mode VBAT – VOUT > VO(SC2) indicates short-circuit
tDGL(SC2) Deglitch time, supplement mode short circuit 250 μs
tREC(SC2) Recovery time, supplement mode short circuit 60 ms

8 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Electrical Characteristics (continued)


Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY CHARGER
IBAT Source current for BAT pin short-circuit detection VBAT = 1.5 V 4 7.5 11 mA
VBAT(SC) BAT pin short-circuit detection threshold VBAT rising 1.6 1.8 2 V
('72, '73, '74, '75) 4.16 4.20 4.23
VBAT(REG) Battery charge voltage V
('79) 4.059 4.100 4.141
VLOWV Pre-charge to fast-charge transition threshold VIN > VUVLO and VIN > VBAT + VIN(DT) 2.9 3 3.1 V
tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition 25 ms
tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition 25 ms
VBAT(REG) > VBAT > VLOWV, VIN = 5 V CE = LO,
Battery fast charge current range 100 1500 mA
EN1 = LO, EN2 = HI
ICHG CE = LO, EN1= LO, EN2 = HI,
Battery fast charge current VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin, KISET/RISET A
thermal loop and DPPM loop not active
KISET Fast charge current factor 797 890 975 AΩ
IPRECHG Pre-charge current KPRECHG/RISET A
KPRECHG Pre-charge current factor 70 88 106 AΩ
CE = LO, (EN1, EN2) ≠ (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal 0.09×ICHG 0.1×ICHG 0.11×ICHG
Termination comparator detection threshold loop not active
ITERM A
(internally set) CE = LO, (EN1, EN2) = (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal 0.027×ICHG 0.033×ICHG 0.040×ICHG
loop not active
IBIAS(ITERM) Current for external termination-setting resistor VIN > VUVLO and VIN > VBAT + VIN(DT) 72 75 78 μA
Termination current threshold (externally set)
ITERM KITERM × RITERM / RISET A
(bq24074)
USB500 or ISET mode(EN1, EN2) ≠ (LO, LO)
CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and 0.0225 0.0300 0.0375
K Factor for termination detection threshold thermal loop not active
KITERM A
(externally set) (bq24074) USB100 mode (EN1, EN2) = (LO, LO),
CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and 0.008 0.0100 0.012
thermal loop not active
tDGL(TERM) Deglitch time, termination detected 25 ms
VBAT(REG) VBAT(REG) VBAT(REG)
VRCH Recharge detection threshold VIN > VUVLO and VIN > VBAT + VIN(DT) V
–140mV –100mV –60mV
tDGL(RCH) Deglitch time, recharge threshold detected 62.5 ms
VBAT = 3.6 V. Time measured from
tDGL(NO-IN) Delay time, input power loss to OUT LDO turn-off 20 ms
VIN: 5 V → 3 V 1 μs fall-time
IBAT(DET) Sink current for battery detection VBAT = 2.5 V 5 7.5 10 mA
tDET Battery detection timer BAT high or low 250 ms
BATTERY CHARGING TIMERS
tPRECHG Pre-charge safety timer value TMR = floating 1440 1800 2160 s
tMAXCHG Charge safety timer value TMR = floating 14400 18000 21600 s
tPRECHG Pre-charge safety timer value 18 kΩ < RTMR < 72 kΩ RTMR × KTMR s
tMAXCHG Charge safety timer value 18 kΩ < RTMR < 72 kΩ 10×R TMR ×KTMR s
KTMR Timer factor 36 48 60 s/kΩ
BATTERY-PACK NTC MONITOR (1)
INTC NTC bias current VIN > UVLO and VIN > VBAT + VIN(DT) 72 75 78 μA
VHOT High temperature trip point Battery charging, VTS Falling 270 300 330 mV
VHYS(HOT) Hysteresis on high trip point Battery charging, VTS Rising from VHOT 30 mV
VCOLD Low temperature trip point Battery charging, VTS Rising 2000 2100 2200 mV
VHYS(COLD) Hysteresis on low trip point Battery charging, VTS Falling from VCOLD 300 mV
tDGL(TS) Deglitch time, pack temperature fault detection TS fault detected to charger disable 50 ms
VDIS(TS) TS function disable threshold (bq24072, bq24073) TS unconnected VIN - 200mV V
THERMAL REGULATION
TJ(REG) Temperature regulation limit 125 °C
TJ(OFF) Thermal shutdown temperature TJ Rising 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C

(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 9


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Electrical Characteristics (continued)


Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
VIL Logic LOW input voltage 0 0.4 V
VIH Logic HIGH input voltage 1.4 6 V
IIL Input sink current VIL= 0 V 1 μA
IIH Input source current VIH= 1.4 V 10 μA
LOGIC LEVELS ON PGOOD, CHG
VOL Output LOW voltage ISINK = 5 mA 0.4 V

8.7 Typical Characteristics


VIN = 6 V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.

600 0.7
IL = 1 A
500 0.6

Dropout Voltage - VIN-VOUT


0.5
400
IBAT - mA

0.4
300
0.3

200
0.2

100 0.1

0 0
120 125 130 135 140 145 0 25 100 125
50 75
Temperature - oC TJ - Junction Temperature - °C

Figure 1. Thermal Regulation Figure 2. Dropout Voltage vs Temperature


120 4.6
IL = 1 A VIN = 5 V
4.4
100
Dropout Voltage - VBAT-VOUT

4.2
VO - Output Voltage - V

80 VBAT = 3 V
4

60 3.8
VBAT = 3.9 V
3.6
40
3.4

20 3.2

0 3
0 25 50 75 100 125 2 2.5 3 3.5 4 4.5
TJ - Junction Temperature - °C VBAT - Battery Voltage - V

Figure 3. Dropout Voltage vs Temperature Figure 4. bq24072


No Input Supply Output Regulation Voltage vs Battery Voltage

10 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Typical Characteristics (continued)


VIN = 6 V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.
3.80 4.45
VIN = 5 V, VIN = 5 V,
3.78 IL = 1 A
VBAT = 3.5 V,
4.43
3.76 IL = 1 A

VO - Output Voltage - V
VO - Output Voltage - V

3.74 4.40
3.72

3.70 4.38

3.68
4.35
3.66

3.64 4.33
3.62
4.30
3.60 0 50 75 100 125
0 25 50 75 100 125 25
TJ - Junction Temperature - °C TJ - Junction Temperature - °C

Figure 5. bq24072 Figure 6. bq24073/ 74


Output Regulation Voltage vs Temperature Output Regulation Voltage vs Temperature

5.75 4.210
VIN = 6 V,
5.70 IL = 1 A
5.65 4.205

VBAT - Regulation Voltage - V


VO - Output Voltage - V

5.60
4.200
5.55

5.50 4.195

5.45
5.40 4.190

5.35
4.185
5.30
5.25 4.180
0 25 50 75 100 125 0 5 10 15 20 25 30
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C

Figure 7. bq24075, bq24079 Figure 8. BAT Regulation Voltage vs Temperature


Output Regulation Voltage vs Temperature
6.70 10.70
10.5 V
6.6 V
VOVP - Output Voltage Threshold - V

10.65
VOVP - Output Voltage Threshold - V

6.65 10.60 VI Rising


VI Rising
10.55

6.60 10.50

10.45

6.55 10.40 VI Falling

10.35
VI Falling
6.50 10.30

10.25

6.45 10.20
0 25 50 75 100 125 0 25 50 75 100 125
TJ - Junction Temperature - °C TJ - Junction Temperature - °C

Figure 9. bq24072/ 73/ 75/ 79 Figure 10. bq24074 Overvoltage Protection Threshold vs
Overvoltage Protection Threshold vs Temperature Temperature

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 11


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Typical Characteristics (continued)


VIN = 6 V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.
800 1.05
RILIM RISET = 900 W
700

IBAT - Fast Charge Current - A


1.03
600
ILIM - Input Current - mA

500 USB500 1.01

400
0.99
300

200
0.97
USB100
100

0 0.95
5 6 7 8 9 10 3 3.2 3.4 3.6 3.8 4 4.2
VI - Input Voltage - V VBAT - Battery Voltage - V

Figure 11. bq24074 Input Current Limit vs Input Voltage Figure 12. Fastcharge Current vs Battery Voltage

310 105
RISET = 3 kW RISET = 900 W
104
305
IBAT - Fast Charge Current - A

103

IBAT - Precharge Current - A


102
300
101

295 100

99
290
98

97
285
96
280 95
3 3.2 3.4 3.6 3.8 4 4.2 2 2.2 2.4 2.6 2.8 3
VBAT - Battery Voltage - V VBAT - Battery Voltage - V

Figure 13. Fastcharge Current vs Battery Voltage Figure 14. Precharge Current vs Battery Voltage
31.5
RISET = 3 kW
31
IBAT - Precharge Current - A

30.5

30

29.5

29

28.5
2 2.2 2.4 2.6 2.8 3
VBAT - Battery Voltage - V

Figure 15. Precharge Current vs Battery Voltage

12 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

9 Detailed Description

9.1 Overview
The bq2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted
at space-limited portable applications. The device powers the system while simultaneously and independently
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for
proper charge termination and enables the system to run with a defective or absent battery pack. This feature
also allows instant system turn-on even with a totally discharged battery. The input power source for charging the
battery and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path
Management (DPPM), which shares the source current between the system and battery charging, and
automatically reduces the charging current if the system load increases. When charging from a USB port, the
input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below a
threshold, thus preventing the USB port from crashing. The power-path architecture also permits the battery to
supplement the system current requirements when the adapter cannot deliver the peak system currents.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 13


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

9.2 Functional Block Diagram

250mV
VO(SC1) OUT-SC1 VBAT OUT-SC2
t DGL(SC2)
Q1
IN OUT

Short Detect EN2

225mV
VIN-LOW Precharge ISET
USB100 2.25V
Fastcharge
USB500 TJ
ILIM VREF- ILIM
USB-susp TJ(REG)
Short Detect

V O(REG) V DPPM
V OUT
Q2

EN2 V BAT (REG)


EN1 BAT
VBAT
VOUT
CHARGEPUMP
I BIAS- ITERM SYSOFF
40mV bq24075
Supplement
225mV VLOWV bq24079
(’72, ’73, ’75)
ITERM
VRCH VBAT(SC)
bq24074

~3V I TERM-floating
tDGL1(LOWV)

tDGL2(LOWV)
tDGL(TERM)

tDGL(RCH)

VIN

INTC
VBAT + VIN-DT BAT-SC

tDGL(NO-IN)
V HOT
TS
t DGL(PGOOD) Charge Control t DGL(TS)
V UVLO
VCOLD
V OVP
tBLK(OVP)

VDIS(TS)
EN1 USB Suspend TD
EN2
(bq24072,
CE bq24073)

Halt timers CHG

VIPRECHG Reset timers


Dynamically PGOOD
VICHG Controlled
Oscillator
V ISET
Fast-Charge
Timer
Timer fault
TMR
Pre-Charge
Timer

~100mV Timers disabled

14 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

9.3 Feature Description


9.3.1 Undervoltage Lockout (UVLO)
The bq2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage
threshold (UVLO).
During the power down mode the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the
VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

9.3.2 Power On
When VIN exceeds the UVLO threshold, the bq2407x powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for
overload conditions on OUT.
Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If
SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload
conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a
short circuit at OUT. When VOUT is above VSC, the FET Q1 switches to the current limit threshold set by EN1,
EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as
well as the input voltage conditions.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 15


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Feature Description (continued)

PGOOD = Hi-Z
CHG = Hi-Z
BATTFET ON

UVLO <VIN <VOVP No


and
VIN >V BAT +VIN(DT)

Yes

PGOOD = Low

Yes
EN1=EN2=1

No

Yes
ILIM or ISET short?

No

Begin Startup
I IN(MAX) 100mA

Yes
VOUT short?

No

Input Current
Limit set by EN1
and EN2

No
CE = Low

Yes

Begin Charging

Figure 16. Startup Flow Diagram


16 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Feature Description (continued)


9.3.3 Overvoltage Protection (OVP)
The bq2407x accepts inputs up to 28 V without damage. Additionally, an overvoltage protection (OVP) circuit is
implemented that shuts off the internal LDO and discontinues charging when VIN > VOVP for a period long than
tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance.
Once the OVP condition is removed, a new power on sequence starts (see Power On ). The safety timers are
reset and a new charge cycle will be indicated by the CHG output.

9.3.4 Dynamic Power-Path Management


The bq2407x features an OUT output that powers the external load connected to the battery. This output is
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a
source connected to IN to charge the battery and a battery source only.

9.3.4.1 Input Source Connected (ADAPTER or USB)


With a source connected, the dynamic power-path management (DPPM) circuitry of the bq2407x monitors the
input current continuously. The OUT output for the bq24073/ 74/ 75/ 79 is regulated to a fixed voltage (VO(REG)).
For the bq24072, OUT is regulated to 200 mV above the voltage at BAT. When the BAT voltage falls below 3.2
V, OUT is clamped to 3.4 V. This allows for proper startup of the system load even with a discharged battery.
The current into IN is shared between charging the battery and powering the system load at OUT. The bq2407x
has internal selectable current limits of 100 mA (USB100) and 500 mA (USB500) for charging from USB ports,
as well as a resistor-programmable input current limit.
The bq2407x is USB IF compliant for the inrush current testing. The USB specification allows up to 10 μF to be
hard started, which establishes 50 μC as the maximum inrush charge value when exceeding 100 mA. The input
current limit for the bq2407x prevents the input current from exceeding this limit, even with system capacitances
greater than 10 μF. The input capacitance to the device must be selected small enough to prevent a violation
(<10 μF), as this current is not limited. Figure 17 demonstrates the start-up of the bq2407x and compares it to
the USB-IF specification.
USB100 Current Limit

10 μC 50 μC 20 mA/div

100 μs/div

Figure 17. USB-IF Inrush Current Test

The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in the EN1/EN2
Settings table in Pin Configuration and Functions . When using the resistor-programmable current limit, the input
current limit is set by the value of the resistor connected from the ILIM pin to VSS, and is given by the equation:
IIN-MAX = KILIM/RILIM (1)
The input current limit is adjustable up to 1.5 A. The valid resistor range is 1.1 kΩ to 8 kΩ.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 17


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Feature Description (continued)


When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement
modes are used to maintain the system load. Figure 19 and Figure 20 illustrate examples of the DPPM and
supplement modes. These modes are explained in detail in the following sections.

9.3.4.1.1 Input DPM Mode (VIN-DPM)


The bq2407x utilizes the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are
configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If
VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents
the bq2407x from crashing poorly designed or incorrectly configured USB sources. Figure 18 shows the VIN-DPM
behavior to a current limited source. In this figure, the input source has a 400-mA current limit and the device is
in USB500 mode (EN1=1, EN2=0).

IOUT
200mA/div
Input collapses
VIN
(5V)
Input regulated to VIN_DPM 500mV/div
USB500 Current Limit

IIN Input current limit is 200mA/div


reduced to prevent
crashing the supply

200mA/div
IBAT

4 ms/div
Figure 18. VIN-DPM Waveform

9.3.4.1.2 DPPM Mode


When the sum of the charging and system load currents exceeds the maximum input current (programmed with
EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to VDPPM, the
bq2407x enters DPPM mode. In this mode, the charging current is reduced as the OUT current increases in
order to maintain the system output. Battery termination is disabled while in DPPM mode.

9.3.4.1.3 Battery Supplement Mode


While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the
VBSUP1 threshold, the battery supplements the system load. The battery stops supplementing the system load
when the voltage at OUT rises above the VBSUP2 threshold.
During supplement mode, the battery supplement current is not regulated (BAT-FET is fully on), however there is
a short circuit protection circuit built in. Figure 35 demonstrates supplement mode. If during battery supplement
mode, the voltage at OUT drops VO(SC2) below the BAT voltage, the OUT output is turned off if the overload
exists after tDGL(SC2). The short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and
attempts to restart. If the short circuit remains, OUT is turned off and the counter restarts. Battery termination is
disabled while in supplement mode.
18 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Feature Description (continued)

1200 mA

A
900 mA
IOUT

400 mA

0 mA

900 mA

500 mA
IIN

0 mA

500 mA
IBAT

0 mA

-300 mA

3.8 V DPPM Loop Active


3.7 V Supplement Mode
~3.6 V
VOUT

Figure 19. bq24072 DPPM and Battery Supplement Modes (VOREG = VBAT + 225 mV, VBAT = 3.6 V)

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 19


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Feature Description (continued)

1200 mA

A
900 mA
IOUT

400 mA

0 mA

900 mA

500 mA
IIN

0 mA

500 mA
IBAT

0 mA

-300 mA

4.4 V DPPM Loop Active


Supplement Mode
4.3 V
VOUT

~3.6 V

Figure 20. bq24073 DPPM and Battery Supplement Modes (VOREG = 4.4 V, VBAT = 3.6 V)

9.3.4.2 Input Source Not Connected


When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode the
current into OUT is not regulated, similar to Battery Supplement Mode, however the short circuit circuitry is
active. If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The
short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short
circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload
condition is removed.

9.3.5 Battery Charging


Set CE low to initiate battery charging. First, the device checks for a short-circuit on the BAT pin by sourcing
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging
continues. The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current
regulation) and a constant voltage tapering (voltage regulation). In all charge phases, an internal control loop
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is
exceeded.
Figure 21 illustrates a normal Li-Ion charge cycle using the bq2407x:

20 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Feature Description (continued)

PRECHARGE CC FAST CHARGE CV TAPER DONE

VBAT(REG)

IO(CHG)

Battery Current

Battery Voltage

VLOWV
CHG = Hi-z
I(PRECHG)

I(TERM)

Figure 21. Typical Charge Cycle

In the pre-charge phase, the battery is charged at with the pre-charge current (IPRECHG). Once the battery voltage
crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage
reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the
battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by
going high-impedance.
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the
thermal loop, the DPPM loop or the VIN(LOW) loop.
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by
the equation:
ICHG = KISET/RISET (2)
The charge current limit is adjustable up to 1.5 A. The valid resistor range is 590 Ω to 5.9 kΩ. If ICHG is
programmed as greater than the input current limit, the battery will not charge at the rate of ICHG, but at the
slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers will be
proportionately slowed down.

9.3.5.1 Charge Current Translator


When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external
host to calculate the current sourced from BAT.
VISET = ICHARGE / 400 × RISET (3)

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 21


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Feature Description (continued)

Begin Charging

Yes
Battery short detected?

No

Start Precharge
CHG = Low

No

No tPRECHARGE
VBAT > VLOWV
Elapsed?

Yes

End Charge
Start Fastcharge
Flash CHG
ICHARGE set by ISET

No

IBAT < ITERM No t FASTCHARGE


Elapsed?

Yes

End Charge
Charge Done Flash CHG
CHG = Hi-Z

TD = Low
(’72, ’73 Only) No
(’74, ’75 = YES)

Yes

Termination Reached
BATTFET Off
Wait for VBAT < VRCH

No
VBAT < VRCH

Yes

Run Battery Detection

No
Battery Detected?

Yes

Figure 22. Battery Charging Flow Diagram

22 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Feature Description (continued)


9.3.5.2 Adjustable Termination Threshold (ITERM Input, bq24074)
The termination current threshold in the bq24074 is user-programmable. Set the termination current by
connecting a resistor from ITERM to VSS. For USB100 mode (EN1 = EN2 = Low), the termination current value
is calculated as:
ITERM = 0.01 × RITERM/ RISET (4)
In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as:
ITERM = 0.03 × RITERM/ RISET (5)
The termination current is programmable up to 50% of the fastcharge current. The RITERM resistor must be less
than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current.

9.3.5.3 Termination Disable (TD Input, bq24072, bq24073)


The bq24072 and bq24073 contain a TD input that allows termination to be enabled/ disabled. Connect TD to a
logic high to disable charge termination. When termination is disabled, the device goes through the pre-charge,
fast-charge and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the
output voltage at BAT equal to VBAT(REG), and charging current does not terminate. The charge current is set by
ICHG or IINmax, whichever is less. Battery detection is not performed. The CHG output is high impedance once
the current falls below ITERM and does not go low until the input power or CE are toggled. When termination is
disabled, the pre-charge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS
pin functionality) is disabled if the TD pin is high and the TS pin is unconnected or pulled up to VIN.

9.3.5.4 Battery Detection and Recharge


The bq2407x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run.
During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the voltage on
BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the
protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT < VRCH,
then the protector closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be missing
and the detection routine continues.

9.3.5.5 Battery Disconnect (SYSOFF Input, bq24075, bq24079)


The bq24075 and bq24079 feature a SYSOFF input that allows the user to turn the FET Q2 off and disconnect
the battery from the OUT pin. This is useful for disconnecting the system load from the battery, factory
programming where the battery is not installed or for host side impedance track fuel gauging, such as bq27500,
where the battery open circuit voltage level must be detected before the battery charges or discharges. The
/CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal operation.
SYSOFF is internally pulled to VBAT through ~5 MΩ resistor.

9.3.5.6 Dynamic Charge Timers (TMR Input)


The bq2407x devices contain internal safety timers for the pre-charge and fast-charge phases to prevent
potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.
The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated
using the following equation:
tPRECHG = KTMR × RTMR (6)
tMAXCHG = 10 × KTMR × RTMR (7)
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Reset the timers by toggling the CE pin, or by toggling EN1, EN2 pin to put the device in and out of USB
suspend mode (EN1 = HI, EN2 = HI).
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation. For the bq24072 and bq24073, the timers are
disabled when TD is connected to a high logic level.
During the fast charge phase, several events increase the timer durations.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 23


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Feature Description (continued)


• The system load current activates the DPPM loop which reduces the available charging current
• The input current is reduced because the input voltage has fallen to VIN(LOW)
• The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half
the frequency and the counter counts half as fast resulting in only one minute of "counting" time.
If the pre charge timer expires before the battery voltage reaches VLOWV, the bq2407x indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by
toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.

9.3.5.7 Status Indicators (PGOOD, CHG)


The bq2407x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside
of this range, PGOOD is high impedance.
The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG pin on (low - LED on),
whereas all refresh (subsequent) charges will result in the CHG pin off (open - LED off). In addition, the CHG
signals timer faults by flashing at approximately 2 Hz.

Table 1. PGOOD Status Indicator


INPUT STATE PGOOD OUTPUT
VIN < VUVLO High-impedance
VUVLO < VIN < VIN(DT) High-impedance
VIN(DT) < VIN < VOVP Low
VIN > VOVP High-impedance

Table 2. CHG Status Indicator


CHARGE STATE CHG OUTPUT
Charging
Charging suspended Low (for first charge cycle)
by thermal loop
Safety timers expired Flashing at 2 Hz
Charging done
Recharging after
termination
High-impedance
IC disabled or no valid
input power
Battery absent

9.3.5.8 Thermal Regulation and Thermal Shutdown


The bq2407x contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a
"hiccup" mode. During thermal regulation, the safety timers are slowed down proportionately to the reduction in
current limit.

24 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Note that this feature monitors the die temperature of the bq2407x. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is
shown in Figure 23. Battery termination is disabled during thermal regulation.

PRECHARGE THERMAL CC FAST CV TAPER DONE


REGULATION CHARGE

VO(REG)

IO(CHG)

Battery Voltage

Battery Current

V(LOWV) HI-z

I(PRECHG)

I(TERM)

TJ(REG)
IC Junction Temperature, TJ

Figure 23. Charge Cycle Modified by Thermal Loop

9.3.6 Battery Pack Temperature Monitoring


The bq2407x features an external battery pack temperature monitoring input. The TS input connects to the NTC
thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature
conditions. During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any
time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers
maintain their values but suspend counting. When the voltage measured at TS returns to within the operation
window, charging is resumed and the timers continue counting. When charging is suspended due to a battery
pack temperature fault, the CHG pin remains low and continues to indicate charging.
For the bq24072 and bq24073, battery pack temperature sensing is disabled when termination is disabled (TD =
High) and the voltage at TS is greater than VDIS(TS). For applications that do not require the TS monitoring
function, connect a 10-kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain charging.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 25


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

The allowed temperature range for 103AT-2 type thermistor is 0°C to 50°C. However, the user may increase the
range by adding two external resistors. See Figure 24 for the circuit details. The values for Rs and Rp are
calculated using the following equations:
æ 2 ì VH ´ VC üö
-(RTH + RTC ) ± çç (RTH +RTC ) - 4 íRTH ´ RTC + ´ (RTC - RTH )ý ÷
(VH - VC ) ´ ITS ÷
è î þø
Rs =
2 (8)
VH ´ (R TH + RS )
Rp =
ITS ´ (R TH + RS ) - VH

where
• RTH: Thermistor Hot Trip Value found in thermistor data sheet
• RTC: Thermistor Cold Trip Value found in thermistor data sheet
• VH: IC's Hot Trip Threshold = 0.3 V nominal
• VC: IC's Cold Trip Threshold = 2.1 V nominal
• ITS: IC's Output Current Bias = 75 µA nominal
• NTC Thermsitor Semitec 103AT-4 (9)
Rs and Rp 1% values were chosen closest to calculated values in Table 3.

Table 3. Calculated Values


Cold Temp Resistance and Hot Temp Resistance and Trip
External Bias Resistor, Rs (Ω) External Bias Resistor, Rp (Ω)
Trip Threshold; Ω (°C) Threshold; Ω (°C)
28000 (–0.6) 4000 (51) 0 ∞
28480 (–1) 3536 (55) 487 845000
28480 (–1) 3021 (60) 1000 549000
33890 (–5) 4026 (51) 76.8 158000
33890 (–5) 3536 (55) 576 150000
33890 (–5) 3021 (60) 1100 140000

RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. The
temperature window cannot be tightened more than using only the thermistor connected to TS, it can only be
extended.

I NTC
bq2407x

RS
+
TS TEMP
PACK+

VCOLD
RP
+ PACK-
VHOT

Figure 24. Extended TS Pin Thresholds

26 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

9.4 Device Functional Modes


9.4.1 Sleep Mode
When the input is between UVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for >20
mS the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will not
discharge the battery, other than the leakage on the BAT pin. If one has a full 1000-mAHr battery and the
leakage is 10 μA, then it would take 1000 mAHr / 10 μA = 100000 hours (11.4 years) to discharge the battery.
The self-discharge of the battery is typically five times higher than this.

9.4.2 Explanation of Deglitch Times and Comparator Hysteresis

NOTE
Figure 25 to Figure 29 are not to scale.

VOVP
VOVP - Vhys(OVP)

VIN
Typical Input Voltage
t < tDGL(OVP) Operating Range

VBAT + VIN(DT)
VBAT + VIN(DT) - Vhys(INDT)

UVLO
UVLO - Vhys(UVLO)

PGOOD tDGL(PGOOD)
tDGL(OVP) tDGL(NO-IN)
tDGL(PGOOD)

Figure 25. Power-Up, Power-Down, Power Good Indication

VBAT tDGL1(LOWV)

VLOWV

t < tDGL1(LOWV) tDGL1(LOWV) tDGL2(LOWV) t < tDGL2(LOWV)

ICHG
Fast-Charge Fast-Charge
Pre-Charge
IPRE-CHG
Pre-Charge

Figure 26. Precharge to Fast-Charge, Fast- to Pre-Charge Transition – tDGL1(LOWV), tDGL2(LOWV)

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 27


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Device Functional Modes (continued)

VBAT
VRCH

Re-Charge
t < tDGL(RCH) tDGL(RCH)

Figure 27. Recharge – tDGL(RCH)

Turn Force Turn Force


Q2 OFF Q2 ON Q2 OFF Q2 ON
tREC(SC2) tREC(SC2)

VBAT - VOUT

Recover
VO(SC2)

t < tDGL(SC2) tDGL(SC2) tDGL(SC2) t < tDGL(SC2)

Figure 28. OUT Short-Circuit – Supplement Mode

VCOLD
VCOLD - Vhys(COLD)

Suspend
Charging
t < tDGL(TS) tDGL(TS) Resume
Charging
VTS

VHOT - Vhys(HOT)
VHOT

Figure 29. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing

28 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

10 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

10.1 Application Information


The bq2407x devices power the system while simultaneously and independently charging the battery. The input
power source for charging the battery and running the system can be an AC adapter or a USB port. The devices
feature dynamic power-path management (DPPM), which shares the source current between the system and
battery charging and automatically reduces the charging current if the system load increases. When charging
from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the
input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also
permits the battery to supplement the system current requirements when the adapter cannot deliver the peak
system currents.
The bq2407x is configurable to be host controlled for selecting different input current limits based on the input
source connected, or a fully stand alone device for applications that do not support multiple types of input
sources.

10.2 Typical Application


VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C,
6.25-hour Fastcharge Safety Timer

R4 R5
1.5 kW 1.5 kW

SYSTEM

Adaptor
PGOOD

CHG

DC+ IN OUT
C1 C2
GND
1 mF 4.7 mF

VSS

bq24072 HOST
bq24073 EN2

EN1
TS
TD

CE
BAT
C3
TEMP
PACK+ 4.7 mF
ISET
TMR

ILM

R1 R2 R3
PACK-
46.4 kW 1.18 kW 1.13 kW

Figure 30. Using bq24072/ bq24073 in a Host-Controlled Charger Application

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 29


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Typical Application (continued)


10.2.1 Design Requirements
• Supply voltage = 5 V
• Fast charge current of approximately 800 mA; ISET - pin 16
• Input Current Limit =1.3 A; ILIM - pin 12
• Termination Current Threshold = 110 mA; ITERM – pin 15 (bq24074 only)
• Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14
• TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2)

10.2.2 Detailed Design Procedure

10.2.2.1 bq2407x Charger Design Example


See Figure 30 to Figure 42 for Schematics of the Design Example.

10.2.2.1.1 Termination Disable (TD) (bq24072, bq24073 only)


Connect TD high to disable termination. Connect TD low to enable termination.

10.2.2.1.2 System ON/OFF (SYSOFF) (bq24075 or bq24079 only)


Connect SYSOFF high to disconnect the battery from the system load. Connect SYSOFF low for normal
operation

10.2.2.2 Calculations

10.2.2.2.1 Program the Fast Charge Current (ISET):


RISET = KISET / ICHG
KISET = 890 AΩ from the electrical characteristics table.
RISET = 890 AΩ / 0.8 A = 1.1125 kΩ
Select the closest standard value, which for this case is 1.13 kΩ. Connect this resistor between ISET (pin 16)
and VSS.

10.2.2.2.2 Program the Input Current Limit (ILIM)


RILIM = KILIM / II_MAX
KILIM = 1550 AΩ from the electrical characteristics table.
RISET = 1550 AΩ / 1.3 A = 1.192 kΩ
Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12) and
VSS.

10.2.2.2.3 Program the Termination Current Threshold (ITERM) (bq24074 only)


RITERM = ITERM × RISET / 0.030
RISET = 1.13 kΩ from the above calculation.
RITERM = 110 mA × 1.13 kΩ / 0.030 = 4.143 kΩ
Select the closest standard value, which for this case is 4.12 kΩ. Connect this resistor between ITERM (pin 15)
and VSS. Note that when in USB100 mode (EN1 = EN2 = VSS), the termination threshold is 1/3 of the normal
threshold.

10.2.2.2.4 Program 6.25-hour Fast-Charge Safety Timer (TMR)


RTMR = tMAXCHG / (10 × KTMR )
KTMR = 48 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 46.8 kΩ
Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 2) and
VSS.
30 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Typical Application (continued)


10.2.2.3 TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT-2). For applications that do not require the TS
monitoring function, connect a 10-kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain
charging.

10.2.2.4 CHG and PGOOD


LED Status: Connect a 1.5-kΩ resistor in series with a LED between OUT and CHG to indicate charging status.
Connect a 1.5-kΩ resistor in series with a LED between OUT and PGOOD to indicate when a valid input source
is connected.
Processor Monitoring Status: Connect a pullup resistor (on the order of 100 kΩ) between the power rail of the
processor and CHG and PGOOD.

10.2.2.5 Selecting IN, OUT, and BAT Pin Capacitors


In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output and battery pins. Using the values shown on the application diagram, is recommended. After
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast
high amplitude pulsed load applications. Note if designed high input voltage sources (bad adaptors or wrong
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).

10.2.3 Application Curves

VIN
5 V/div VCHG 5 V/div
Charging Initiated
VOUT
4.4 V 1 A/div
500 mV/div
VBAT
IBAT
3.6 V
VPGOOD 5 V/div

VBAT 2 V/div
Battery Inserted
IBAT 500 mA/div
Battery Detection Mode
4 ms/div 400 ms/div
RLOAD = 10 Ω

Figure 31. Adapter Plug-In Figure 32. Battery Detection


Battery Connected Battery Inserted

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 31


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

Typical Application (continued)

VCHG
5 V/div
IOUT 500 mA/div

1 A/div

IBAT IBAT 500 mA/div

VOUT 200 mV/div


Battery 2 V/div
VBAT 4.4 V
Removed
Battery Detection Mode
400 ms/div 400 ms/div
RLOAD = 20 Ω to 9 Ω

Figure 33. Battery Detection Figure 34. Entering and Exiting DPPM Mode
Battery Removed

1 A/div
IOUT
IOUT 1 A/div

IBAT IBAT 500 mA/div


Supplement Mode 500 mA/div Supplement Mode

VOUT
3.825 V 200 mV/div
VOUT VBAT
4.4 V 500 mV/div 3.6 V
VBAT Tracking to VBAT +225 mV
3.8 V
1 ms/div 1 ms/div
RLOAD = 25 Ω to 4.5 Ω RLOAD = 20 Ω to 4.5 Ω

Figure 35. Entering and Exiting Battery Supplement Mode Figure 36. Entering and Exiting Battery Supplement Mode
bq24074 bq24072

VCE
5 V/div VIN 10 V/div

VCHG
5 V/div
VOUT
4.4 V
VBAT 1 V/div VBAT
3.6 V 4.2 V 500 mV/div

Mandatory Precharge
IBAT 500 mA/div IBAT 1 A/div

10 ms/div 40 ms/div
VIN = 6 V to 15 V RLOAD = 10 Ω

Figure 37. Charger ON/OFF Using CE Figure 38. OVP Fault

32 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

Typical Application (continued)

5 V/div VSYSOFF 5 V/div


VSYSOFF

VOUT VBAT
5.5 V 4V
2 V/div
VBAT 2 V/div
4V VOUT

500 mA/div Battery Powering


System System Power Off

IBAT IBAT 500 mA/div

400 ms/div 4 ms/div

Figure 39. System ON/OFF With Input Connected Figure 40. System ON/OFF With Input Not Connected
VIN = 6 V VIN = 0 V
bq24075, bq24079 bq24075, bq24079

10.3 System Examples


10.3.1 Standalone Charger
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, ITERM = 110 mA, Battery Temperature Charge
Range = 0°C to 50°C, Safety Timers disabled

R4 R5
1.5 kW 1.5 kW

SYSTEM

Adaptor
CHG
PGOOD

DC+ IN OUT
C2
GND C1 4.7 mF
1 mF
VSS

bq24074
EN2

EN1
TS
TMR

CE
BAT
C3
PACK+ 4.7mF
ITERM

TEMP
ISET
ILM

PACK-
R1 R2 R3
4.12 kW 1.18 kW 1.13 kW

Figure 41. Using bq24074 in a Standalone Charger Application

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 33


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

System Examples (continued)


10.3.2 Disconnecting the Battery From the System
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C,
6.25 hour Fastcharge Safety Timer

R4 R5
1.5 kW 1.5 kW

SYSTEM

Adaptor

PGOOD

CHG
DC+ IN OUT
C1 C2
GND
1 mF 4.7 mF

VSS

bq24075 HOST
bq24079 EN2

EN1
TS
SYSOFF

CE
BAT

C3
PACK+ 4.7 mF
TEMP
ISET
TMR

ILM

PACK- R1 R2 R3
46.4 kW 1.18 kW 1.13 kW

Figure 42. Using bq24075 or bq24079 to Disconnect the Battery From the System

34 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

11 Power Supply Recommendations


Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the bq2407x
family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This
feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage
for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input
from dropping out. Additional input capacitance may be needed.

12 Layout

12.1 Layout Guidelines


• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2407x, with short
trace runs to both IN, OUT and GND (thermal pad).
• All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces
• The bq2407x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad
to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in QFN/SON PCB Attachment Application Note
(SLUA271).

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 35


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

12.2 Layout Example

Figure 43. Layout Schematic

36 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


bq24072, bq24073, bq24074, bq24075, bq24079
www.ti.com SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015

12.3 Thermal Considerations


The bq24072/3/4/5 family is packaged in a thermally enhanced MLP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad
should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in
QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package thermal
performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the
package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P
where
• TJ = chip junction temperature
• T = ambient temperature
• P = device power dissipation (10)
Factors that can influence the measurement and calculation of θJA include:
• Whether or not the device is board mounted
• Trace size, composition, thickness, and geometry
• Orientation of the device (horizontal or vertical)
• Volume of the ambient air surrounding the device under test and airflow
• Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage
increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to
use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the
PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of
time. The fast charge current will start to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT) (11)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.

Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 37


Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073, bq24074, bq24075, bq24079
SLUS810K – SEPTEMBER 2008 – REVISED MARCH 2015 www.ti.com

13 Device and Documentation Support

13.1 Device Support


13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

13.2 Related Links


The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 4. Related Links


TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
bq24072 Click here Click here Click here Click here Click here
bq24073 Click here Click here Click here Click here Click here
bq24074 Click here Click here Click here Click here Click here
bq24075 Click here Click here Click here Click here Click here
bq24079 Click here Click here Click here Click here Click here

13.3 Trademarks
All trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information


The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

38 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated

Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079


PACKAGE OPTION ADDENDUM

www.ti.com 8-Sep-2017

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

BQ24072RGTR ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKP
& no Sb/Br)
BQ24072RGTT ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKP
& no Sb/Br)
BQ24072RGTTG4 ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKP
& no Sb/Br)
BQ24073RGTR ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ
& no Sb/Br)
BQ24073RGTRG4 ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ
& no Sb/Br)
BQ24073RGTT ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ
& no Sb/Br)
BQ24073RGTTG4 ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ
& no Sb/Br)
BQ24074RGTR ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK)
& no Sb/Br)
BQ24074RGTRG4 ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK)
& no Sb/Br)
BQ24074RGTT ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK)
& no Sb/Br)
BQ24075RGTR ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU
& no Sb/Br)
BQ24075RGTRG4 ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU
& no Sb/Br)
BQ24075RGTT ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU
& no Sb/Br)
BQ24075RGTTG4 ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU
& no Sb/Br)
BQ24079RGTR ACTIVE VQFN RGT 16 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 ODI
& no Sb/Br)
BQ24079RGTT ACTIVE VQFN RGT 16 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 ODI
& no Sb/Br)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 8-Sep-2017

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF BQ24075 :

• Automotive: BQ24075-Q1

NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 3-Dec-2017

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ24072RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24072RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24073RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24073RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24074RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24074RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24075RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24075RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24079RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24079RGTR VQFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24079RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
BQ24079RGTT VQFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 3-Dec-2017

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ24072RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24072RGTT VQFN RGT 16 250 210.0 185.0 35.0
BQ24073RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24073RGTT VQFN RGT 16 250 210.0 185.0 35.0
BQ24074RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24074RGTT VQFN RGT 16 250 210.0 185.0 35.0
BQ24075RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24075RGTT VQFN RGT 16 250 210.0 185.0 35.0
BQ24079RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24079RGTR VQFN RGT 16 3000 367.0 367.0 35.0
BQ24079RGTT VQFN RGT 16 250 210.0 185.0 35.0
BQ24079RGTT VQFN RGT 16 250 210.0 185.0 35.0

Pack Materials-Page 2
PACKAGE OUTLINE
RGT0016B SCALE 3.600
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

3.1 B
A
2.9

PIN 1 INDEX AREA


3.1
2.9

1 MAX C

SEATING PLANE

0.05
0.00 0.08

1.6 0.05 (0.2) TYP


5 8
EXPOSED
THERMAL PAD
12X 0.5
4
9

4X SYMM
17
1.5

1
12
0.3
16X
0.2
16 13 0.1 C A B
PIN 1 ID SYMM
(OPTIONAL) 0.05
0.5
16X
0.3

4219033/A 08/2016

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com
EXAMPLE BOARD LAYOUT
RGT0016B VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 1.6)
SYMM
16 13

16X (0.6)

1
12

16X (0.25)
17 SYMM
(2.8)
(0.55)
TYP
12X (0.5)
9
4

( 0.2) TYP
VIA
5 8
(R0.05) (0.55) TYP
ALL PAD CORNERS
(2.8)

LAND PATTERN EXAMPLE


SCALE:20X

0.07 MAX 0.07 MIN


ALL AROUND ALL AROUND

SOLDER MASK
METAL OPENING

SOLDER MASK METAL UNDER


OPENING SOLDER MASK

NON SOLDER MASK


SOLDER MASK
DEFINED
DEFINED
(PREFERRED)

SOLDER MASK DETAILS


4219033/A 08/2016

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com
EXAMPLE STENCIL DESIGN
RGT0016B VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 1.47)
16 13

16X (0.6)

1
12

16X (0.25)

17 SYMM
(2.8)

12X (0.5)

9
4

METAL
ALL AROUND

5 8
SYMM
(R0.05) TYP

(2.8)

SOLDER PASTE EXAMPLE


BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 17:


84% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X

4219033/A 08/2016

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com
PACKAGE OUTLINE
RGT0016C SCALE 3.600
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

3.1 B
A
2.9

PIN 1 INDEX AREA


3.1
2.9

1 MAX C

SEATING PLANE

0.05 0.08
0.00

1.68 0.07 (0.2) TYP


5 8
EXPOSED
THERMAL PAD
12X 0.5 4
9

4X SYMM
1.5

1
12
0.30
16X
0.18
16 13 0.1 C A B
PIN 1 ID SYMM
(OPTIONAL) 0.05

0.5
16X
0.3

4222419/B 11/2016

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com
EXAMPLE BOARD LAYOUT
RGT0016C VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 1.68)
SYMM
16 13

16X (0.6)

1
12

16X (0.24)
SYMM

(2.8)
(0.58)
TYP
12X (0.5)
9
4

( 0.2) TYP
VIA

5 8
(R0.05) (0.58) TYP
ALL PAD CORNERS
(2.8)

LAND PATTERN EXAMPLE


SCALE:20X

0.07 MAX 0.07 MIN


ALL AROUND ALL AROUND

SOLDER MASK
METAL OPENING

SOLDER MASK METAL UNDER


OPENING SOLDER MASK

NON SOLDER MASK


SOLDER MASK
DEFINED
DEFINED
(PREFERRED)

SOLDER MASK DETAILS


4222419/B 11/2016

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com
EXAMPLE STENCIL DESIGN
RGT0016C VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD

( 1.55)
16 13

16X (0.6)

1
12

16X (0.24)

17 SYMM

(2.8)

12X (0.5)

9
4

METAL
ALL AROUND

5 8
SYMM
(R0.05) TYP

(2.8)

SOLDER PASTE EXAMPLE


BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 17:


85% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X

4222419/B 11/2016

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com
IMPORTANT NOTICE

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy