Power MOSFET Basics Understanding Superjunction Technology: Mosfets

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VISHAY SILICONIX

www.vishay.com

MOSFETs Device Application Note AN849

Power MOSFET Basics


Understanding Superjunction Technology
by Sanjay Havanur and Philip Zuk
Power MOSFETs based on superjunction technology have
become the industry norm in high-voltage switching Source Source
and Body and Body
converters. They offer lower RDS(on) simultaneously with
Gate
reduced gate and output charges, which allows for more Oxide Oxide
efficient switching at any given frequency. Prior to the N + R ch N +
availability of superjunction MOSFETs the dominant design
platform for high-voltage devices was based on planar P + Body P + Body
technology. However, fast switching at high voltages poses
its own challenges in AC/DC power supplies and inverters.
Designers making the transition from planar to N - Epi R epi
superjunction MOSFETs often have to accommodate EMI,
voltage spikes, and noise-related concerns by
compromising switching speed. This application note will I DS
compare the characteristics of the two platforms so that the
N + Substrate R substrate
benefits of superjunction technology are fully understood
and utilized.
Fig. 1a - Conventional Planar MOSFET Structure
In order to understand the differences between the two
technologies, we need to start with the basics. Fig. 1a BVDSS 30 V 100 V 600 V
shows the simple structure of a conventional planar
high-voltage MOSFET. Planar MOSFETs typically have a
high drain-to-source resistance per unit of silicon area, and Rch 35 % 8% 3%
come with relatively higher drain source resistances. Lower
RDS(on) values could be achieved with high cell density and
large die sizes. However, large cell densities and die sizes
Repi 35 % 88 % 96 %
also come with high gate and output charges, which
increase the switching losses as well as costs. There is also
a limit to how low the total silicon resistance can go. The
total RDS(on) for the device can be expressed as the sum of
three components: the channel, epi, and the substrate. Rsub 30 % 3% 1%

RDS(on) = Rch + Repi + Rsub Fig. 1b - Resistive Components of a Planar MOSFET


APPLICATION NOTE

Fig. 1b shows a breakdown of different components that


make up the RDS(on) in a planar MOSFET. For low-voltage
MOSFETs the three components are comparable. However,
as the voltage rating is increased, the epitaxial layer needs
to be thicker and more lightly doped to block high voltages.
For every doubling of the voltage rating, the area required to
maintain the same RDS(on) increases more than five-fold. For
600 V rated MOSFETs, more than 95 % of the resistance
comes from the epitaxial layer. It is obvious that for any
significant reduction in the RDS(on) value, it is necessary to
find a way of heavily doping the drift region and drastically
reducing the epi resistance.

Revision: 21-Apr-15 1 Document Number: 66864


For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Device Application Note AN849
www.vishay.com
Vishay Siliconix

Power MOSFET Basics


Understanding Superjunction Technology
Source Source Superjunction MOSFETs can use a thinner epi (A1 + A2) for
and Body and Body a given blocking voltage than conventional planar devices
Gate (A1 + A3). The doping of the N region (ND+) is balanced out
by the doping of the P column (NA-), resulting in no slope. In
N + N + other words, because of the charge balancing mechanism,
P + Col P + Col only the thickness of the epi defines the blocking voltage. As
a result, the superjunction structure has a linear relationship
between on-resistance and breakdown voltage. The
on-resistance increases linearly with an increase in
breakdown voltage. For the same breakdown voltage and
die size, the on-resistance of a superjunction MOSFET will
N Epi be much less than a conventional planar device.
Superjunction devices from Vishay are available under the
N + Substrate E series of high-voltage MOSFETs in ratings from 500 V to
650 V. They are offered in a variety of packages, from
Fig. 2 - Superjunction MOSFET Structure
small SMT footprints like the PowerPAK® SO8 and
Convenonal Planar MOSFET : A1 + A3
Superjuncon MOSFET : A1+ A2
PowerPAK 8 x 8 to the standard TO-xxx packages. Typical
If A2=A3, both the MOSFETs have the same blocking voltage specific on-resistance varies from 20 mΩ -cm2, down to
Slope is proporonal to 10 mΩ-cm2, depending on the breakdown voltage and
A2 epitaxial Doping
technology generation. The on-resistance x area product of
Electric Field ->

Convenonal planar MOSFETs have higher conventional planar MOSFETs can be three to five times
A1 RDS(on) due to thicker and more lightly doped higher, again depending on the voltage rating. For example,
epitaxial region
while the lowest RDS(on) achievable for a 600 V device in the
A3
TO-220 package is 275 mΩ, superjunction devices from
Epitaxial thickness -> Vishay are available down to 50 mΩ in the same package.
Convenonal Planar MOSFET
Of course with every new generation of design platforms,
better devices with lower RDS(on) will be available in the
SOURCE

DRAIN

ND+ ( Nepi) – Dri Region


Convenonal future.
Planar MOSFET
Super Juncon MOSFET
SOURCE

DRAIN

NA- ( P Column) – Dri Region


ND+( N Column) – Dri Region Superjuncon
MOSFET
Fig. 3 - Blocking Voltage and On-resistance Comparison for
Planar and Superjunction MOSFETs

Figure 2 shows the physical structure of superjunction


MOSFETs based on the idea of charge balancing. The drift
region now has multiple P columns, which cancel the charge
in the surrounding N regions under reverse bias. As a result,
the Nepi can now be thinner and heavily doped since the
combined structure offers a much higher resistance to
APPLICATION NOTE

applied reverse voltage. As the N region becomes more


heavily doped, its on-resistance per unit area decreases.
Figure 3 compares the electric field in the drift region vs. epi
thickness for the two technologies. In conventional planar
MOSFETs, the blocking voltage is defined both by the epi
thickness and the doping (ND+), or slope of the line. If
additional blocking voltage is required, not only does the epi
have to be made thicker, but the epi doping line also has to
change. This results in a disproportionate increase in RDS(on)
for higher-voltage MOSFETs. For every doubling of voltage
rating, keeping the same die size, the RDS(on) can increase
anywhere from three- to five-fold.

Revision: 21-Apr-15 2 Document Number: 66864


For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Device Application Note AN849
www.vishay.com
Vishay Siliconix

Power MOSFET Basics


Understanding Superjunction Technology
CAPACITANCES
The reduction in resistance for superjunction devices has RDS(on) values. The superjunction device has 15 % to 25 %
obvious benefits, such as lower conduction losses or improvement for every parameter, except for Eas and Ias.
smaller dies for the same RDS(on). Additionally, the reduction This is because the superjunction device, despite a 20 %
in the chip area can lead to lower capacitances and gate and reduction in RDS(on), has a die size that is only one third of the
output charges, which reduces dynamic losses. In comparable planar. The smaller size affects current and
low-voltage trench or planar MOSFETs, there is usually a power ratings. A large die size has lower current density and
trade-off between lowering the RDS(on) at the cost of higher better heat sinking capabilities. As a result, for a given
capacitances. In the case of superjunction technology the on-resistance, the conventional planar MOSFETs are
compromise is minimal. The charge balancing mechanism inherently more rugged compared to superjunction devices.
achieves simultaneous reduction in RDS(on) and device However, at currents and switching frequencies typically
capacitances, making it a win-win solution. Table 1 used in high-voltage power converters, the superjunction
compares the characteristics of two devices with close device will always offer lower loss and better efficiency.

TABLE 1: COMPARISON OF 600 V PLANAR VS. SUPERJUNCTION DEVICES


RDS(on) Qgs Qgd Qg Qrr Eoss Eas / Ias
DEVICE TECHNOLOGY mΩ nC μJ mJ/A
TYPICAL
SiHP17N60D Planar 275 14 22 45 7000 8.9 165 / 4.2
SiHP15N60E Superjunction 230 11 17 38 5400 6.1 102 / 12

Table 2 shows another comparison, this time for 500 V the same RDS(on) but better specifications on every
devices. The SiHG32N50D is a planar MOSFET with a parameter except UIS ruggedness. It should be noted
125 mΩ typical RDS(on) rating. The die is large, in fact the that Vishay is quite conservative in derating the inductive
largest die that can fit into a TO-247 package. This can be switching specifications. A 100 % derating factor is applied
compared with the superjunction SiHA25N50E in the on the measured failure current, which translates to a
smaller, isolated thin lead TO-220F package, which offers derating factor of four for UIS energy Eas.

TABLE 2: COMPARISON OF 500 V PLANAR VS. SUPERJUNCTION DEVICES


RDS(on) Qgs Qgd Qg Qrr Eoss Eas / Ias
DEVICE TECHNOLOGY PACKAGE mΩ nC μJ mJ/A
TYPICAL
SiHG32N50D Planar TO-247 125 18 29 64 7 23.8 225 / 14
SiHA25N50E Superjunction TO-220F 125 14 25 57 5.3 13.1 53 / 6.8
APPLICATION NOTE

Revision: 21-Apr-15 3 Document Number: 66864


For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Device Application Note AN849
www.vishay.com
Vishay Siliconix

Power MOSFET Basics


Understanding Superjunction Technology
Fig. 4 defines the capacitances for which the charge Gate Charge Considerations
specifications are provided. For the two 600 V devices In any switching circuit the gate drive design is a trade-off
compared above, the capacitance curves are shown in between switching speed and noise. Superjunction devices
Fig. 5. Note that the capacitance scale is logarithmic. offer high switching speeds at high voltages, which also
demand extra attention to drive design. Poor design may
cause voltage spikes, erratic switching, and higher EMI.
Drain Another major concern with ultra-low capacitances is an
increased sensitivity to coupling and noise, which shows up
as gate source oscillation. Designers are then forced to slow
CGD
down the switching speed by introducing high gate
CDS
resistances or low drive currents, which ultimately reduce
the system efficiency.
Gate
Vishay application note AN-608, ”Power MOSFET Basics:
RG Understanding Gate Charge and Using it to Assess
Switching Performance," gives the detailed theory behind
CGS
the switching behavior of conventional MOSFETs
(www.vishay.com/docs/73217/73217.pdf).
Particular reference is made to the gate charge curve as
Source shown in Fig. 4 and Fig. 5 of the application note, which
depict the rise and fall of VDS as the gate is discharged and
charged. Typically the Qgd of a MOSFET can be used for
Fig. 4 - MOSFET Capacitance Definitions estimating the VDS voltage rise and fall times during
switching. Assuming a constant current source driving the
10 000 gate,
tvfall = Qgd / Igon and tvrise = Qgd / Igoff.
Ciss Planar
This simple model cannot be used for superjunction
1000 Ciss SJ
devices, whose structure and switching behaviors are more
complex. As an example, Fig. 6 shows the gate charge
curve for the SiHP33N60E with a VDS curve superposed on
Cxss (pF)

it. One feature of superjunction MOSFETs when compared


100 Coss Planar
to planar devices is the wide variations in their capacitances
as a function of VDS. In a superjunction MOSFET, because
Crss Planar Coss SJ of the 100:1 drop in Crss from 0 V to 600 V, the observed
10 switching durations will appear to be much smaller than
those estimated from the datasheet values of Qgd. While
Crss SJ
there is no analytical method to predict the actual transition
times, which in turn depend on application conditions,
1
0 100 200 300 400 500 600
designers should be aware that good switching
VDS performance can be achieved with lower gate drive
currents. This translates into smaller and lower-cost gate
Fig. 5 - Capacitance Comparison for drivers compared to those used for planar MOSFETs.
APPLICATION NOTE

Planar SiHP17N60D and Superjunction SiHP15N60E MOSFETs

Revision: 21-Apr-15 4 Document Number: 66864


For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Device Application Note AN849
www.vishay.com
Vishay Siliconix

Power MOSFET Basics


Understanding Superjunction Technology
10 000 10.0

9.0

8.0

7.0
1000
6.0

Coss (pF)

Eoss (uJ)
Eoss 5.0

4.0
100
3.0
Coss
2.0

1.0

10 0.0
0 100 200 300 400 500 600
VDS

Fig. 6 - Gate Charge Curve vs. VDS for SiHP15N60E Fig. 7 - Capacitance and Stored Energy vs. VDS for SiHP15N60E

Coss, Co(tr), Co(er), and Eoss


Fig. 5 also shows that Coss for the superjunction device is does not mean that diode recovery can be taken for granted
nearly 40 % lower, leading to reduced stored energy and in ZVS bridges under all operating conditions, including
faster switching, while at the same time achieving lower transients. Lower Qrr, short carrier lifetime, and soft recovery
loss. The output capacitance Coss of all MOSFETs shows characteristics are still important requirements.
non-linear characteristics with respect to applied voltage Superjunction MOSFETs do have the advantage of lower Qrr
VDS. The non-linearity is even more pronounced in the case and trr over planar devices and therefore are better suited in
of superjunction MOSFETs, with a variation of 100:1 in value ZVS applications. However, where the ability of the body
from 0 V to 600 V. This poses a challenge to designers who diode to recover blocking voltage is considered critical,
need effective values for stored charge and energy in the further improvements in the recovery characteristics are
Coss. The superjunction datasheets typically provide two desirable. Recognizing the need, Vishay has introduced the
effective values for Coss, defined as follows: EF series of superjunction MOSFETs in which, using
Co(tr) - defines the value of a fixed capacitor, which has the additional processes during manufacturing, the Qrr of the
same stored charge as the variable Coss at 80 % of the rated body diode is reduced by a factor of 5 to 7.
voltage. Conclusions
Co(er) - defines the value of a fixed capacitor, which has the The superjunction structure is a major development in
same stored energy as the variable Coss at 80 % of the rated high-voltage MOSFET technology and offers significant
voltage. benefits. RDS(on), gate capacitances, and output charge are
Several studies have emphasized the impact of stored all simultaneously reduced, along with die size. To make the
energy Eoss on system efficiency under different operating best use of these fast and efficient devices, designers have
APPLICATION NOTE

conditions. Recognizing the importance, Vishay has to pay greater attention to their system design, particularly
started providing complete Eoss curves for all high-voltage towards reducing PCB parasitics. Superjunction MOSFETs
MOSFETs, all the way up to rated voltage as shown in Fig. 7. have much lower gate charges and can be driven with
low-current gate drivers. Their output capacitances, while
Body Diode Characteristics
highly non-linear, offer lower stored energy Eoss and related
Because of their combination of lower RDS(on) and low output losses. Vishay superjunction devices are available in
capacitances, superjunction MOSFETs are also the devices different packages, voltage ratings, and body diode
of choice for all high-frequency switching applications, characteristics to suit a wide variety of applications.
including ZVS bridges. In a ZVS or synchronous application,
the body diode of the MOSFET is not subject to hard
commutation. The diode current is softly commutated to the
MOSFET channel and the diode recovers voltage blocking
capability when the MOSFET is turned off. However, this

Revision: 21-Apr-15 5 Document Number: 66864


For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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