CIGRE WG B4.57 and B4.

58
DC GRID TEST SYSTEM

PART II:
AVERAGE-VALUE MODELS (TYPE 5)
DCS1 test system in DIgSILENT PowerFactory

Jesús Serrano, Ignacio Mateo, Ana Morales, DIgSILENT Ibérica (info@digsilentiberica.es)

Mª Ángeles Moreno, Universidad Carlos III de Madrid (amoreno@ing.uc3m.es)

Abstract
This document describes the DIgSILENT Average-value models (Type 5) are used to
PowerFactory model of the CIGRE DC model the converters, avoiding the use of a
Grid Test System number 1 (DCS1) [1] and detailed representation of VSC-HVDC
its parameters for dynamic and transient systems with the IGBTs in EMT-type
stability studies. This paper is a programs, forcing the use of a very small
continuation of earlier and preliminary integration time-step size to compute
work that can be found in [2], where the switching events in an accurate manner.
model and results of the steady state Average-value models are more efficient
implementation were covered. All dynamic
and provide similar dynamic averaged
models and their parameters will be
response. The MMC behaviour is
described and detailed throughout the
paper. Results of the dynamic studies are represented using controlled voltage and
given, and time-varying signals are current sources. Low level control systems
presented in plots as a guide for final users. are not considered, and simulations are then
faster than the detailed equivalent model
(Type 4).
1. General description
Average-value models are used to perform
The CIGRE DC Grid Test System working transient studies involving large
group has developed three different disturbances on AC grids. The design and
benchmark cases for steady state and tuning of high level control systems can
transient studies: “DCS1”, “DCS2” and also be achieved with Type 5 simulation
“Full Test System”. models [1].

In this paper, the model corresponding to The “DCS1” system topology represents a
topology “DCS1” has been upgraded with DC system and provides a suitable model to
the implementation of the control and perform investigations about a single point-
protection system dynamic models Type 5 to-point link. It consists of a HVDC link of
in DIgSILENT PowerFactory. +/-200 kV which connects two AC grids,

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one it’s an offshore wind power plant and 2.1. Outer control loops
the other one it’s an onshore grid. These The outer control loop is subdivided in two
AC grids are modelled as a Thevenin parts: one responsible for the D-axis control
equivalent which parameters are defined in and the other for the Q-axis.
Appendix A (Table 1). Furthermore, it
includes two AC/DC converters based on The D-axis outer controller implements
MMC topology. Detailed data can be found different control modes:
in [2].
• DC voltage control mode: it
The inclusion of frequency dependent compares the measured DC voltage
effects in DC lines for time domain with a reference value, obtaining an
simulations has been solved using a rational error which is corrected by a PI
approximation by vector fitting [3]. In controller (Figure 2).
general, DC cables are represented by • Active power control mode: it
single pi-equivalent circuits or multiple pi- compares the measured active power
equivalents, that neglect the frequency- against a desired reference value,
dependent effects and could lead to a wrong calculating an error which is corrected
by the PI controller. Furthermore, it
stability assessment. In the proposed
includes a droop control as well as a
implementation of the DCS1 benchmark,
protection system which attempts to
the cable is modelled with multiple parallel maintain the voltage inside a suitable
RL-branches, as proposed in [4], improving range (Figure 3).
the dynamics of the cable and its impact at
DC system level. The Q-axis outer controller implements
different control modes:

2. Control and protection systems • Reactive power control mode: it

compares the measured reactive power
The structure for the control and protection at AC terminals with a desired
systems is presented in Figure 1. The reference value, obtaining an error
control system of both MMC converters which is corrected by a PI controller
and the protection logic to trip the breaker (Figure 4).
are defined through a frame object, where • AC voltage control mode: it compares
each slot represents different lower level the measured AC voltage with a
functions: reference value, obtaining an error
- Measurement slots: both the AC and which is corrected by a PI controller
DC voltages at the MMC terminals are (Figure 5).
measured. Also, active and reactive
powers which are exported from the
MMC to the AC busbar are measured. The following subsections provide a more
- Outer control loop: it transforms the detailed description of the inner control
different setpoints into current loop, the outer control loop and additional
reference signals in the dq axis. model functions.
- Inner control loop: The inner control
loop limits reference current signals 2.2. Current limiter
into an acceptable range and corrects The scope of the current limiter is to limit
the controlled signals with the inner both the D-axis and the Q-axis reference
current controller. The modulation current values. A strategy to prioritize
factors obtained will define the active or reactive current setpoints is
performance of the MMC. implemented. When the vector summation
of input current setpoints exceeds the

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maximum limiting apparent current, the 3. Simulation results
current of one of the axes is limited
according to the priority defined by the end The tests proposed in [1] have been
user. reproduced in DIgSILENT PowerFactory
2018SP1 (x64). Test results are presented in
this document as a guide for the final user,
2.3. Inner control loops as in the reference document. Three
The inner controller (Figure 6) controls the different test cases are described, and
converter AC voltage that will be used to
results are presented in Appendix C:
generate the modulated switching pattern. It
compares the measured current values in Test Case 1, AC fault at Ba-A1: A 3-
both axes with their respective reference phase to ground metallic fault is applied
values, obtaining an error which is during 200ms at bus Ba-A1 (Figure 9).
corrected by a PI controller for every axis Test case 2, AC fault at Bo-C1: A 3-phase
component. Additionally, the ri to dq to ground metallic fault is simulated during
transformation block converts imaginary 200ms at bus Bo-C1 (Figure 15).
and real measured AC voltage signals into Test case 3, DC fault at Bm-A1: A
dq voltage signals. permanent pole-to-pole metallic fault is
simulated at Cm-A1 terminals (Figure 20).
2.4. Protection system
The protection system is responsible for the 4. References
supervision of current and voltage
variations. The current protection function
compares the measured DC current from
the MMC to a maximum pre-defined value. [1] C. W. G. B4.57, Guide for the
When the measured DC current exceeds the development od Models for HVDC
reference limit value, the protection triggers Converters in a HVDC Grid, December
a signal to block the converter
instantaneously. Following the blocking of 2014.
the converter, the circuit breaker will be
opened after a pre-defined delay. Both the [2] U. C. 3. M. DIgSILENT Ibérica, PART I:
circuit breaker triggering time and the LOAD FLOW MODEL in DIgSILENT
MMC blocking time are adjustable. PowerFactory, 2016.

The voltage protection function compares [3] B. Gustavsen and A. Semlyen, “Rational
the measured voltage with the undervoltage approximation of frequency domain
threshold. If the measured voltage drops responses by vector fitting,” IEEE
below the reference limit value, the Transactions of Power Delivery, vol. 14,
converter will be blocked after a pre-
no. 3, pp. 1052-1061, July 1999.
defined time.
[4] J. Beerten, S. D'Arco and J. A. Suul,
All parameters needed to set up the control “Frequency-dependent cable modelling
and protection system models and their for small-signal stability analysis of VSC-
block diagrams can be found in Appendix HVDC systems,” IET Generation,
A and B respectively. Transmission & Distribution, vol. 10, no.
6, pp. 1370-1381, 2016.

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Appendix A: Model parameters
Table 1: Generation configuration in test system “DCS1”

Nominal Voltage Short Circuit R/X

Generation Bus Type Control Set points
in KV Power in GVA Ratio
V 1.00 p.u.
Ext_Grid_A1 Ba-A1 380 30 0.1 Voltage source
φ 0.00 º
V 1.00 p.u.
Ext_Grid_C1 Bo-C1 145 8 0.1 Voltage source
φ 0.00 º

Table 2: Control mode AC/DC converters in test system “DCS1”

AC/DC Voltage and angle control Power flow control

Control Set points
Converter
Controlled Buses Bus From Bus To
VDC 1.00 p.u. Bm-A1_pos/Bm-A1_neg - -
Cm-A1
Q 0 Mvar - AC_Cm-A1 Grid AC_Cm-A1 Conv
P 400 MW - AC_Cm-C1 Grid AC_Cm-C1 Conv
Cm-C1
Q 0 Mvar - AC_Cm-C1 Grid AC_Cm-C1 Conv

Table 3: Parameter values - current controller model

Parameter Value Unit

I_kp 0.48 p.u./p.u.

I_ki 149.00 s-1

ωL 0.255 p.u.

Pmmax 1.5 p.u.

ed_min -1.5 p.u.

eq_min -1.5 p.u.

ed_max 1.5 p.u.

eq_max 1.5 p.u.

Table 4: Parameter values - active power controller model

Parameter Value Unit

Vdc_min_db 0.95 p.u.

Vdc_max_db 1.05 p.u.

Vdc_kp_db 10.00 p.u./p.u.

P_min -1.2 p.u.

P_max 1.2 p.u.

P_ki 33.00 s-1

P_kp 0 p.u./p.u.

kdroop 0 p.u./p.u.

Tfilt 0.01 s

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 Table 5: Parameter values - protection system model

Parameter Value Unit

idc_limit 3 p.u.
ac_BRK_delay 0.04 s
-6
Block_MMC_delay1 40*10 s
Vac_limit 0.1 p.u.
Block_MMC_delay2 0.02 s

Table 6: Parameter values - reactive power controller model

Parameter Value Unit

Q_min -0.5 p.u.
Q_max 0.5 p.u.
Q_ki 33.00 s-1
Q_kp 0 p.u./p.u.
Tfilt 0.01 s

Table 7: Parameter values - Vac controller model

Parameter Value Unit

Vac_ki 30 s-1
Vac_kp 0 p.u./p.u.
Tfilt 0.01 S
Vac_min -0.5 p.u.

Vac_max 0.5 p.u.

Table 8: Parameter values - Vdc controller model

Parameter Value Unit

Vdc_ki 272.00 s-1
Vdc_kp 8.00 p.u./p.u.
Tfilt 0.01 s
Vdc_min -1.2 p.u.
Vdc_max 1.2 p.u.

Table 9: Parameter values – Idq ref limiter

Parameter Value Unit

I_lim 1.1 p.u.

Table 10: Parameter values – dq transformation

Parameter Value Unit

Tfilt 0.01 s

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Appendix B: Dynamic Models

Figure 1: General view of control and protections systems

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 Figure 2: DC voltage controller model

Figure 3: Active power controller model

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 Figure 4: Reactive power controller model

Figure 5: AC voltage controller model

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 Figure 6: Current controller model

Figure 7: RI to DQ transformation

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 Figure 8: DIgSILENT PLL block diagram

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Appendix C: Dynamic Model Results

Test Case 1: AC fault at Ba-A1

Figure 9: AC fault at busbar Ba-A1 in DCS1

Table 11: AC fault at busbar Ba-A1 – Events

Time (ms)
Events
After fault application

AC fault (applied at 1s) 0

Cm-A1 blocking due to low AC voltage 20
Cm-C1 deadband activation 23
AC fault elimination 200

Cm-A1 deblocking 244

Cm-C1 deadband de-activation 266

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 Figure 10: Pole-to-pole DC voltage at converter terminals Cm-A1 and Cm-C1

Figure 11: DC current at converter terminals Cm-A1 and Cm-C1

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 Figure 12: Active & Reactive power flow on primary side of transformer Cm-A1

Figure 13: 3-phase instantaneous currents on primary side of transformer Cm-A1

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 Figure 14: Instantaneous current flowing in upper valve phase A (top: Cm-C1, bottom: Cm-A1)

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Test Case 2: AC Fault at Bo-C1

Figure 15: AC Fault at Bo-C1 in DCS1

Table 12: AC Fault in Bo-C1 - Events

Time (ms)
Events After fault application

AC fault (applied at 1s) 0

Cm-C1 blocking due to low AC voltage 20

AC fault elimination 200

Cm-C1 deblocking 244

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 Figure 16: Pole-to-pole DC voltage at converter terminals Cm-A1 and Cm-C1

Figure 17: DC current at converter terminals Cm-A1 and Cm-C1

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 Figure 18: Active & reactive power flow on primary side of transformer Cm-A1

Figure 19: 3-phase instantaneous currents on primary side of transformer Cm-C1 (top) and Cm-A1 (bottom)

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Test Case 3: DC Fault at Bm-A1

Figure 20: DC Fault at Bm-A1 in DCS1

Table 13: DC Fault at Bm-A1 - Events

Time (ms)
Events After fault application
DC fault (applied at 1s) 0
Cm-A1 blocking due to DC overcurrent 0.061
Cm-C1 blocking due to DC overcurrent 1.133
AC Circuit Breaker opens (Cm-A1) 40
AC Circuit Breaker opens (Cm-C1) 47

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 Figure 21: Pole-to-pole DC voltage at converter terminals Cm-A1 and Cm-C1

Figure 22: DC current at converter terminals Cm-A1 and Cm-C1.

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 Figure 23: 3-phase instantaneous currents on primary side of transformer Cm-C1 (top) and Cm-A1 (bottom)

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