Exercise:: Logic Gates - General Questions: Logic Gates - True or False Logic Gates - Filling The Blanks

Exercise :: Logic Gates - General Questions
 Logic Gates - General Questions

 Logic Gates - True or False
 Logic Gates - Filling the Blanks
1. The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.
A. A = 1, B = 1, C = 0
B. A = 0, B = 0, C = 0
C. A = 1, B = 1, C = 1
D. A = 1, B = 0, C = 1
Answer: Option C
Explanation:
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2. If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a
HIGH output?
A. 1
B. 2
C. 7
D. 8
Answer: Option A
Explanation:
3. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the
output is HIGH, the gate is a(n):
A. AND
B. NAND
C. NOR
D. OR
Answer: Option B
Explanation:
4. A device used to display one or more digital signals so that they can be compared to expected
timing diagrams for the signals is a:
A. DMM
B. spectrum analyzer
C. logic analyzer
D. frequency counter
Answer: Option C
Explanation:
5. When used with an IC, what does the term "QUAD" indicate?
A. 2 circuits
B. 4 circuits
C. 6 circuits
D. 8 circuits
Answer: Option B
6. The output of an OR gate with three inputs, A, B, and C, is LOW when ________.
A. A = 0, B = 0, C = 0
B. A = 0, B = 0, C = 1
C. A = 0, B = 1, C = 1
D. all of the above

Answer: Option A
Explanation:
7. Which of the following logical operations is represented by the + sign in Boolean algebra?
A. inversion
B. AND
C. OR
D. complementation
Answer: Option C
Explanation:
8. Output will be a LOW for any case when one or more inputs are zero for a(n):
A. OR gate
B. NOT gate
C. AND gate
D. NOR gate
Answer: Option C
Explanation:
9. How many pins does the 4049 IC have?

A. 14
B. 16
C. 18
D. 20
Answer: Option B
Explanation:
10. Which of the following choices meets the minimum requirement needed to create specialized
waveforms that are used in digital control and sequencing circuits?
A. basic gates, a clock oscillator, and a repetitive waveform generator
B. basic gates, a clock oscillator, and a Johnson shift counter
C. basic gates, a clock oscillator, and a DeMorgan pulse generator
basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift
D.
counter
Answer: Option A
11. TTL operates from a ________.

A. 9-volt supply
B. 3-volt supply
C. 12-volt supply
D. 5-volt supply
Answer: Option D
Explanation:
12. The output of a NOR gate is HIGH if ________.

A. all inputs are HIGH
B. any input is HIGH
C. any input is LOW
D. all inputs are LOW

Answer: Option D
Explanation:
13. The switching speed of CMOS is now ________.

A. competitive with TTL
B. three times that of TTL
C. slower than TTL
D. twice that of TTL

Answer: Option A
Explanation:
14. The format used to present the logic output for the various combinations of logic inputs to a gate
is called a(n):
A. Boolean constant
B. Boolean variable
C. truth table
D. input logic function

Answer: Option C
Explanation:
15. The power dissipation, PD, of a logic gate is the product of the ________.
A. dc supply voltage and the peak current
B. dc supply voltage and the average supply current
C. ac supply voltage and the peak current
D. ac supply voltage and the average supply current

Answer: Option B
16. A logic probe is again applied to the pins of a 7421 IC with the following results. Is there a
problem with the circuit and if so, what is the problem?
A. Pin 6 should be ON.
B. Pin 8 should be ON.
C. Pin 8 should be pulsing.
D. no problem
Answer: Option D
Explanation:
17. If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a
HIGH output?
A. 1
B. 2
C. 7
D. 8
Answer: Option A
Explanation:
18. The Boolean expression for a 3-input AND gate is ________.
A. X = AB
B. X = ABC
C. X = A + B + C
D. X = AB + C
Answer: Option B
Explanation:
19. A CMOS IC operating from a 3-volt supply will consume ________.

A. less power than a TTL IC
B. more power than a TTL IC
C. the same power as a TTL IC
D. no power at all
Answer: Option A
Explanation:
20. What does the small bubble on the output of the NAND gate logic symbol mean?
A. open collector output
B. tristate
C. The output is inverted.
D. none of the above

Answer: Option C
21. What are the pin numbers of the outputs of the gates in a 7432 IC?
A. 3, 6, 10, and 13
B. 1, 4, 10, and 13
C. 3, 6, 8, and 11
D. 1, 4, 8, and 11
Answer: Option C
Explanation:
22. The output of a NOT gate is HIGH when ________.

A. the input is LOW
B. the input is HIGH
C. power is applied to the gate's IC
D. power is removed from the gate's IC

Answer: Option A
Explanation:
23. If the input to a NOT gate is A and the output is X, then ________.
A. X=A
B.
C. X = 0

Answer: Option B
Explanation:
24. A logic probe is used to test the pins of a 7411 IC with the following results. Is there a problem
with the chip and if so, what is the problem?
A. Pin 6 should be ON.
B. Pin 6 should be pulsing.
C. Pin 8 should be ON.

D. no problem
Answer: Option B
Explanation:
25. How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate
to go HIGH?
A. any one of the inputs
B. any two of the inputs
C. any three of the inputs
D. all four inputs

Answer: Option D
26. If the output of a three-input AND gate must be a logic LOW, what must the condition of the
inputs be?
A. All inputs must be LOW.
B. All inputs must be HIGH.
C. At least one input must be LOW.
D. At least one input must be HIGH.

Answer: Option C
Explanation:
27. Logically, the output of a NOR gate would have the same Boolean expression as a(n):
A. NAND gate immediately followed by an inverter
B. OR gate immediately followed by an inverter
C. AND gate immediately followed by an inverter
D. NOR gate immediately followed by an inverter

Answer: Option B
Explanation:
28. A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used
on each of the input terminals, but the output indication does not change. What is wrong?
A. The dim indication on the logic probe indicates that the supply voltage is probably low.
B. The output of the gate appears to be open.
C. The dim indication is the result of a bad ground connection on the logic probe.
D. The gate is a tristate device.

Answer: Option B
Explanation:
29. What is the Boolean expression for a three-input AND gate?

A. X=A+B+C
B. X = A BC
C. A – B – C
D. A $ B $ C
Answer: Option B
Explanation:
30. Which of the following gates has the exact inverse output of the OR gate for all possible input
combinations?
A. NOR
B. NOT
C. NAND
D. AND
Answer: Option A
Explanation:
31. What is the difference between a 7400 and a 7411 IC?

A. 7400 has two four-input NAND gates; 7411 has three three-input AND gates
B. 7400 has four two-input NAND gates; 7411 has three three-input AND gates
C. 7400 has two four-input AND gates; 7411 has three three-input NAND gates
D. 7400 has four two-input AND gates; 7411 has three three-input NAND gates
Answer: Option B
Explanation:
32. Write the Boolean expression for an inverter logic gate with input C and output Y.
A. Y=C
B. Y =
Answer: Option B
Explanation:
33. The output of an exclusive-OR gate is HIGH if ________.

A. all inputs are LOW
B. all inputs are HIGH
C. the inputs are unequal

Answer: Option C
Explanation:
34. A clock signal with a period of 1 s is applied to the input of an enable gate. The output must
contain six pulses. How long must the enable pulse be active?
A. Enable must be active for 0 s.
B. Enable must be active for 3 s.
C. Enable must be active for 6 s.
D. Enable must be active for 12 s.

Answer: Option C
Explanation:
35. The AND function can be used to ________ and the OR function can be used to ________ .
A. enable, disable
B. disable, enable
C. enable or disable, enable or disable

D. detect, invert
Answer: Option C
36. One advantage TTL has over CMOS is that TTL is ________.
A. less expensive
B. not sensitive to electrostatic discharge
C. faster
D. more widely available

Answer: Option B
Explanation:
37. A 2-input NOR gate is equivalent to a ________.

A. negative-OR gate
B. negative-AND gate
C. negative-NAND gate

Answer: Option B
Explanation:
38. If a 3-input OR gate has eight input possibilities, how many of those possibilities will result in a
HIGH output?
A. 1
B. 2
C. 7
D. 8
Answer: Option C
Explanation:
39. Fan-out is specified in terms of ________.

A. voltage
B. current
C. wattage
D. unit loads
Answer: Option D
Explanation:
40. How many input combinations would a truth table have for a six-input AND gate?
A. 32
B. 48
C. 64
D. 128
Answer: Option C
41. What is the circuit number of the IC that contains four two-input AND gates in standard TTL?
A. 7402
B. 7404
C. 7408
D. 7432
Answer: Option C
Explanation:
42. The terms "low speed" and "high speed," applied to logic circuits, refer to the ________.
A. rise time
B. fall time
C. propagation delay time
D. clock speed
Answer: Option C
Explanation:
43. The NOR logic gate is the same as the operation of the ________ gate with an inverter
connected to the output.
A. OR
B. AND
C. NAND

Answer: Option A
Explanation:
44. The logic expression for a NOR gate is ________.

A.
B.
C.
D.
Answer: Option D
Explanation:
45. With regard to an AND gate, which statement is true?

A. An AND gate has two inputs and one output.
B. An AND gate has two or more inputs and two outputs.
C. If one input to a 2-input AND gate is HIGH, the output reflects the other input.
D. A 2-input AND gate has eight input possibilities.

Answer: Option C
46. The term "hex inverter" refers to:

A. an inverter that has six inputs
B. six inverters in a single package
C. a six-input symbolic logic device
D. an inverter that has a history of failure

Answer: Option B
Explanation:
47. How many inputs are on the logic gates of a 74HC21 IC?
A. 1
B. 2
C. 3
D. 4
Answer: Option D
Explanation:
48. The basic logic gate whose output is the complement of the input is the:
A. OR gate
B. AND gate
C. inverter
D. comparator
Answer: Option C
Explanation:
49. When reading a Boolean expression, what does the word "NOT" indicate?
A. the same as
B. inversion
C. high
D. low
Answer: Option B
Explanation:
50. The output of an exclusive-NOR gate is HIGH if ________.

A. the inputs are equal
B. one input is HIGH, and the other input is LOW
C. the inputs are unequal

Answer: Option A
51. How many AND gates are found in a 7411 IC?

A. 1
B. 2
C. 3
D. 4
Answer: Option C
Explanation:
52. Which of the following equations would accurately describe a four-input OR gate when A =
1, B = 1, C = 0, and D = 0?
A. 1 + 1 + 0 + 0 = 01
B. 1 + 1 + 0 + 0 = 1
C. 1 + 1 + 0 + 0 = 0
D. 1 + 1 + 0 + 0 = 00
Answer: Option B
Explanation:
53. What is the name of a digital circuit that produces several repetitive digital waveforms?
A. an inverter
B. an OR gate
C. a Johnson shift counter
D. an AND gate
Answer: Option C
Explanation:
54. The basic types of programmable arrays are made up of ________.
A. AND gates
B. OR gates
C. NAND and NOR gates
D. AND gates and OR gates

Answer: Option D
Explanation:
55. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is
HIGH is a(n):
A. OR gate
B. AND gate
C. NOR gate
D. NOT operation
Answer: Option A
56. CMOS IC packages are available in ________.

A. DIP configuration
B. SOIC configuration
C. DIP and SOIC configurations
D. neither DIP nor SOIC configurations

Answer: Option C
Explanation:
57. Which of the following is not a basic Boolean operation?

A. OR
B. NOT
C. AND
D. FOR
Answer: Option D
Explanation:
58. Which of the following gates is described by the expression ?

A. OR
B. AND
C. NOR
D. NAND
Answer: Option D
Explanation:
59. What is the Boolean expression for a four-input OR gate?

A. Y=A+B+C+D
B. Y = A B  C  D
C. Y = A – B – C – D
D. Y = A $ B $ C $ D
Answer: Option A
Explanation:
60. How many truth table entries are necessary for a four-input circuit?
A. 4
B. 8
C. 12
D. 16
Answer: Option D
61. How many entries would a truth table for a four-input NAND gate have?
A. 2
B. 8
C. 16
D. 32
Answer: Option C
Explanation:
62. The Boolean expression for a 3-input OR gate is ________.

A. X=A+B
B. X = A + B + C
C. X = ABC
D. X = A + BC
Answer: Option B
Explanation:
63. From the truth table for a three-input NOR gate, what is the only condition of inputs A, B,
and Cthat will make the output X high?
A. A = 1, B = 1, C = 1
B. A = 1, B = 0, C = 0
C. A = 0, B = 0, C = 1
D. A = 0, B = 0, C = 0
Answer: Option D
Explanation:
64. The logic gate that will have a LOW output when any one of its inputs is HIGH is the:
A. NAND gate
B. AND gate
C. NOR gate
D. OR gate
Answer: Option C
Explanation:
65. The output of a NAND gate is LOW if ________.

A. all inputs are LOW
B. all inputs are HIGH
C. any input is LOW
D. any input is HIGH

Answer: Option B
Exercise :: Logic Gates - True or False

1. A truth table illustrates how the input level of a gate responds to all the possible output level
combinations.
A. True
B. False
Answer: Option B
Explanation:
2. A NOR gate output is LOW if any of its inputs is LOW.

A. True
B. False
Answer: Option B
Explanation:
3. As a rule, CMOS has the lowest power consumption of all IC families.

A. True
B. False
Answer: Option A
Explanation:
4. A popular waveform generator is the Johnson shift counter.

A. True
B. False
Answer: Option A
Explanation:
5. Good troubleshooting is done by looking at the input signal and how it interacts with the circuits.
A. True
B. False
Answer: Option B
6. A NOR gate and an OR gate operate in exactly the same way.

A. True
B. False
Answer: Option B
Explanation:
7. An OR array is programmed by blowing fuses to eliminate selected variables from the output
functions.
A. True
B. False
Answer: Option A
Explanation:
8. A NAND gate output is LOW only if all the inputs are HIGH.
A. True
B. False
Answer: Option A
Explanation:
9. An AND gate output is LOW if all the inputs are HIGH.

A. True
B. False
Answer: Option B
Explanation:
10. Power is connected to pins 7 and 14 of a 7408 quad two-input AND gate IC to allow voltage for
all four AND gates on the IC.
A. True
B. False
Answer: Option B
11. An exclusive-NOR gate output is HIGH when the inputs are unequal.
A. True
B. False
Answer: Option B
Explanation:
12. An OR gate output is HIGH only if all the inputs are HIGH.
A. True
B. False
Answer: Option B
Explanation:
13. A waveform can be enabled or disabled by both AND and OR gates.

A. True
B. False
Answer: Option A
Explanation:
14. An exclusive-OR gate output is HIGH when the inputs are unequal.
A. True
B. False
Answer: Option A
Explanation:
15. In a Boolean equation the use of the + symbol represents the OR function.
A. True
B. False
Answer: Option A
16. A logic gate has one or more output terminals and one input terminal.
A. True
B. False
Answer: Option B
Explanation:
17. A logic pulser is used to determine the level of floating in a circuit.

A. True
B. False
Answer: Option B
Explanation:
18. An inverter output is the complement of its input.

A. True
B. False
Answer: Option A
Explanation:
19. It is important to memorize logic symbols, Boolean equations, and truth tables for logic gates.
A. True
B. False
Answer: Option A
Explanation:
Exercise :: Logic Gates - Filling the Blanks

1. The gates in this figure are implemented using TTL logic. If the input of the inverter is open, and
you apply logic pulses to point B, the output of the AND gate will be ________.
A. a steady LOW
B. a steady HIGH
C. an undefined level
D. pulses
Answer: Option A
Explanation:
2. The gates in this figure are implemented using TTL logic. If the output of the inverter is open,
and you apply logic pulses to point B, the output of the AND gate will be ________.
A. a steady LOW
B. a steady HIGH
C. an undefined level
D. pulses
Answer: Option D
Explanation:
3. If A is LOW or B is LOW or BOTH are LOW, then X is LOW. If A is HIGH and B is HIGH, then X
is HIGH. These rules specify the operation of a(n) ________.
A. AND gate
B. OR gate
C. NAND gate
D. XOR gate
Answer: Option A
Explanation:
4. A major advantage of ECL logic over TTL and CMOS is ________.

A. low power dissipation
B. high speed
C. both low power dissipation and high speed
D. neither low power dissipation nor high speed

Answer: Option B
Explanation:
5. The output of an XOR gate is HIGH only when ________.

A. both inputs = 0
B. both inputs = 1
C. the two inputs are unequal
D. both inputs are undefined

Answer: Option C
6. A 2-input gate that can be used to pass a digital waveform unchanged at certain times and
inverted at other times is a(n) ________.
A. AND gate
B. OR gate
C. NAND gate
D. XOR gate
Answer: Option D
Explanation:
7. The gates in this figure are implemented using TTL logic. If the output of the inverter has an
internal open circuit, what voltage would you expect to measure at the inverter's output?
A. Less than 0.4 V
B. 1.6 V
C. Greater than 2.4 V
D. All of the above

Answer: Option B
Explanation:
8. When does the output of a NAND gate = 1?

A. Whenever a 0 is present at an input
B. Only when all inputs = 0
C. Whenever a 1 is present at an input
D. Only when all inputs = 1

Answer: Option A
Explanation:
9. The number of input combinations for a 4-input gate is ________.

A. 9
B. 8
C. 15
D. 16
Answer: Option D
Explanation:
10. When does the output of a NOR gate = 0?
A. Whenever a 0 is present at an input
B. Only when all inputs = 0
C. Whenever a 1 is present at an input
D. Only when all inputs = 1

Answer: Option C

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Exercise :: Logic Gates - General Questions

 Logic Gates - General Questions

D. all of the above

9. How many pins does the 4049 IC have?

B. basic gates, a clock oscillator, and a Johnson shift counter

C. basic gates, a clock oscillator, and a DeMorgan pulse generator

11. TTL operates from a ________.

12. The output of a NOR gate is HIGH if ________.

B. any input is HIGH

C. any input is LOW

D. all inputs are LOW

13. The switching speed of CMOS is now ________.

B. three times that of TTL

C. slower than TTL

D. twice that of TTL

D. input logic function

B. dc supply voltage and the average supply current

C. ac supply voltage and the peak current

D. ac supply voltage and the average supply current

A. Pin 6 should be ON.

B. Pin 8 should be ON.

C. Pin 8 should be pulsing.

19. A CMOS IC operating from a 3-volt supply will consume ________.

B. more power than a TTL IC

C. the same power as a TTL IC

C. The output is inverted.

D. none of the above

22. The output of a NOT gate is HIGH when ________.

B. the input is HIGH

C. power is applied to the gate's IC

D. power is removed from the gate's IC

D. none of the above

A. Pin 6 should be ON.

B. Pin 6 should be pulsing.

C. Pin 8 should be ON.

B. any two of the inputs

C. any three of the inputs

D. all four inputs

B. All inputs must be HIGH.

C. At least one input must be LOW.

D. At least one input must be HIGH.

B. OR gate immediately followed by an inverter

C. AND gate immediately followed by an inverter

D. NOR gate immediately followed by an inverter

B. The output of the gate appears to be open.

D. The gate is a tristate device.

29. What is the Boolean expression for a three-input AND gate?

31. What is the difference between a 7400 and a 7411 IC?

33. The output of an exclusive-OR gate is HIGH if ________.

B. all inputs are HIGH

C. the inputs are unequal

D. none of the above

B. Enable must be active for 3 s.

C. Enable must be active for 6 s.

D. Enable must be active for 12 s.

C. enable or disable, enable or disable

B. not sensitive to electrostatic discharge

D. more widely available