Transformer Inrush Mitigation For Dynamic Voltage Restorer Using Direct Flux Linkage Control

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IET Power Electronics

Research Article

ISSN 1755-4535
Transformer inrush mitigation for dynamic Received on 9th August 2014
Revised on 18th May 2015
voltage restorer using direct flux linkage Accepted on 18th June 2015
doi: 10.1049/iet-pel.2014.0640
control www.ietdl.org

Shan Gao ✉, Xinchun Lin, Shangjun Ye, He Lei, Yong Kang


State Key Laboratory of Advanced Electromagnetic Engineering and Technology, School of Electrical & Electronic Engineering,
Huazhong University of Science and Technology, Wuhan, Hubei Province, People’s Republic of China
✉ E-mail: vip_gao@qq.com

Abstract: Dynamic voltage restorer (DVR) based on transformer-coupled topology is the most cost-effective solution to
protect consumer from voltage sags. However, an important issue about this topology is the transformer saturation.
Magnetic saturation of the transformer will generate large inrush current which may greatly distort the compensation
voltage or even trigger the over-current protection. To prevent the transformer from saturation, this study proposes a
novel direct magnetising flux linkage control strategy. Distinguished from existing DVR models which ignored the
transformer magnetising branch, this study establishes a comprehensive DVR model by adopting the magnetising flux
linkage as a state-variable. Therefore, by adopting flux linkage feedback, the magnetising flux linkage would be directly
controlled. Otherwise, to implement the flux linkage control, this study proposes a robust flux estimation method to
carry out the proposed control scheme. Finally, the whole system is verified on a 380 V/10 kVA three-phase
experimental DVR prototype.

1 Introduction auxiliary winding to prevent transformer from saturation.


However, these methods had increased the hardware cost of DVR
Voltage sag is accepted as one of the most common and costly power systems. Because the terminal voltage of DVR series transformer
quality issues [1, 2]. Although most of them last for only several depends on output voltage of the VSI, a more cost-effective way
line-cycles, they are still long enough for many sensitive loads to to avoid transformer saturation is to adjust the shape or amplitude
drop out, such as variable speed drives, motor starter contacts, of the DVR compensation voltage. For example, several authors
control relays, and automated systems [3–5]. To protect sensitive have pointed out that if postpone DVR compensation till the
load from voltage sags, dynamic voltage restorer (DVR) was voltage command comes to the phase of π/2 or −π/2, no dc flux
proposed as a custom power equipment in 1992. Currently, DVR linkage would be generated. Obviously, this method may cause a
has been accepted as the most common and cost-effective solution load voltage drop for half line-cycle in the worst case. Another
to mitigate voltage sags [6]. approach to eliminate dc magnetising flux linkage is to scale down
As shown in Fig. 1, DVR is series-connected between the utility the compensation voltage by 50% in the first half line-cycle. Other
and sensitive loads to compensate voltage sags, swells, than the fixed 50% ratio, Fitzer et al. [16] improved this method
imbalances, harmonics, and phase shifts of the load [7–10]. A by adopting an adaptive form factor to regulate the amplitude of
typical DVR system consists of voltage source inverter (VSI), the voltage command in which the value of the factor depends on
output filter, series transformer, and energy storage unit which initial phase and magnitude of the DVR compensation voltage.
connecting with the dc-link. The DVR control system is designed Jimichi et al. [17] found that except for regulating the voltage
to regulate the DVR output voltage to compensate the sagged amplitude, interrupting the voltage for the one-sixth line-cycle
utility. In some DVR applications, the series transformer was could also eliminate dc flux linkage, while Gao et al. [13]
omitted [11, 12]. However, compared with the transformer-less improved it by interrupting the DVR compensation around the
topology, the topology shown in Fig. 1 brings the advantages of peak of the voltage waveform to obtain the shortest interruption time.
electrical isolation and voltage boost capability, which makes it However, all the aforementioned solutions are based on the
more adaptable in DVR applications. assumption that the compensation voltages are sinusoidal
However, there are still some challenges that must be taken into waveforms and the amplitudes are constant. Unfortunately, the
account for the topology with series transformer. For example, the voltage at PCC is often distorted, and its amplitude may also
transformer will introduce phase shift and voltage drop to the fluctuate during the whole event. To solve this problem,
compensation voltage. In addition, the transformer inrush current closed-loop regulation methods have been proposed [18–20]. To
which commonly occurs at the transformer energisation process avoid saturation, Nielsen et al. [18] changed the voltage command
may trigger the VSI over-current protection, and eventually, lead to zero if the transformer current had reached a limiting value.
to the failure of DVR compensation [13]. The magnitude of the dc While Cheng et al. [19], Chen et al. [20] changed the voltage
flux linkage which results in transformer saturation depends on the command to zero when the estimated flux linkage had reached the
initial phase and amplitude of the DVR compensation voltage. To saturation level, then a calculated dc voltage was added to the
avoid saturation, the transformer is designed to twice of its rated voltage command in the next cycle to eliminate dc flux linkage.
flux linkage in some reports [14]. Needless to say, this solution It is undeniable that the closed-loop regulation schemes had
dramatically increases the size, weight, and cost of the DVR system. improved their adaptability in complicated voltage sag events, but
Several DVR transformer inrush current mitigation methods have the elimination of the dc flux linkage is highly relying on the
been proposed in literatures. For example, [14] installed an inrush magnitude estimation of the sinusoidal compensation voltage.
current limiter between the transformer and VSI to regulate this Therefore, the dc flux linkage regulation algorithms are still
current. Another approach proposed in [15] added a controllable open-loop approaches. The residual dc flux linkage would affect

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


& The Institution of Engineering and Technology 2015 2281
simplicity the converted parameters are defined by their original
symbols. Lσ1 and rσ1 represent the equivalent leakage inductance
and resistance of primary winding, while Lσ2 and rσ2 represent the
secondary winding’s. Lm represents the inductance of transformer
magnetising branch, by ignoring the core-loss. vS, vi, vL, and iL
represent utility voltage, H-bridge inverter output voltage, load
voltage, and load current, respectively. Distinguished from other
DVR models which ignored the transformer magnetising branch,
this paper will establish a comprehensive model by adopting the
magnetising flux linkage as a state-variable.
By choosing transformer magnetising flux linkage lm, DVR
compensation voltage vDVR, and transformer secondary winding
current i2 as state variables, the DVR plant model in state-space
form can be expressed as
Fig. 1 DVR typical topology

ẋ = Ax+Bu
. (1)
the subsequent compensation, especially for the long duration y = Cx
voltage sags. Therefore, this paper tries to propose a novel direct  T  T
flux linkage control strategy to regulate the magnetising flux where x = lm i2 vDVR , u = vi iL ,
linkage. Compared with the methods of [19, 20] in which
the estimated flux linkage was only used as a criterion to regulate ⎡ ⎤
rs1 Ls2 rs1 Ls2 Lm − rs2 Ls1 Lm Ls1 Lm
− −
the voltage command, the proposed control scheme will use the ⎢ LP LP LP ⎥
transformer magnetising flux linkage as a state-variable to directly ⎢ ⎥
⎢ ⎥
regulate it. Similar to the differences between direct and indirect ⎢ rs1 (rs2 Ls1 + rs2 Lm + rs1 Lm ) Ls1 + Lm ⎥
A=⎢
⎢ − − ⎥,

current control algorithms of the grid-tied power converters, the ⎢ LP LP LP ⎥
proposed control scheme could directly regulate the magnetising ⎢ ⎥
⎣ 1 ⎦
flux linkage and eliminate dc flux linkage under the disturbance of 0 0
sagged utility. Cf
The remainder of this paper is organised as follows: First, a ⎡ ⎤
comprehensive DVR model and the direct flux linkage control Ls2 Lm
scheme are proposed in Section 2. Section 3 proposes a robust ⎢ − LP 0 ⎥
⎢ ⎥
flux linkage estimator for series transformer. Then, comparisons   ⎢ ⎢ Lm


between proposed control scheme and existing methods are B = Bvi BiL = ⎢ 0 ⎥,
⎢ LP ⎥
presented in Section 4. Finally, the experimental results in Section ⎢ ⎥
⎣ 1 ⎦
5 verify the effectiveness of the proposed control scheme. 0 −
Cf
 
C= 0 0 1 , LP = Ls1 Lm + Ls1 Ls2 + Ls2 Lm .
2 Modelling and direct flux linkage control
It can be seen from (1) that the proposed model is one-order higher
2.1 Modelling with transformer magnetising flux linkage
than commonly-used one, which would provide the opportunity to
Fig. 2a shows the equivalent single-phase diagram of DVR, in control the transformer flux linkage directly and effectively.
which the filter capacitor Cf is placed at the line-side of the
transformer. This topology used the transformer leakage 2.2 Direct flux linkage control
inductance as a filter inductance, achieving the advantage of no
additional filter inductor, no voltage drop, and no phase shift Functionally, DVR should compensate the sagged utility and ensure
comparing with the commonly-used DVR topology [21] in which that the flux linkage lm will not reach its limit during the
Cf is placed to the inverter side of the transformer. compensation process, or the transformer will saturate and DVR
Fig. 2b shows the equivalent circuit of Fig. 2a, in which the fails to compensate the sagged utility. The inspiration of the
inverter-side parameters are converted to the line-side, for proposed direct flux linkage control strategy comes from the

Fig. 2 DVR equivalent single-phase diagrams


a DVR equivalent single-phase diagram
b Single-phase equivalent circuit

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


2282 & The Institution of Engineering and Technology 2015
current limit function of the widely-used double-loop controlled
converters. By introducing an additional flux linkage loop to the
control scheme, the transformer magnetising flux linkage would be
fully controlled, hence transformer saturation and inrush current
could be avoided.
Based on the plant model in (1), the block diagram of the proposed
control strategy is shown in Fig. 3. Functionally, the whole control
system can be divided into three loops, defined as Loop I, Loop II,
and Loop III. Loop I is the flux linkage loop which is designed to
track the flux linkage command, while Loop II is an integral
feedback loop which is added to attenuate the dc flux linkage, then
Loop III is designed to track the compensation voltage command.
The flux linkage limiter, inserted between Loop III and Loop II, is
used to limit the magnitude of the flux linkage command. The
detailed design process is proposed in the following of this section. Fig. 4 Diagram of the flux linkage loop

(1) Design of Loop I: In Loop I, the state-feedback vector K 1 is 


divided into two parts, defined as K 11 and K 12 , as shown in damping ratio of 0.5 · rs2 Cf /Ls2 in this system. Which means
Fig. 4. K 11 is designed to decouple the flux linkage lm from vDVR, when the flux linkage command is limited by flux linkage limiter
and i2, while K 12 is designed by assigning the closed-loop poles to in Fig. 4, the underdamped conjugated poles in (5) will introduce
the desired positions to track the flux linkage command. The oscillations. Hence the state-feedback vector K 12 is designed to
detailed design process is given as following. damp the oscillations by assigning the closed-loop poles to
appropriate positions. In this paper, the dominant conjugated poles
are assigned to the poles with the natural resonant frequency of ωn
and damping ratio of ζ, while the non-dominant pole is assigned
The flux linkage differential equation in (1) is
to −(35̃)zvn .
Combined with the state-feedback of K 1 (K 1 = K 11 + K 12 ), the
dlm r L r L − rs2 Ls1 Lm L L compensated system with the input of lm1 ∗ can be obtained as
= − s1 s2 lm + s1 s2 i2 − s1 m vDVR
dt LP LP LP
Ls2 Lm 
− v. (2) ẋ = (A − Bvi K 1 )x + Bvi lm1 ∗ + BiL iL
LP i . (6)
y = Cx
 
The feedback coefficients Ki, and Kv in vector K 11 = 0 K i Kv
are designed to decouple lm from i2 and vDVR, as shown as
⎧ (2) Design of Loop II: As mentioned before, the dc flux linkage
⎪ rs2 Ls1 − rs1 Ls2

⎨ Ki = deviation, depending on the initial phase and amplitude of the
L s2
(3) DVR compensation voltage, will affect the sustainable

⎪ L compensation of DVR [19]. To attenuate the dc component in flux
⎩ K v = s1
Ls2 linkage, a flux linkage integral feedback is adopted.
 As shown in
Fig. 5, the integral state-feedback vector K 2 = K l 0 0 is
Then, the decoupled system with the input of lm11 ∗ is shown as implemented to attenuate flux linkage deviation.

ẋ = A − Bvi K 11 x + Bvi lm11 ∗ + BiL iL .
y = Cx
(4) Fig. 6 shows the bode plots of the transfer function from lm ∗ to
lm for Kl = 0, Kl = 0.4 × 104, Kl = 2 × 104, and Kl = 10 × 104 in
which Kl = 0 represents the performance of Loop I. It can be seen
The characteristic polynomial of (4) can be derived as
that the gain of the designed system in (6) is −83 db at 50 Hz,
  hence the limiting value of the flux linkage limiter in Fig. 3

sI − A − B K = L s + rs1 Ls2 should be set 14,125 times higher than the actual maximum flux
vi 11 P
LP linkage.
For the plots of Kl ≠ 0, the Loop II is added to this system. It can
× Ls2 Cf s2 + rs2 Cf s + 1 . (5)
be noted that the larger value of Kl results in faster attenuation of dc
flux linkage. However large Kl will also introduce magnitude and
It can be seen from (5) that besides a real pole at the left-hand side of phase deviation at 50 Hz resulting in flux linkage tracking error. In
s plane, there is still a pair of underdamped conjugated poles with

Fig. 3 Proposed direct flux linkage control scheme Fig. 5 Eliminate the flux linkage deviation by Loop II

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


& The Institution of Engineering and Technology 2015 2283
It can be seen from (8) that K 3 and K 1 played the same role in
assigning system poles. However K 3 and K 1 take effect under
different conditions. If the flux linkage does not reach its limit, the
system poles are assigned by K 3 , KI and K 1 as shown in (8),
achieving the capability of voltage command tracking. However,
when the flux linkage command is limited by flux linkage limiter,
the system poles are assigned only by K 1 as shown in (6),
achieving the capability of flux linkage limitation. Hence after
introducing flux linkage loop to the control scheme, the
transformer magnetising flux linkage could be fully controlled.
Thus far, the control scheme for DVR voltage command tracking
has been established. The load current disturbance attenuation can
be achieved by feed-forward decoupling. However it is noteworthy
that the decoupling should also split into two parts, one for
operation under flux limitation condition, and the other for normal
operation.

Fig. 6 Bode plot of the transfer function from lm ∗ to lm


3 Magnetising flux linkage estimation
this paper, Kl = 2 × 10 is selected to attenuate dc flux linkage, for
4
In the proposed direct flux linkage control scheme, the transformer
the magnitude-frequency and phase-frequency characteristics of magnetising flux linkage served as one of the state variables. To
the designed system are almost the same with or without Loop II implement this control algorithm, the flux linkage must be
at the frequency over 1 Hz. Consequently, Loop III could be obtained. Sensing the magnetising flux by Hall sensor is a direct
designed based on the system model of (6), without considering way to obtain it. However, the installation of flux sensor would
the effect of Loop II. affect the structure and performance of the transformer. In
industrial applications, flux linkage estimators have been widely
(3) Design of Loop III: In DVR applications, the compensation used in induction machine control systems. Similar to rotor flux
voltage vDVR should track the voltage command v∗DVR when utility linkage estimation, transformer magnetising flux linkage can also
voltage sag occurs. The voltage command can be obtained be estimated by sensing transformer terminal voltages and currents
v∗DVR = v∗L − vS , where v∗L is the desired load voltage, and vS is the [19, 20]. To reduce the estimation error caused by the parameter
sampled utility voltage. Loop III which consists of a voltage variation, a closed-loop flux linkage estimation method based on
controller Gv(s) = KI/s and a state-feedback vector K 3 , is aimed to Gopinath style rotor flux observer is developed by Chen and
regulate vDVR to track v∗DVR , as shown in Fig. 7. Cheng [22] to estimate the transformer magnetising flux linkage.
This section reviews the conventional flux linkage estimation
methods, and then proposes a robust transformer flux linkage
By introducing e as an augmented state variable in Fig. 7, the estimation method.
augmented state-space model is derived in (7). The integrator in
Gv(s) is used to reduce the voltage tracking error, while KI and K 3
are designed to assign the poles to the desired positions. The 3.1 Voltage model estimation
dominant poles are assigned to the poles with the natural resonant
frequency of ωn and damping ratio ζ, while the non-dominant The voltage model estimation is based on the relationship between
conjugated poles are assigned to the poles with the natural magnetising voltage vm and lm.
frequency of (35̃)vn and damping ratio ζ. 
⎧         lm = vm · dt (9)
⎨ ẋ A − Bvi K 1 0 x 0 ∗ BiL
= + vDVR + i
ė −C 0 e 1 0 L (7)
⎩ where vm can be calculated by transformer terminal voltages and
y = Cx
currents.
Obviously, the voltage model estimator needs integrator to
The compensated system with the input of v∗DVR can be obtained as calculate lm. However, in practical applications, the integrator is
⎧         usually replaced by low-pass filter to avoid any accumulative
⎨ ẋ A − Bvi (K 1 + K 3 ) Bvi KI x 0 ∗ BiL errors caused by the offset from transducers and analog/digital
= + vDVR + i converters [20]. However in DVR applications, low-pass filter
ė −C 0 e 1 0 L.
⎩ would also attenuate the dc component that really consisted in lm.
y = Cx
Hence the voltage model flux linkage estimation is hard to carry out.
(8)

3.2 Current model estimation

The current model estimation is based on the relationship between


magnetising current im and lm.

lm = Lm · im (10)

Compared with the voltage model estimation, the integrator can be


omitted. However, for industrial power transformers, the
magnetising current im is tiny compared with the transformer
terminal currents. Therefore, the resolution of transformer terminal
current sensors is not sufficient for im computation. Moreover, Lm
is a non-linear inductor, hence the accuracy of this estimator is
Fig. 7 System model for Loop III design unsatisfactory.

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


2284 & The Institution of Engineering and Technology 2015
4 Comparisons with the existing flux linkage
regulation methods
As mentioned in Section 1, several methods have been proposed to
against the DVR transformer saturation. Because the magnetising
flux lm is approximate to the integration of vDVR, there will be no
dc flux when the compensation starts at the phase of 90° or −90°.
As shown in Fig. 10a, method I postpones the compensation till it
comes to the peak of the compensation voltage. However in the
worst case, load voltage vL may drop to the sagged utility for half
line cycle, as shown with the dash line in Fig. 10a.
Method II injects an incomplete compensation voltage at the
beginning of compensation. As shown in Fig. 10b, by scaling
down the compensation voltage to 50% in the first half cycle, the
flux linkage deviation can be also eliminated. Although the
compensation voltage is restricted for half line cycle, the load
voltage would not drop below 0.5 p.u. in any voltage sag event.
Method III makes further effort to reduce its impact on load
Fig. 8 Proposed estimator
voltage. The principle of this method is shown in Fig. 10c. It has
been proved that by interrupting the voltage for 1/6 line cycle after
a Block diagram of the proposed estimator
b Transfer function model for PI regulator design
1/6 line cycle compensation could eliminate the dc flux linkage
under arbitrary voltage phase and amplitude conditions [15].
Hence the load voltage sag only last for 1/6 line cycle in this method.
3.3 Proposed flux linkage estimation The advantage of these three typical methods is that they are easy
to carry out and work well under ideal voltage sag conditions.
As analysed before, voltage model estimation has the advantages of However a more reliable approach is to regulate transformer flux
measuring and computation accuracy, but current model estimations linkage in real time. For this reason, method IV proposed a
avoids the integral operation. Therefore, this paper tries to combine method to estimate the flux linkage, when the estimated flux
those advantages. The proposed estimation method is characterised linkage reaches its limit the processor modifies the voltage
by using current model estimator to counteract the integral drift of command to zero to avoid further saturation [19, 20]. In this
the voltage model estimator. Block diagram of the proposed method, dc flux linkage is eliminated by inserting a reversed
estimator is shown in Fig. 8a. voltage to the voltage command in the next cycle. The magnitude
As shown in Fig. 8a, the inputs of this estimator are vDVR, i2 and of the dc thrust VDCT was derived as
im, while L̂m , L̂s2 , r̂s2 are the estimated transformer parameters. A PI
regulator is employed to eliminate the accumulative error of the
lmp − Vmd /v
voltage model estimator. Therefore, the estimator can use a pure VDCT = . (11)
integrator to increase the accuracy of the estimation. The transfer Dt
function model of the proposed estimator for PI regulator design is
given by Fig. 8b. where lmp is the pre-determined limit of magnetising flux linkage,
Based on this model, the PI regulator is designed faster than the Vmd is the estimated amplitude of the compensation voltage, ω is
drifting speed of the voltage model estimator. The closed-loop angular frequency of the utility, and Δt denotes the duration of the
cutoff frequency is set at 10 rad/s in this example. The bode plot dc thrust.
of the transfer function from L̂m · im to l̂m is shown in Fig. 9a. By As shown in Fig. 10d, the flux linkage builds up with the DVR
applying the PI regulator, the dc component of l̂m tracks the dc compensation. When the estimated flux linkage reaches lmp which
flux linkage estimated by current model estimator without error. is 1.0 p.u. in this example, this method modifies the voltage
As shown in Figs. 9b and c, compared with traditional voltage command to zero till the negative voltage command appears.
model estimator, scribed in dash lines, the proposed estimator Meanwhile, VDCT calculated by (11) is inserted to the voltage
would attenuate the dc component in vDVR and i2 to avoid any command for half cycle. Therefore, the functions of both flux
accumulative errors caused by transducers and analog/digital magnitude regulation and dc flux elimination are achieved.
converters. Meanwhile, the magnitude-frequency and As shown in (11), elimination of the dc flux relies on the
phase-frequency characteristics of the proposed estimator are estimation of Vmd. This voltage can be obtained from voltage sag
almost the same as the voltage model estimator at fundamental and detection algorithm in DVR. However, the accurate voltage
higher frequency. Hence the proposed estimator has counteracted estimation itself is still an issue in distorted grid conditions [23,
the integral deviation and achieved high estimation accuracy. 24]. Hence the dc flux deviation may still exist. This

Fig. 9 Bode plots of the transfer function


a Bode plot of the transfer function from L̂m · im to l̂m
b Bode plot of the transfer function from vDVR to l̂m
c Bode plot of the transfer function from i2 to l̂m

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


& The Institution of Engineering and Technology 2015 2285
Fig. 10 Performances of method I–IV and proposed method
a Method I
b Method II
c Method III
d Method IV
e Proposed method

uncompensated dc flux may lead to saturation when the between method IV and this method is the attenuation of the dc
compensation voltage fluctuates. flux linkage. As analysed before, although method IV regulates the
Fig. 10e demonstrates the principle of the proposed method. The magnitude of the flux linkage timely, the dc flux linkage is
proposed method limits the magnitude of flux linkage and the dc flux essentially open-loop regulation. In addition, for method IV if the
linkage can be exponentially attenuated. One essential difference estimated flux linkage does not reach its limit, the dc thrust would

Fig. 11 Configuration of the experimental prototype

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


2286 & The Institution of Engineering and Technology 2015
Table 1 Physical parameters of DVR the measuring range 850–850 mA; (2) very low offset drift over
temperature and has degauss function; (iii) Wide aperture
VSI rated voltage (line to line) 380 V
rated power 10 kVA (diameter 20.3 mm) to accommodate two power wires.
rated frequency 50 Hz By following the design process in Section 2, the control
switching frequency 20 kHz parameters can be obtained. The dominant poles of both Loop I
filter capacitor (Cf ) 50 μF and Loop III are assigned to the position with the natural resonant
transformer leakage inductance (Lσ1, Lσ2) 1.3 mH
winding resistance (rσ1, rσ2) 0.57 Ω
frequency ωn = 3500 rad/s and damping ratio ζ = 0.707, while
magnetising inductance (Lm) 2.8 H integral state feedback vector K 2 has been obtained in Section
turns ratio 1:1 2. The limiting value of lm is set to ±0.92 Wb (for Lm = 2.8H, the
corresponding value of im is ±0.33 A). The detailed parameters of
DVR control system are shown in Table 2.

Table 2 Control parameters of DVR


Loop I K1 [−13,928 16.8 5.6]
Loop II K2 [20,000 0 0] 5.1 Three phase voltage sags
Loop III K3 [14,534 16.9 0.43]
KI 14,625 First, the experiment is carried out under symmetrical three phase
voltage sag generated by VSG. The three-phase load voltages (vLA,
vLB, vLC) and the magnetising current transducer output voltage of
phase B (imB) are measured by 4-channel oscilloscope TDS
not be triggered. Therefore, the flux linkage deviation remains. 2014C. As shown in Fig. 12a, before the voltage sag, DVR
However the proposed method will attenuate the deviation which
compensates the harmonic voltages. At t1, the vS drops to 70%
is conducive to DVR sustainable compensation under complicated
of its nominal value, after an instant voltage dip, DVR restores
voltage sag conditions. the load voltages rapidly. During this compensation, the
magnitude of imB reached −0.18 A, which means the magnitude
of flux linkage is approaching to −0.5 Wb. However the flux
5 Experimental investigations linkage under this shallow voltage sag will not reach its limit.
The control system works well on the function of voltage sag
In this section, a 380 V/10 kVA three-phase experimental prototype compensation.
is implemented to verify the proposed control strategy, as shown in Another experiment for deeper voltage sag is carried out. As
Fig. 11. A voltage-sag generator (VSG) is series-connected between shown in Fig. 12b, vS drops to 30% of its nominal value at t1.
the utility and DVR to generate voltage sags. The VSG which After an instant voltage dip, DVR restores the load voltages
consists of a 20 kVA three-phase autotransformer and 12 IGBT rapidly. Meanwhile, it can be seen that the voltage sag happened
modules is depicted in [17]. The DVR prototype is nearly at the peak of phase A. Hence the phase angles of the DVR
series-connected between the VSG and three-phase resistance load compensation voltage will be 90°, −30° and 210° for phase A, B,
via three single-phase transformers. The parameters of the DVR and C respectively. Although the voltage amplitudes of each phase
system are given in Table 1. are the same, different phase angles will produce different dc
DVR control system is implemented by a digital signal processor component of lm. For phase A, there will be no dc flux, hence the
TMS320LF2407, combined with two 8-channel, A/D converters flux linkage does not reach its limit and vLA has been completely
MAX1324. As mentioned in Section 3, the resolution of restored. The flux linkage of phase C is among the first to reach its
transformer terminal current sensors are not sufficient for limit, resulting vLC drops to the sagged voltage at t2. Then, phase
magnetising current computation. To implement the proposed flux B also suffer from limitation at t3. As shown in channel 4, the
linkage estimation algorithm, magnetising current must be transformer flux linkage of phase B is limited to −0.92 Wb
measured. Fortunately, for the transformer with unit turns ratio, (−0.33 A for imB) during the period from t3 to t4.
since i2 − i1 equals to im, im can be measured by reversely As shown in Fig. 11, the circuit and control scheme of each phase
threading two terminal wires through a current sensor. In this are independent. To expose more details of the proposed control
paper, CTSR 0.6-P current transducer made by LEM is adopted. strategy, the following experiments will be carried out under single
The advantages of the current transducer are: (i) High accuracy in phase voltage sags.

Fig. 12 Three phase voltage sag


a Voltage sag depth: 30%
b Voltage sag depth: 70% (time: 10 ms/div, CH1-CH3: 200 V/div, CH4: 0.17 A/div)

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


& The Institution of Engineering and Technology 2015 2287
Fig. 13 Single phase voltage sag with different phases
a Phase: 0°
b Phase: 180° (Time: 20 ms/div, CH1-CH3: 500 V/div, CH4: 0.34 A/div)

Fig. 14 Single phase voltage sag with different phases, depths and durations
a Depth: 70%, duration: 200 ms (time: 50 ms/div, CH1-CH3: 500 V/div, CH4: 0.34 A/div)
b Depth: 90%, duration: 1.8 s (time: 200 ms/div, CH1-CH3: 500 V/div, CH4: 0.34 A/div)

5.2 Single phase voltage sags which is important for sustainable compensation in complicated
voltage sag events.
The following experiments are carried out by single phase voltage Hence these experimental results have proved that besides the
sags in which vS, vDVR, vL and im in the same phase are measured. traditional voltage control function, the proposed control scheme is
Figs. 13a and b show the experimental results for the voltage sags also effective in both flux linkage magnitude limitation and
with initial phase angle of 0° and 180° respectively. When vS deviation elimination for DVR series transformer. By using direct
drops to 30% of its nominal value at t1, DVR rapidly output vDVR flux linkage control scheme, the transformer flux linkage could
to restore the load voltage. Accompanied with the compensation, work on a balanced condition. Hence the transformer magnetic
the flux linkage in Figs. 13a and b reach their lower and upper saturation and inrush current are avoided.
limit at t2. Then lm are kept to −0.92 Wb and 0.92 Wb
respectively, while the load voltage vL drops to the sagged vS,
avoiding the transformer saturation. When the direction of v∗DVR 6 Conclusion
reverses at t3, the flux linkage quits limitation and the voltage
compensation continues. This paper proposed a novel direct flux linkage control scheme for
The following experimental results demonstrate the dc flux DVR applications. First, a comprehensive DVR state-space model
linkage attenuation of the proposed control strategy. As shown in was established by using the transformer magnetising flux linkage
Fig. 14a, the DVR restores a voltage sag with the depth of 70% as a state variable. Then, a detailed controller design process based
for 200 ms. The compensation voltage vDVR generates a positive on state-feedback technique was implemented. This control
dc flux linkage deviation at the beginning of the compensation. scheme is emphasised by its flux linkage magnitude limitation and
However during the whole compensation cycle, the positive dc deviation attenuation features. Meanwhile, to implement this
component in flux linkage is declining and its influence on vDVR is algorithm, this paper also proposed a robust flux estimation
negligible. Another experiment is carried out by longer voltage sag method for the transformer with unit turns ratio. Finally, this
event. As shown in Fig. 14b, the DVR restores the voltage sag scheme is tested on a 380 V/10 kVA three-phase experimental
with the depth of 90% for 1.8 s. The compensation voltage vDVR prototype under different voltage sag conditions. The experimental
generates a negative flux linkage deviation at the beginning of results proved the effectiveness of the control algorithm.
compensation. Then, the negative flux linkage deviation begins to Furthermore, other than DVR application, this transformer direct
damp and the deviation is eliminated after 1 s compensation. flux linkage scheme is also suitable for other converters that using
Finally, the transformer is working under a balanced condition, the transformer-coupling topologies.

IET Power Electron., 2015, Vol. 8, Iss. 11, pp. 2281–2289


2288 & The Institution of Engineering and Technology 2015
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