energies

Article
Design of Current Programmed Switching Converters
Using Sliding-Mode Control Theory
Javier Calvente ID , Abdelali El Aroudi * ID , Roberto Giral ID
, Angel Cid-Pastor ID
,
Enric Vidal-Idiarte ID and Luis Martínez-Salamero ID
Departament d’Enginyeria Electrònica, Elèctrica i Automàtica, Universitat Rovira i Virgili, 43007 Tarragona,
Spain; javier.calvente@urv.cat (J.C.); roberto.giral@urv.cat (R.G.); angel.cid@urv.cat (A.C.-P.);
enric.vidal@urv.cat (E.V.-I.); luis.martinez@urv.cat (L.M.-S.)
* Correspondence: abdelali.elaroudi@urv.cat; Tel.: +34-977-558-522




Received: 19 June 2018; Accepted: 24 July 2018; Published: 6 August 2018


Abstract: This paper presents a comprehensive approach to analyze and design the voltage and
current loops of switching DC-DC converters by using sliding-mode control theory. The approach
is interchangeably applied to switching converters under current-programmed control with both
fixed and variable frequency modulation. An ideal sliding-mode dynamics model is then obtained
together with its circuit schematic representation that can be used for designing the output voltage
compensator, as well as to predict the large signal behavior such as during start-up and under large
disturbances. Simulations and experimental measurements illustrate the theoretical approach for two
different examples of switching converters.

Keywords: switching converters; sliding-mode control; current-mode control; hysteresis control

1. Introduction
Switched mode power converters are widely used for power processing in different applications
such as in portable devices, solid-state lighting drivers and technologies for renewable energy
production. With the aim of either regulating an output variable to a desired reference or balancing the
values of different variables, a control strategy is needed [1–3].
One of the key factors affecting the response of these systems is the control mode used.
Conventional Voltage Mode Control (VMC) is a simple single feedback loop with only the output
voltage as a control variable. However, its first generation version features poor response against
load changes [2]. Current Mode Control (CMC), also known in the literature as current-programmed
control [4], utilizes the inductor current as an additional control variable, which improves the transient
response [2] at the expense of extra cost and more complex controller design. CMC of power converters
is nowadays an extensive design practice due to its intrinsic advantages and the existence of an
important number of dedicated commercial chips that facilitate its implementation. CMC offers
superior performances over conventional VMC in both parallel operation of power converters [5]
and voltage regulation of non-minimum phase switching conversion structures [6]. In the first case,
current sharing among the different converters of the parallel ensemble is a relatively simple task for
both static and dynamic sharing [5], while in the second case, CMC is the best solution for an indirect
output voltage regulation [7].
A usual way of controlling switching converters consist of imposing the duration during which a
switch is maintained closed or open. In CMC, the control strategy must impose switching instants
for the switches by comparing the inductor current with a desired reference. Under fixed switching
frequency operation, there are three main types of CMC strategies, namely peak CMC, valley CMC
and average CMC. The peak and valley cases are dual, i.e., the internal control loop forces respectively

Energies 2018, 11, 2034; doi:10.3390/en11082034 www.mdpi.com/journal/energies

Energies 2018, 11, 2034 2 of 20

the maximum and the minimum value of the current to track the reference given by the voltage control
loop. Average control, in turn, uses the current average value in a switching cycle to track the reference
supplied by the outer loop. Although most commercial ICs of CMC are based on the peak-current
control principle due to its simplicity of implementation, the existence of sub-harmonic oscillations for
duty cycles bigger than 50% makes necessary the use of a compensating ramp, which constitutes the
main drawback of this technique.
From the seminal paper of Deisch [8] until now, more than three decades have elapsed during
which a great number of researchers have contributed to building a solid representation of the dynamic
behavior of the internal loop by means of either continuous or discrete-time models, or a combination
of both. Dozens of papers were reported on this topic during the 1980s, the most representative
being [4,9]. Some important contributions to this topic were published in the early 1990s [10–12] until
the subject reached enough maturity to be treated as a chapter in some recent text books [2].
In the last decade, a renewed interest has emerged in variable frequency CMC strategies such as
constant ON-time CMC [13], which, at the expense of a variable switching frequency operation, offers
high efficiency under light load operation and precludes the existence of sub-harmonic oscillations in
most cases. A detailed analysis of the dynamic behavior of this control technique can be found in [14],
where the main difference with respect to peak CMC is investigated in the buck converter by means of
an equivalent circuit consisting of the output load and the LC output filter, which is supplied by two
current sources with a resistor and a capacitor in parallel.
Variable switching frequency would also result from the insertion of a hysteretic comparator
instead of the Pulse Width Modulator (PWM) with constant switching frequency in the case of
current programming, or instead of the PWM with constant ON-time duration in the case of constant
ON-time CMC.
The voltage regulation of DC-DC switching converters using hysteretic control, also called
free running or bang-bang controlled converters, goes back in time to the early years of modern
power electronics when conditions for stable limit cycles in a buck switching regulator were first
established [15,16].
Recently, hysteretic controllers were used in Voltage Regulator Module (VRM) applications
that require current control with fast response [17–19], and some commercial chips are already
available [20].
Traditionally, hysteresis-based control systems have been analyzed by means of frequency domain
techniques like the descriptive function or Tsypkin’s method [21–23].
On the other hand, Sliding-Mode Control (SMC) theory is a time-domain analytical technique that
predicts with high precision the dynamic behavior of a Variable Structure System (VSS) [24,25]. Power
converters can be classified as VSSs, and SMC is the natural way to regulate their outputs and deal with
their dynamical behavior because the generation of chattering, which is intrinsic to the use of SMC,
is also inherent to the nature of power converters operation. In other words, the sliding chattering
becomes converter ripple, which is a physical manifestation of the way a converter absorbs energy
from the input source, storing it usually in an inductor and then transferring it to an output load.
There are two main results in the SMC theory applicable to switching converters. The first one
is the fact that for single input systems, a suitable Lyapunov function V ( x ) = 12 σ2 ( x ) exists, where
σ ( x ) is the switching function. If the switching feedback gains are chosen so that V̇ = σ σ̇ < 0 in the
domain of attraction, then the state trajectory converges to the surface σ = 0 and is restricted to it
for all subsequent time. The second one provides the ideal sliding-mode dynamics on the switching
surface. In this case, Filippov’s method [26] and the equivalent control approach yield identical sliding
equations when applied to systems that are linear with respect to the control input [27].
These techniques have been used in [28] considering feedback switching conditions of the form
σ = x j − K = 0, expressed in terms of a suitable state variable x j that is desired to be regulated
at a suitable level K. They have been employed in output voltage regulation of DC-DC switching
converters in early works such as in [29–33] and also in some recent contributions to this field such
Energies 2018, 11, 2034 3 of 20

as [34–38]. In [39], SMC theory has been applied to control paralleled inverters of the buck type and
in [40,41]. In [42,43], it has been used in the analysis of interleaved boost converters with hysteretic
control in a ring configuration. In [44], sliding mode control theory was used to synthesize canonical
elements for power processing such as in impedance matching in PV systems and in power factor
correction. These techniques were also combined with other robust control methods such as fuzzy
logic [45] and H∞ [46] for designing these systems.
In the field of switching converters, two different kinds of studies using SMC theory exist in
the literature. The one that uses this theory to design the switching decision and to analyze the
ideal sliding dynamics and that ultimately uses a hysteretic loop to limit the switching frequency [7].
Other works use this theory to derive the equivalent control, and this is used finally to implement
a PWM control [32,33]. Actually, with this strategy, all the advantages of SMC are not maintained.
Small-signal analysis of sliding mode-controlled switching converters, based on hysteresis modulation,
were reported in [47], where Bode plot and root locus analysis were used to reveal the effect of the
parameters on the system behavior.
In this paper, on the basis of the equivalent control method, a procedure to design the control loop
of DC-DC power converters operating in CMC with both variable and fixed frequency modulation
strategies is proposed. The controller employs one switching function of the form σ = ir − i L , where i L
is a converter current and ir is the output of an outer compensating network that processes the output
voltage error. The paper comprehensively explains the dynamics of switching converters regardless of
their modulation strategies. In particular, it will be demonstrated that under sliding mode conditions,
the behavior of the switching converters under all the control strategies tend to the same dynamics
known as the ideal sliding mode dynamics when the switching period tends to zero. The advantages,
limitations and drawbacks of each strategy in a practical implementation are also discussed. It is worth
noting that in this paper, it is not pretended to control switching converters using sliding mode control
that ultimately end-up in a variable frequency implementation of the modulator, but the dynamics of
these systems under both constant and variable frequency modulation schemes are explained by using
sliding mode control theory, while providing circuit equivalent models that can be used for designing
these systems by utilizing conventional frequency-domain methods.
The rest of the paper is organized as follows. The description of the behavior of
current-programmed DC-DC converters is presented in Section 2 in the light of sliding mode control
theory. A small-signal model is used to design the voltage loop by means of linear techniques in the
frequency domain, as well as simulation results on two practical examples of switching converters in
Section 3. The examples consist of a boost converter under fixed and variable frequency operation
and a buck converter with current-mode hysteretic control and high bandwidth voltage regulation.
An experimental validation of the results corresponding to the buck converter is given in Section 4.
The application of the approach to single-loop ripple-based voltage mode control is discussed in
Section 5. Finally, the conclusions of this work are summarized in Section 6.

2. Sliding-Mode Control of Switching Converters Based on Two-Loop Current Mode Control

In CCM operation, a switching converter is described by a piecewise linear state-space model
that can be written in the following form:
(
A1 x (t) + B1 w(t) u=1
ẋ (t) = (1)
A2 x (t) + B2 w(t) u=0

where u is a binary signal that can take the values of zero or one. It is assumed that the switching
is instantaneous. x (t) is the vector of state variables, and w(t) is the vector of independent sources.
Equation (1) can be expressed as follows:
ẋ (t) = [ A1 x (t) + B1 w(t)]u + [ A2 x (t) + B2 w(t)](1 − u). (2)
Energies 2018, 11, 2034 4 of 20

Conventionally, the output variable y is a linear combination of the state variables. However, the
approach is also applicable to the case with a nonlinear switching surface as in high-order boundary
control schemes [48]. Hereinafter, let the linear combination of state variables y(t) = c| x (t) be the
output to be controlled, where c is a suitable vector to select the output y(t) from the state variables
x (t). The derivative of the controlled output y(t) is of the form:

ẏ = (m1 ( x, t) + m2 ( x, t))u − m2 ( x, t) (3)

where m1 ( x, t) and m2 ( x, t) are the rising and falling slopes of the signal y(t) that can be expressed
as follows:

m1 ( x, t) = c| [ A1 x (t) + B1 w(t)] (4)

m2 ( x, t) = −c| [ A2 x (t) + B2 w(t)]. (5)

Our interest is in situations where y can be controlled in sliding mode, so that it follows the
reference smooth function r (t) (continuous and differentiable). The switching function can be expressed
as follows:
σ ( x, t) = r (t) − y (6)

along with the following control law (Figure 1):

(
1 if σ>0
u= (7)
0 if σ < 0.

u
1
r + σ DC-DC
σ Converter
−
y

Figure 1. Simplified diagram of a DC-DC converter under Current Mode Control (CMC).

For the existence of a sliding regime on the time-variant surface Σ defined by { x |σ ( x, t) = 0}, the
sliding condition σσ̇ < 0 must be fulfilled, which is equivalent to:

σ̇σ>0 < 0 (8)

σ̇σ<0 > 0. (9)

According to (3), the derivative σ̇ of the switching function σ can be expressed as follows:

σ̇ ( x, t) = ṙ (t) − ((m1 ( x, t) + m2 ( x, t))u − m2 ( x, t)). (10)

By using (7), the sliding conditions (8) and (9) are:

σ̇σ>0 = ṙ (t) − m1 ( x, t) < 0 (11)

σ̇σ<0 = ṙ (t) + m2 ( x, t) > 0 (12)

or in compact form:
− m2 ( x, t) < ṙ (t) < m1 ( x, t) (13)
Energies 2018, 11, 2034 5 of 20

Equation (13) implies that the rate of change of the signal r must be lower than the absolute values
of the slopes m1 ( x, t) and m2 ( x, t) of the control signal y. This is easily met if the bandwidth of the
outer loop is much lower than the switching frequency, as is the case in any practical design. Therefore,
under this condition, the trajectory of the system (2) with the control decision (7) will reach the sliding
surface Σ in finite time and stay on it in sliding mode [27].
To maintain the trajectory in this regime, it is necessary to switch continuously at infinite
frequency in the ideal case. This is not an acceptable behavior for DC-DC switching converters,
which are designed to operate in a specific switching frequency range. Operating at higher frequencies,
the converter efficiency decreases, and the instantaneous switching model (2) is no longer valid.
This problem is solved by introducing a boundary layer around Σ and replacing the switching
decision (7) by:
(
1 if σ > +∆
u= (14)
0 if σ < −∆
where ∆ > 0. With this control law, the switching frequency in sliding-mode will be finite. In turn, the
sliding motion will not occur strictly on the surface Σ, but in a neighborhood that meets the condition
|σ| ≤ ∆. This means that a certain switching ripple will exist in the output to be controlled and other
state variables as a penalty of a bounded switching frequency. This is a natural way of exchanging the
energy between the reactive components of the converter.
The ideal sliding-mode dynamics is the behavior of the system (2) in the sliding regime with
a control of the form (14) and in the limit case when ∆ tends to zero. In order to find the ideal
sliding-mode equations, the equivalent control method [27] is used. A necessary condition for the
existence of an equivalent control ueq and therefore to apply this method is that u appears explicitly on
the right side of (10), i.e.,
m1 ( x, t) + m2 ( x, t) 6= 0. (15)

Remark 1. The previous condition is largely related to the fact that the relative degree of the converter u-to-σ
loop is equal to one. The fast response characterizing CMC is due to this fact. The relative degree of a switched
system is the number of differentiations one needs to perform on the switching function σ to make the input
explicitly appear in its derivative, i.e., the minimum n that satisfies the following equation:

∂ dn σ ( x, t)
6= 0 (16)
∂u dtn

Remark 2. At high frequencies, if the relative degree is one, the system behaves as an integrator, which converts
the square-wave signal u to a triangular signal σ.

Remark 3. It should be noted that apart from the widely-used hysteresis comparison, any other strategy to limit
the switching frequency can be used without invading the sliding motion. Other possible strategies to limit the
switching frequency are time delays, filtering and clocked switching.

In all the cases, if (15) is accomplished, the equation σ̇ = 0 can be solved with respect to u to
obtain the equivalent leading to the following expression:

ṙ (t) + m2 ( x, t)
ueq ( x, t) = . (17)
m1 ( x, t) + m2 ( x, t)

The equivalent control caused by any modulation scheme such as the variable frequency hysteretic
modulation and constant switching-frequency peak/valley control methods are the same since the
equivalent control corresponds to the ideal sliding dynamics with theoretically infinite switching
frequency or to the averaged dynamics of the converter under the switching constraints’ imposed
previous modulation strategies. The order of the averaged dynamics or the ideal sliding dynamics
Energies 2018, 11, 2034 6 of 20

is reduced due to the relationship imposed between the state variables by the switching constraint.
From (17), if m1 ( x, t) + m2 ( x, t) 6= 0, the equivalent control ueq will exist, and according to (13), its
value will be comprised between zero and one. The ideal sliding-mode dynamics is obtained by
substituting u in (2) by ueq given by (17) and introducing the order reduction due to the constraint
σ = 0. In DC-DC converters, the ideal sliding-mode dynamics should have an asymptotically-stable
equilibrium point.
Note that u is undetermined when |σ | ≤ ∆; therefore, there is a plurality of controls compatible
with (14) [49]. For example, in the hysteretic control (Figure 2a), from the moment that the
condition |σ| < ∆ is fulfilled, a switching occurs whenever |σ | = ∆. Other examples are
constant-switching-frequency controls [50], such as peak (Figure 2b) and valley (Figure 2c) current,
in which time-driven switching occurs periodically, while event-driven switching occurs whenever
|σ| = ∆. DC-DC switching converters typically have a periodic behavior in steady-state with two
switchings per period. In the limit as ∆ tends to zero, the periodic solution tends to the equilibrium
point of the ideal sliding-mode dynamics.

(a) (b) (c)

Figure 2. Evolution of the controlled output and its reference in sliding-mode for three types of control
implementing (14). (a) Hysteresis control. (b) Peak control at constant switching frequency. (c) Valley
control at constant switching frequency.

The DC-DC converter with sliding-mode current control is a system, the control input of which is
the current reference r (t). To regulate the output voltage of the converter, a second slower control loop
that dictates r (t) from the voltage error must be added. The examples considered in the next section
show how to design such a controller using the ideal sliding-mode dynamics model.

3. Practical Examples

3.1. Example 1: A Boost Converter under Fixed and Variable Frequency CMC
Let us consider the boost converter depicted in Figure 3a. The state variables are the inductor
current i L and the capacitor voltage vo . The independent sources correspond to the input voltage v g (t)
and the current id (t), which models load variations. For this example, (2) becomes as follows:

di L v g ( t ) v o (1 − u )
= − (18)
dt L L
dvo i L (1 − u ) vo i (t)
= − + d . (19)
dt C RC C
Energies 2018, 11, 2034 7 of 20

(a)

(b)

Figure 3. Schematic circuit diagram of (a) a Boost converter and (b) its ideal sliding-mode dynamics
model under CMC.

Let ir (t) be the current reference. Using the switching function σ = ir (t) − i L together with the
control law (7), the sliding condition (13) leads to the following inequality:

v g (t) − vo dir (t) v g (t)

< < . (20)
L dt L

When ir (t) is constant, (20) becomes 0 < v g (t) < vo . In this case, starting from zero initial
conditions, as soon as vo reaches v g (t), the sliding condition is fulfilled, and after a finite time, the
system trajectory is constrained in the sliding manifold defined by the constraint ir − i L = 0. When
ir (t) is time varying or state-dependent, according to (17), the equivalent control for this example
becomes as follows:
dir (t)
L dt + vo − v g (t)
ueq = . (21)
vo
After substituting u by ueq in (18) and (19) and using σ = 0 (i L = ir (t)), the system order is
reduced, and the following ideal sliding-mode dynamics is obtained:

i L = ir ( t ) (22)
h i
dir (t)
dvo ir (t) v g (t) − L dt vo i (t)
= − + d . (23)
dt Cvo RC C

Expression (23) also establishes a power balance between the input port and the output port of the
boost converter provided that i L = ir . These equations can be represented by means of an equivalent
circuit using a power source [51] to model the nonlinear term (Figure 3b). The ideal sliding-mode
dynamics (23), with the following constant inputs:

ir (t) = Ir , v g (t) = Vg , id (t) = 0, (24)

has the following equilibrium point:

q
vo ∗ = Vr = Ir RVg (25)

which is asymptotically stable, as can be demonstrated by means of the Lyapunov function V (vo ) =
(1/2)(vo − Vr )2 [52].
Note that vo ∗ depends on both the line voltage and the supplied load resistance. That is why a
regulation of the voltage vo is needed when disturbances in id (t) and v g (t) take place. The regulation
can be accomplished by adding another external voltage loop and making the current reference ir be
the output of this loop.
Energies 2018, 11, 2034 8 of 20

Figure 4 shows a double-loop control scheme, which is proposed for output voltage regulation.
The voltage controller consists of three cascaded stages. Namely, a Proportional-Integral (PI) block
to process the error, a limiter to avoid the current reference overpassing an admissible level and a
low-pass filter to ensure the smoothness of ir (t). The current controller is of the type (14) with ∆ = I∆ .
The transfer function of the voltage controller in the linear region has the following form:
 ω  1
Gc (s) = K p 1 + I . (26)
s 1 + s/ωh

Figure 4. Control scheme with a double loop voltage regulation.

To design Gc (s), a small-signal model of the ideal sliding-mode dynamics will be used.
Linearizing (23) around (24) and (25) leads to the following equation for the small-signal variables
represented by a “hat” (∧ ) over the letter:

dv̂o 2 Vg LVr dîr (t) Vr 1

= − v̂o + îr (t) − + v̂ g (t) + îd (t). (27)
dt CR CVr CRVg dt CRVg C

Applying the Laplace transform to (27) yields the following model in terms of transfer functions:

V̂o (s) = Gvir (s) Îr (s) + Gvvg (s)V̂g (s) + Gvid (s) Îd (s) (28)

where:

V̂ (s) RVg 1 − s/ωz

Gvir (s) = = (29)
Îr (s) 2Vr 1 + s/ω p
V̂V (s) Vr 1
Gvvg (s) = = (30)
V̂g V (s) 2Vg 1 + s/ω p
V̂V (s) R 1
Gvid (s) = = (31)
Îd V (s) 2 1 + s/ω p
RVg 2 2
ωz = 2
; ωp = . (32)
LVr RC

The loop gain is T (s) = Gc (s) Gvir (s), and the closed-loop output impedance is given by
Zo (s) = Gvid (s)/(1 + T (s)). Besides, the closed-loop input to output transfer function is expressed as
Gvvg (s)/(1 + T (s)). The coefficients of Gc (s) are chosen to ensure that the frequency response of the
total loop gain exhibits a high value of the modulus and a sufficient stability margin. The higher the
value of | T ( jω )|, the better will be the disturbance rejection, but for a poor relative stability, there can
be a range of frequencies very sensitive to disturbances. In the boost converter, the right half-plane
zero of Gvir (s) (29) imposes an upper bound on the achievable bandwidth [53].
Let us consider an example of a boost converter with the following set of parameter values:
L = 30 µH, C = 100 µF, R = 10 Ω, Vg = 10 V and Vr = 30 V. Two cases of CMC will be considered,
i.e., valley CMC at constant switching frequency (Figure 2c) with I∆ = 2.5 A and f s = 50 kHz and
hysteresis CMC (Figure 2a) with I∆ = 2.22 A, which in the steady-state exhibits the same switching
frequency of 50 kHz. In Figure 5, the frequency response from the theoretical expression of Gvir ( jω ) is
compared to the simulated corresponding frequency response of the two mentioned CMC controllers.
The simulated frequency response was obtained using the power electronics simulator software
Energies 2018, 11, 2034 9 of 20

PSIM c
, which has a specific feature to get different types of frequency responses, basically input,
output and closed loop gains. The AC sweep module manages the frequency sweep (amplitude, initial
frequency, final frequency, number of points) as in a frequency response analyzer.

10
5 constant frequency
0 hysteretic
ideal sliding

Gain (dB)
-5
-10
-15
-20
-25
-30
0
-45
Phase (deg)

-90
-135
-180

0.1 1 10
Frequency (kHz)

Figure 5. Theoretical and simulated frequency responses from the current reference to output voltage
in a boost converter.

A good agreement among the three frequency responses can be clearly observed at low frequencies
until approximately 5 kHz ( f s /10). The right half-plane zero is located at 6 kHz. Therefore, the control
bandwidth will be placed within the region wherein the three responses almost coincide, and the
design based on the ideal sliding-mode dynamics model will be valid for the other two cases.
It can be verified in a Bode diagram of T ( jω ) that choosing ωh = ωz = 37 krad/s, ω I = 1.2 krad/s
and K p = 3.7 A/V, the crossover frequency at 0 dB is f c = 2 kHz, the phase margin is 57◦ and the gain
margin is 10 dB at 6 kHz. The Bode diagrams obtained by simulation for the two cases with finite
switching frequency show similar results to the ideal case, not only in the loop gain (Figure 6), but also
in the output impedance (Figure 7). The closed-loop converter response to a step change in id (t) is
shown in Figure 8, where the simulated ideal sliding-mode dynamics based on the circuit of Figure
3b is compared to the two previous cases of finite switching frequency. The concordance of the three
responses is in agreement with the frequency results depicted in Figure 7.

20
constant frequency
10 hysteretic
ideal sliding
Gain (dB)

-10

-20

-30

-90
Phase (deg)

-135

-180

-225

1 10
Frequency (kHz)

Figure 6. Theoretical and simulated loop gain Bode plots in a boost converter.
Energies 2018, 11, 2034 10 of 20

10
constantlfrequency
5 hysteretic
ideallsliding
0

-5

Gainl(dB)
-10

-15

-20

-25

-30
0.1 1 10
Frequencyl(kHz)

Figure 7. Theoretical and simulated closed-loop output impedance in a boost converter.

31.5 ___ constant frequency

___ hysteretic
___ ideal sliding
31

30.5

30

29.5

12

10

0.004 0.005 0.006 0.007 0.008

Time (s)

Figure 8. Response of the state variables vo and i L of the boost converter in closed-loop to a step change
of 1.5 A in id (t). Comparison of the ideal sliding-mode dynamics with that corresponding to two
different types of control methods at finite switching frequency.

Let us analyze now the time-domain closed-loop converter response from zero initial conditions
and without the presence of any disturbance. Figure 9 depicts the case of valley CMC at constant
switching frequency. The case of hysteresis control is very similar. It is worth mentioning that the
inductor current must be limited in the transient-state. The current control ensures that the inequality
|ir (t) − i L | ≤ I∆ is satisfied in sliding mode. The limiter of the voltage controller guarantees that
ir (t) < I M , so that, in the sliding regime, the inductor current satisfies at any instant the inequality
i L < Imax where Imax = I M + I∆ . In this example, the inductor current must reach at least the value
Vr 2 /( RVg ) = 9 A, which corresponds to the equilibrium point. The maximum current was fixed to
Imax = 15 A, so that I M = 12.78 A in the case of hysteresis CMC and I M = 12.5 A in the case of valley
Energies 2018, 11, 2034 11 of 20

CMC. In both cases, the same regions in the response can be observed. Initially vo = 0 V, so that the
sliding condition (20) is not accomplished, and the trajectory goes away from the switching manifold
defined by σ = 0 while i L is increasing. Since the voltage error is positive, ir (t) also increases until
its saturation. This ensures that in some instant, the inequality i L > ir (t) + I∆ will be satisfied so that
u = 0 and vo will be also increasing. When vo overpasses Vg , the sliding condition is fulfilled, the
trajectory alters course and later enters in sliding mode as predicted by the theory. In this regime and
with ir (t) saturated, vo tends asymptotically towards an equilibrium point in which vo ∗ > Vr . Once vo
surpasses Vr , the voltage controller enters in the linear region, and the trajectory tends towards the
desired equilibrium point. An anti-windup system in the integrator can improve this start-up transient
by reducing the voltage overshooting, although in this example, it has not been included. Moreover,
the converter structure can be modified to avoid the initial current peak [7].

35
30
25
20
15
10
5
0

20

15

10

-5

0 0.0005 0.001 0.0015 0.002

Time (s)

Figure 9. Boost converter response from zero initial conditions using a valley current control at constant
switching frequency and voltage regulation.

3.2. Example 2: Buck Converter under Fixed and Variable Frequency CMC
Let us consider the buck converter depicted in Figure 10a, the state equations of which are:

di L v g (t)u − vo
= (33)
dt L
dvo iL vo i (t)
= − + d (34)
dt C RC C
ig = iL u (35)
vo
io = − i d ( t ). (36)
R

Using the switching function σ = ir (t) − i L and the control law (7), the sliding condition (13) for
this converter becomes:
vo dir (t) v g (t) − vo
− < < . (37)
L dt L
Energies 2018, 11, 2034 12 of 20

(a)

(b)

Figure 10. Schematic circuit diagram of (a) a Buck converter and (b) its ideal sliding-mode dynamics
model under CMC.

Inequalities (37) are fulfilled for ir (t) constant provided that 0 < vo < v g (t), which are the normal
operating conditions of a buck converter. For this converter, the sliding motion is guaranteed from the
start-up even with zero initial conditions. The ideal sliding-mode dynamics, obtained by means of the
equivalent control method, is the following:

i L = ir ( t ) (38)
dvo ir ( t ) vo i (t)
= − + d (39)
dt C h RC Ci
dir (t)
ir (t) vo + L dt
ig = (40)
v g (t)
vo
io = − id (t) (41)
R
and it can be represented by the circuit illustrated in Figure 10b. The equilibrium point for constant
inputs (24), vo ∗ = Vr = Ir R is asymptotically stable. Linearizing the ideal sliding-mode dynamics
around the equilibrium point yields a small-signal model, which is used to design the voltage controller
or to analyze the system stability when an input filter is added.
The voltage loop consists of the current reference Îr (s) to the output voltage V̂o (s) transfer function,
Gvir (s), i.e.,
R
Gvir (s) = , (42)
1 + sRC
and the same controller (26) employed in the previous example. In this converter, Gvir (s) is a minimum
phase transfer function. In the ideal case, the loop gain and the control bandwidth can be made
boundlessly high without affecting the system stability. For instance, if a particular value of ωc is
chosen and the coefficients of Gc (s) are calculated according to the following criteria:

ωc  1/( RC ); K p = Cωc ; ω I = ωc /4; ωh = 4ωc , (43)

then ωc will be the crossover frequency at 0 dB of the loop gain, the phase margin will be higher than
60◦ and the gain margin will be infinite.
However, the sliding condition (37) is a constraint that must be respected. For example, let us
assume that the system is in equilibrium and that a step disturbance of amplitude Id in current id (t)
is applied at t = 0. If the controller has been designed according to (43), the slope of ir (t) during the
transient-state will be maximal at t = 0.55/ωc approximately, reaching a value of:

dir (t) 
≈ −0.8 ωc Id (44)
dt t=0.55/ωc
Energies 2018, 11, 2034 13 of 20

and therefore, the conditions to keep the sliding mode with this disturbance are:

− Vr < −0.8 ωc Id L < Vg − Vr . (45)

Hence, if the bandwidth is too large, small disturbances could provoke very fast variations of
ir (t), violating (37). Moreover, in the case of finite switching frequency, the distortion of the frequency
response near the switching frequency degrades the phase margin and limits in turn the control
bandwidth. As was observed in Figure 5, the phase decrease is higher in the case of constant switching
frequency than in the case of hysteresis, and therefore, a larger bandwidth can be achieved by means
of the hysteretic control.

4. Experimental Results
A prototype of the buck converter with hysteretic CMC has been constructed for the set of
parameter values L = 3.3 µH, C = 350 µF, R = 1 Ω, Vg = 15 V and Vr = 5 V. The switching frequency
has been tuned to 100 kHz in the equilibrium point. The gain of the current sensor was Rs = 44 mV/A,
and the coefficients of the voltage controller have been calculated according to (43) with ωc = 2π ·
40 krad/s. A picture of the the experimental setup is shown in Figure 11, and the schematic diagram is
depicted in Figure 12. While in the numerical simulations, we used the scheme depicted in Figure 4
in which the saturation block is inserted between the PI compensator and the low-pass filter, our
experimental measurements were obtained from a system under the control scheme of Figure 12 in
which the saturation block acted after the low-pass filter. From an implementation point of view, it
is much simpler to use Figure 12 rather than Figure 4. It is clear that if no saturation takes place,
both schemes are equivalent, and this is the case of all the small signal responses (time and frequency
domains) presented in the paper. A small difference may arise however under large signal responses
such as for instance during the transient. Moreover, it is worth noting that this saturation block was
added to limit the current reference during start-up, and this can be accomplished by the scheme of
Figure 4, as well as by the one shown at the bottom of Figure 12.

Figure 11. The experimental setup used to validate the theoretical and the simulation results
corresponding to the buck converter under two-loop hysteretic CMC.
Energies 2018, 11, 2034 14 of 20

R
Q
S

Figure 12. Schematic circuit diagram of the buck converter with hysteretic CMC and output voltage regulation.

The frequency response of the system being the input v̂ir and the output v̂o , in the case of an open
voltage loop, has been obtained experimentally, and it is depicted in Figure 13 with the Bode diagram
of Gvir (s)/Rs . The experimental frequency response in Figure 13 was obtained by using the Venable
3120 FRA. In this particular case, the analog control circuit is the one in Figure 12; with the voltage
loop opened, the FRA provides the voltage reference vir , which is composed of a sinusoidal variable
frequency reference and a DC component to polarize the system around the desired steady-state
operating point. Closed loop gains in Figure 14 were obtained in closed loop using also the Venable
3120 FRA; in this case, a wideband medium frequency injection transformer model Bode Box 200-002
and two probes to obtain differential measurements are connected to the R4-100 Ω resistor.

30
experimental
20 theoretical
Gain (dB)

10

-10

-20
0
Phase (deg)

-45

-90

0.01 0.1 1 10 100

Frequency (kHz)

Figure 13. Theoretical and experimental frequency responses from current reference v̂ir to output
voltage v̂o in the buck converter of Figure 12.
Energies 2018, 11, 2034 15 of 20

20
15 experimental
simulated
10 theoretical

Gain (dB)
5
0
-5
-10
-15
Phase (deg) -90

-135

-180

10 100
Frequency (kHz)

Figure 14. Theoretical, simulated and experimental Bode diagrams of the voltage loop gain in the
buck converter.

It can be observed that the model based on the ideal sliding-mode dynamics is valid up to
almost one half of the switching frequency. The loop gain has been also measured, and it is shown
in Figure 14 with the Bode diagram of Gc (s) Gvir (s)/Rs and with the frequency response obtained by
numerical simulation of the switched model. It can be observed that the experimental closed-loop
bandwidth (ωc ) hardly deviated from the theoretical one, but the phase margin was reduced from
60◦ –45◦ due to non-ideal high frequency effects. To match the simulation with the experimental results
at high frequency, it was necessary to include in the simulation a dynamic model of the current sensor
(a low-pass second-order filter with a cutoff frequency of 450 kHz and a damping ratio of 0.7) and pure
delays for both control logic circuits and switching elements (300 ns in total). Figures 15 and 16 show
respectively the experimental and simulated response of the converter to a load variation of step type
that satisfies the condition (45) by including these non-ideal effects. Note that signal vσ representing
the switching function is not totally within the hysteresis band due to propagation delays and to the
dynamics of the current sensor.

Figure 15. Experimental output voltage response to a load current step in the buck converter from
10 A–5 A.
Energies 2018, 11, 2034 16 of 20

5.08
5.06
5.04
5.02
5
4.98
4.96

12
10
8
6
4
0.0011 0.00115 0.0012 0.00125 0.0013
Time (s)

Figure 16. Simulated response to a load current step in the buck converter from 10 A–5 A corresponding
to Figure 15.

Remark 4. The analysis of the same converter with fixed frequency V2 control and enhanced V2 I L control
[54–56], the V2 IC [57] and the V1 control concept [58] can be done following the same procedures with a
little effort.

5. Discussion: Extension to Single-Loop Ripple-Based VMC Strategies

Although the CMC of power converters is nowadays an extensive design practice due to its
intrinsic advantages and the existence of an important number of dedicated commercial chips that
facilitate its implementation, different ripple-based VMC schemes, that use the parasitic output voltage
ripple instead of the inductor current as an additional feedback signal have been also proposed to
improve the load transient response of switching converters. For instance, conventional hysteretic
voltage mode controllers use the output voltage ripple as the control signal, and a hysteretic comparator
is used to generate the square wave for the switch drivers. This is the case of hysteretic voltage regulator
modules [59], the V2 and the enhanced V2 I L control strategies [54–56] and also the case of the V2 IC [57]
and its equivalent scheme known as the V1 control concept [58]. Except the V2 I L control scheme, in all
these control strategies, the inductor current is used indirectly in the feedback, and the system works
as desired only with a non-ideal output capacitor characterized by a high Equivalent Series Resistance
(ESR). Although it is conventionally claimed that hysteretic controllers show faster response than
traditional fixed frequency PWM controllers, this happens only with relatively large ESR, and similar
responses can be obtained with both modulations if a similar ESR is used. In fact, this ESR introduces
indirectly inductor current feedback, and this is the main reason for making the response faster. The
enhanced V2 I L ripple-based control [56] and the I2 control [60] directly introduce this current feedback.
Other approaches for introducing current feedback indirectly in the controller are the so-called raster
control surfaces in [61], the use of the capacitor current as in [62] and the introduction of the derivative
term of the error signal as in [63].
Although the interest for hysteretic controllers seems a recent practice, due to its immediate
application in Voltage Regulation Modules (VRMs) [17,19] and the existence of some commercial
chips [20], its use in the voltage regulation of DC-DC switching converters goes back in time to the
early years of modern power electronics when conditions for stable limit cycles in a buck switching
Energies 2018, 11, 2034 17 of 20

regulator were first established [15,16]. Other control schemes that can be placed into the same category
are boundary control [48,64] and synergetic control [65] strategies.
All the previous strategies can be implemented either with the variable frequency modulation
strategy or a fixed frequency modulation scheme. Variable frequency would result from the use of a
hysteretic comparator. It would be also the case for constant ON-time and constant OFF-time strategies.
Fixed frequency operation will result from peak CMC (or VMC), valley CMC (or VMC) and average
CMC (or VMC) using a latch and a clock signal in the modulator. The same theory can be applied
interchangeably to all the previous strategies.

6. Conclusions
A two-loop control design technique for DC-DC switching converters has been presented.
The double loop consists of an inner current loop in sliding-mode and an outer voltage regulation loop
that includes a limiter of the current reference.
When the sliding condition is accomplished, the converter enters in sliding mode after a finite time,
and the current tracks its reference. The ideal sliding-mode dynamics describes the system behavior,
and a small-signal model around the equilibrium point is used to design the voltage regulation loop
by means of the frequency response method.
It has to be pointed out that sliding-mode control theory does not specify the nature of the
switching law when |σ | < ∆. Hence, hysteresis control and constant switching frequency control have
been compared for a boost converter. The frequency response in both cases almost coincides with the
theoretical prediction of the ideal sliding-mode dynamics at low frequencies, the hysteresis control
response being much more similar to the ideal case near the switching frequency region. However, in
the example reported here for the boost converter, the most limiting factor in the regulation bandwidth
is the right half-plane zero, and for that reason, the closed-loop response in both cases is very similar
to the ideal one.
In the example of the buck converter, an expression of the sliding condition in terms of both
voltage regulation bandwidth and load disturbance amplitude has been derived. A bandwidth of the
voltage loop near one half the switching frequency has been obtained using a hysteretic current mode
controller. In the same example, it has been found that the actual dynamic behavior of the current
sensor and the delay of both switching and control logic circuits can have an appreciable influence
upon the phase margin of the voltage loop.

Author Contributions: Conceptualization, J.C., A.E.A. and L.M.-S; All the authors contributed equally to the
other parts of the work.
Funding: This work has been sponsored by the Spanish Agencia Estatal de Investigación (AEI) and the
Fondo Europeo de Desarrollo Regional (FEDER) under Grants DPI2017-84572-C2-1-R and DPI2016-80491-R
(AEI/FEDER, UE).
Conflicts of Interest: The authors declare no conflict of interest.

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