Reset: 20MHZ X1 15pF C1 15pF C2

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A A

C2
C1 X1 15pF
15pF 20MHZ

U1
PIC18F4550-IP
13 OSC1CLKI RA0AN0 2
RA1AN1 3
RA2AN2VREF-CVREF 4
18 VUSB RA3AN3VREF+ 5
B VCC B
RA4T0CKIC1OUTRCV 6
11 VDD RA5AN4SSHLVDINC2OUT 7
32 VDD OSC2CLKORA6 14

12 VSS RB0AN12INT0FLT0SDISDA 33 VCC


31 VSS RB1AN10INT1SCKSCL 34 Reset P1
RB2AN8INT2VMO 35 Header-Female-2.54_1x6
19 RD0SPP0 RB3AN9CCP2VPO 36 1
20 RD1SPP1 RB4AN11KBI0CSSPP 37 2
21 RD2SPP2 RB5KBI1PGM 38 3
22 RD3SPP3 RB6KBI2PGC 39 4
27 RD4SPP4 RB7KBI3PGD 40 5
28 RD5SPP5P1B 6
29 RD6SPP6P1C RC0T1OSOT13CKI 15
VCC 30 RD7SPP7P1D RC1T1OSICCP2UOE 16
RC2CCP1P1A 17
8 RE0AN5CK1SPP RC4D-VM 23
R1 9 RE1AN6CK2SPP RC5D+VP 24
10k 10 RE2AN7OESPP RC6TXCK 25
C 1 MCLRVPPRE3 RC7RXDTSDO 26 C

SW1
SWITCH-6x6x5_TH
1 3
2 4

Reset

D D

TITLE:
Fundamentos Básicos PIC18F4550 REV: 1.0

Date: 2017-12-31 Sheet: 1/1


EasyEDA V4.11.9 Drawn By: Wels Theory
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