Mahatma Education Society’s

Pillai HOC College of Engineering and Technology, Rasayani

Department of Computer Engineering
Practical List
________________________________________________________
Subject: Microprocessor Semester: V

Sr. No. Name of the Experiment

1 Write an Assembly Language program to add two 8 or 16 bit numbers

2 Write an Assembly Language program to find the smallest/largest number

from an array of N numbers.
3 Write an Assembly Language program to arrange numbers in the given array
in ascending /descending order.
4 Write an Assembly Language program for Device drivers
5 Write an Assembly Language program for String Instruction
6 Write an Assembly Language program to convert BCD to HEX and HEX to BCD.
7 Write an Assembly Language program to display 16 bit flag register.
8 Write an Assembly Language program 32 bit numbers
9 Case study on RISC
10 Case study on CISC

Practical IN-charge HoD

Pooja Pemare Dr. Ashok Kanthe

 1. INTRODUCTION TO TASM

Aim: Write Assembly language program for the Addition.

Theory:
Introduction:
The aim of this experiment is to introduce the student to assembly language programming
and the use of the tools that he will need throughout the lab experiments. This first
experiment let the student use the Dos Debugger and the Microsoft Turbo Assembler
(TASM). Editing, Assembling, Linking, Execute up can be done using TASM software

Objectives:
1. Introduction to Microsoft Turbo Assembler (TASM)

2. General structure of an assembly language program

3. Use of the Dos Debugger program

Overview:
In general, programming of microprocessor usually takes several iterations before the
right sequence of machine code instruction is written. The process, however is facilitated
using a special program called an “Assembler”. The Assembler allows the user to write
alphanumeric instructions. The Assembler, in turn, generates the desired machine
instructions from the assembly language instructions.

Assembly language programming consists of following steps:

STEP PRODUCES

1 Editing Source file

2 Assembling Object file

3 Linking Executable file

 4 Executing Results

Table1.1: Assembly Language Programming Phases

Assembling the program:

The assembler is used to convert the assembly language instructions to machine code. It
is used immediately after writing the Assembly language program. The assembler starts
by checking the syntax or validity of the structure of each instruction in the source file .if
any errors are found, the assemblers displays a report on these errors along with brief
explanation of their nature. However If the program does contain any errors , the
assembler produces an object file that has the same name as the original file but with the
“obj” extension

Linking the program:

The Linker is used convert the object file to an executable file. The executable file is the
final set of machine code instructions that can directly be executed by the
microprocessor. It is the different than the object file in the sense that it is self-contained
and re-locatable. An object file may represent one segment of a long program. This
segment cannot operate by itself, and must be integrated with other object files
representing the rest of the program ,in order to produce the final self-contained
executable file.

Executing the program

The executable contains the machine language code .it can be loaded in the RAM and
executed by the microprocessor simply by typing, from the DOS prompt ,the name of the
file followed by the carriage Return Key (Enter Key). If the program produces an output
on the screen or sequence of control signals to control a piece of hard ware, the effect
should be noticed almost immediately. However, if the program manipulates data in
memory, nothing would seem to have happened as a result of executing the program
Procedure to enter a program using TASM software

Start

Run

Type CMD

Ok

Display shows

C :\>D:

(Change to D drive because TASM is in D drive)

Press ENTER

D :\>CD TASM

Press ENTER

D: \TASM>EDIT FILENAME.ASM

Example edit sarada.asm

Press ENTER

Then the display shows editor

Type the asm program

 ↓

Then the save the program (Use Alt+F keys to appear the option window)

Exit from editor Using Alt+F keys

Then Display shows D: \TASM>

Enter the name TASM FILENAME.ASM

Example

D: \TASM>TASM sarada.asm
Then Display shows Errors, (0) Warnings (0)

If there is errors correct them

Enter the name Tlink FILENAME.OBJ

Example

D: \TASM>TLINK sarada.obj
↓

Then the display shows

Turbo Link Version 3.0

Enter the name TD FILENAME.EXE

Example

D: \TASM>TD sarada.exe
↓
 Then the display shows

Program has no symbol table

Choose OK

RUN the Program using F9 Key or Select the RUN Option

See the data in Registers

See the data in Data segment Using Alt+F - View- Dump

ADDTITON
ALGORITHM:
1. Initialize the Data and code segment.

2. Read the NUMBER1-first 16bits to be added.

3. Read the NUMBER2-first 16bits to be added.

4. Add the two.

5. Store the 16bits SUM.

1. ADD destination,source
(ADD register/memory, register/memory/immediate data):
• This is an instruction used to perform addition of binary values from source contents with
destination contents, and store result in the specified destination register.
Destination=Source + Destination
(Source may be immediate data value or register or direct or indirect memory location where the data
is stored.)
• Values may be byte,word.
Flags affected: AF, CF, OF, PF, SF and ZF
Some examples are:
Instruction Description
ADD AL,45H Immediate addressing mode instruction that adds immediate number with
AL and stores result in AL(AL=AL+45)
ADD AX,BX Register addressing mode instruction that adds the contents of BX from
AX and stores result in AX
ADD AL,[1234,H] Direct addressing mode instruction that adds the 8bit contents of memory
location 1234H with AL and stores result in AL
ADD AL,[SI] Register indirect addressing mode instruction that adds the contents of
memory location printed by SI (Index register) with AL and stores result in
AL. assueme SI=5000H and content od SI=25H, then AL=AL+25H(which
is [SI]).

2. ADC destination,source
(ADD register/memory, register/memory/immediate data):
• This is an instruction used to perform multi-word addition of binary values
ADC adds the contetents of the carry Flag(CF 0/1) to operand1 and then adds operands2 to operand1,
like ADD instruction.
Destination=Source + Destination+CF
(Source may be immediate data value or register or direct or indirect memory location where the data
is stored.)
Flags affected: AF, CF, OF, PF, SF and ZF
Some examples are:
Instruction Description
ADC AX,4500H Immediate addressing mode instruction that adds immediate number with
4500H to AX with carry and stores result in AX(AX=AX+4500+CF(0/1))
ADC AX,BX Register addressing mode instruction that adds the contents of BX with
AX with carry flag (CF) and stores result in AX

Conclusion:
 EXPERIMENT NO: 2

Aim: Write an Assembly Language Program to find smallest/largest number in a given

array.

Theory: Types of searching

• Process of finding the required/specified element form a set of data or an array i.e
Smallest element, largest element, select particular element, Even or Odd element.
Finding smallest Element:
• The number which is smallest in value given in an array/set of data .
Let arbitrary numbers be x,y,z
Smallest =x
If(y<smallest) then smallest=y
If(z<smallest) then smallest=z
Finding largest Element:
• The number which is largest in value given in an array/set of data .
Let arbitrary numbers be x,y,z
Largest=y
If(y>largest) then largest=y
If(z>smallest) then largest=z
Searching:
• The idea is that a program must be made of a combination of only thsese three constructs:
sequence,decision(selection) and repetition.
• Using only these constructs makes a programs or an algorithm easy to understand, debug
or change.
Sequence
• An algorithm, and eventually a program,
• Is a sequence of instructions,
• It can be a simple instruction or either of the other two constructs.
Decision
• Situation to test a condition. If the result of testing is true,
 • Follow a sequence of instructions: if it is false,
• Follow a different sequence of instructions.
Repetition
• The same sequence of instructions must be repeated.
• To handle this the repetition or loop construct.
• To find the larest integer among a set of integers can use a construct of this kind.
The CMP instruction:
• It is an instruction used to compare two numeric data fields, one or both of which are
contained in a register or memory or immediate.
LABLE: CMP Register/memory, register/memory/immediate

• This instruction is used with string of characters.

• This instruction affects AF,CF,OF,PF,SF and flags.
i.e
CMP DX,00 ;DX=ZERO ?
JE NEXT ;If yes, Jump to NEXT
(If actions if nonzero)
……
NEXT……… ;Jump point if DX=zero

Conclusion:
 EXPERIMENT NO: 3

Aim: Write an Assembly Language Program to find for Sorting in Ascending /Decending order
using Bubble Sort Algorithm.
Theory:
Instruction XCHG
• It exchanges data between two registers
i.e XCHG AH,BL
OR between a register and memory location
i.e XCHG CX,[SI]

Instruction JC (Jump if Carry)

• Used for conditional jump instruction
Array :
• Collection of elements of similar data types.
• Used where more than one element is required to declare.
• Array sizes must be declared using named constants.
• Aaray should be initialized before use. The results of using uninitialized arrays are
unpredicatable.
• Programmer should stay within the array limit/bounds.
Sorting:
• Sorting is process that organizes a collection of data into either ascending or decending order.
• An internal sort requires that the collection of data fir entirely in the compputer’smain memory.
• An external sort used when the collection of data cannot fir in the computer’s main memory all
at once but must reside in secondary storage such as on a disk.
• Asending order if in an array ,numbers are arranged such that every nth number is greater than (n-
1)th number, then array is sorted in Ascending order.
• Desending order if in an array ,numbers are arranged such that every nth number is smaller than
(n-1)th number, then array is sorted in Desending order.
• A comparision based sorting algorithm makes ordering decisions only on the basis of
comparisions.
• There are many sorting algorithms, such as:
➢ Selection Sort
➢ Insertion Sort
➢ Bubble Sort
➢ Merge Sort
➢ Quick Sort

• The first three are the foundations for faster and more efficient algorithms.
Selection sort algorithm:
• The list is divided into two sub lists,sorted and unsorted which are separated by an imaginary
wall.
• First go through the unsorted list and find the smallest/largest element.
• Then swap that element with the elememnt at the beginning of the unsorted ( or end of sorted
list) data.
• After each selection and swap the imaginary wall between the two sub lists moves one element
ahead.
Insertion Sort:
• It is a simple sorting algorithm that is appropriate for small inputs.
• Most common sorting technique used by card players.
• The list divided into two parts: sorted and unsorted.
• In each pass the first element of the unsorted part is picked up, transferred to the sorted sub list,
and inserted at the appropriate place.
• A list of n elements will take at most n-1 passes to sort the data.
• It is one of the most common sorting techniques, and it is often used by card players. Each card
player picks up is inserted into the proper place in their hand of cards to maintain a particular
sequence.
Bubble Sort:
• The list is divided into two sub lists: sorted and unsorted.
• The smallest element is bubbled form the unsorted list and moved to the sorted sub list.
• After that the wall moves one element ahead increasing the number of sorted elements and
decreasing the number of unsorted ones.
• Each time an element moves from the unsorted part to tge sorted part one sort pass is completed.
• Given a list of n elements bubble sort requires up to n-1 passes to sort the data.

ALGORITHM:
Program 1(A)
Algorithm to arrange numbers in an array of N numbers in Ascending order.

1.Initialize data segment, byte counter and memory pointer SI to read members from array.
2. Move number pointed by SI into accumulator and increment SI
3. Compare accumulator element with data element pointed by SI (next data element).
4. If accumulator data is greater, and carry flag=0 go to step 7.
5. Else exchange the two compared numbers and increment data pointer SI.
6. Decrement the comparision counter and go to step 2 until it becomes zero.
7. Decrement the iteration counter perform next iteration until it becomes zero.
8. Display the result, Sorted array.
9. End

Program 1(B)
Algorithm to arrange numbers in an array of N numbers in descending order.
1. Initialize data segment, byte counter and memory pointer SI to read members from array.
2. Move number pointed by SI into accumulator and increment SI
3. Compare accumulator element with data element pointed by SI (next data element).
4. If accumulator data is smaller, and carry flag=0 go to step 7.
5. Else exchange the two compared numbers and increment data pointer SI.
6. Decrement the comparison counter and go to step 2 until it becomes zero.
7. Decrement the iteration counter perform next iteration until it becomes zero.
8. Display the result, Sorted array.
9. End
 EXPERIMENT NO: 4

Aim: Write program for device driver (printer/mouse/keyboard).

1. Write a program to Accept input from keyboard

2. Write a program to display character A-Z

Theory:

In computing, a device driver is a computer program that operates or controls a particular type of device
that is attached to a computer. A driver provides a software interface to hardware devices, enabling
operating systems and other computer programs to access hardware functions without needing to know
precise details about the hardware being used.

A driver communicates with the device through the computer bus or communications subsystem to which
the hardware connects. When a calling program invokes a routine in the driver, the driver issues
commands to the device. Once the device sends data back to the driver, the driver may invoke routines in
the original calling program. Drivers are hardware dependent and operating-system-specific. They usually
provide the interrupt handling required for any necessary asynchronous time-dependent hardware
interface.

The main purpose of device drivers is to provide abstraction by acting as a translator between a hardware
device and the applications or operating systems that use it. Programmers can write the higher-level
application code independently of whatever specific hardware the end-user is using.

Keyboard Drivers

Keyboard drivers are files and programs that allow the operating system to recognize and/or process the
input data sent by the keyboard and return commands from the computer. A keyboard is an input device
that provides data to the computer and its operating system. Even though a keyboard is an input device it
also receives commands from the computer (like turning on lights that mean different things). Keyboards
have their own processor, memory, and circuits that carry information to and from the keys to its on-
board processor. The keyboard keys are basically switches. The keyboard processor interprets the opening
or closing of a switch (key) and transfers that information into digital information (hexadecimal data) that
is used by the computer. Keyboard drivers tell computer’s keyboard controller chip how to handle and/or
interpret that data. One way keyboard drivers help handle the data is by setting the clock pulse of the
keyboard in synch with the computer operating system.

Printer Driver

A printer driver is simply a program that allows a computer to communicate with a printer and
send print requests to it. It has two main components or functions: the first is to serve as a bridge
between the computer and the printer, allowing the computer to understand the details and
hardware specifications of the printer, and the second is the ability to transform print job data
into a language that the printer can understand. Examples of languages or formats that printers
use are Postscript, originally used in the first Xerox laser printers, and XPS, developed by
Microsoft.
Each printer has a unique driver written for its profile for each operating system and must be
installed on the computer. If configured incorrectly or if the wrong driver is installed, a printer
will not even be detected properly by a computer.

Mouse Driver
A mouse driver is a device driver that enables a computer to communicate with a mouse. The
mouse driver is commonly included with the operating system. Today's operating systems no
longer require drivers for standard mouse interoperability. If your computer has a standard one or
two button mouse and you are using a current version of your operating system, you do not need
to install any special drivers to use your mouse.

Program 1

Write a program to Accept input from keyboard

Initialize the stack memory. Accept the input from keyboard using interrupt 21h function. Check if
the input is ‘0’ (ASCII equivalent 30H).If ‘0’ is entered the program is terminated, otherwise the
input is accepted.

Algorithm

1. Initialize the stack memory

2. Accept input from keyboard
3. Check if input =’0’.If yes go to step 5 otherwise go to step 4.
4. Jump to step 2
5. Stop

Program 2
Write a program to display character A-Z
DOS interrupt function 02 displays the content of DL(ASCII code) on the screen. By loading the
ASCII code of ‘A’ in the DL register, loading AH register with 02H and calling INT 21h it is
possible to display characters from A-Z on the screen.
In the main program by incrementing contents of AL, the ASCII odes of B to Z are displayed using
Macro.
Algorithm
1. Initialize macro for display.
2. Load AH=02h and call INT 21h
3. DL=character to be displayed.
4. End Macro.
5. Load AL=’A’, which is the first character to be displayed.
6. Load CL with count=26
7. Call macro to display characters.
 8. Increment Al, to next character.
9. Decrement counter.
10.Check if count is zero, if not go to step 7

11. Stop.

Conclusion:
 EXPERIMENT NO: 5

Aim: Write Assembly language program based on string instructions

1. Write an assembly language program to move a block of N bytes of data from source to
destination and display the result.
2. Write assembly language program to calculate string length.
Theory:

Block Transfer

The block transfer instruction move multiword structures from a source address to a destination
address, or they com pare two multiword structures for equality. They include word block
transfers, word block comparisons, byte block transfer, bit block transfer and text block transfer.
The last two operations are designed specifically for manipulate rectangles and test on a bitmap
display.
Because of potentially long execution times, all of the block transfer instructions check for
pending interrupts. When a wakeup is detected, they save their indeterminate state on the stack
and back up the PC so that, when the instruction is restarted, it will continue transferring from
the point of interruption. The check for interrupts is made once per interaction of the main loop
the Interrupt Pending routing is defined in. The word block transfer instruction pop a count along
with (short or long) source and destination pointers from the stack. They move words from the
source to the destination. If the source and destination address are the same, there will still be a
transfer.

Block Transfer and Block Transfer Long move words from the source to the destination in the forward
direction (from low to high addresses). If the source and destination blocks overlap, and the destination
address is greater than the source address, words must be transferred on at a time from the source into the
overlap area.

String length

The length of a null-terminated string is defined as the number of characters it contains not counting the
null. To calculate length, start the count at zero. Then increment the count for each successive non-null
byte. When you hit the null, stop counting. The structured flow chart shows this procedure. It describes
the algorithm in general terms. Assembly language details are left to the coding stage. Here is an outline
of the program:
Program 1

Write an ALP to move a block of N bytes of data from source to destination and display the result.

Explanation:

• Consider that a block of data of N bytes is present at source location. Now this block of N bytes is
to be moved from source location to a destination location.
• Let the number of bytes N=10.
• We will have to initialize this as count in the CX register.
• We know that source address is in the SI register and destination address is in the DI register.
• Clear the direction flag.
• Using the string instruction move the data from source location to the destination location. It is
assumed that data is moved within the same segment. Hence the Ds and ES are initialized to the
same value.
• Display the contents using display routine.
Algorithm:

Step 1 : Initialize the data in the source memory and destination memory.

Step 2 : Initialize SI and DI with source and destination address

Step 3 : Initialize CX register with the count.

Step 4 : Initialize the direction flag to zero.

Step 5 : Transfer the data block byte by byte to destination.

Step 6 : Decrement CX.

Step 7 : Check for count in CX, if not zero go to step 5 else go to step 8.

Step 8 : Stop

Conclusion:
 EXPERIMENT NO: 6

Aim: Write an Assembly language program for Code Conversion.

1. Write an Assembly language program for converting BCD to HEX

2. Write an Assembly language program for converting HEX to BCD

Theory:

BCD (Binary-Coded Decimal)

A binary-coded decimal (BCD) is a type of binary representation for decimal values where each
digit is represented by a fixed number of binary bits, usually between four and eight.
The norm is four bits, which effectively represent decimal values 0 to 9. This writing format
system is used because there is no limit to the size of a number. Four bits can simply be added as
another decimal digit, versus real binary representation, which is limited to the usual powers of
two, such as 16, 32 or 64 bits.
Binary-coded decimals are an easy way to represent decimal values, as each digit is represented
by its own 4-bit binary sequence which only has 10 different combinations. By comparison,
converting real binary representation to decimal requires arithmetic operations like multiplication
and addition. It is easier for conversion to decimal digits for display or printing, but the resulting
circuit required to implement this system is more complex. For example, the binary coded
decimal "1001 0101 0110," which has three groups of 4 bits, means there are three decimal
digits. In order, from left to right, the resulting decimal value is 956.
In computing and electronic systems, binary-coded decimal (BCD) is a class of binary encodings
of decimal numbers where each decimal digit is represented by a fixed number of bits, usually
four or eight. Special bit patterns are sometimes used for a sign or for other indications.

HEX (Hexadecimal)
Hexadecimal describes a base-16 number system. That is, it describes a numbering system
containing 16 sequential numbers as base units (including 0) before adding a new position for the
next number. (Note that we're using "16" here as a decimal number to explain a number that
would be "10" in hexadecimal.) The hexadecimal numbers are 0-9 and then use the letters A-F.
We show the equivalence of binary, decimal, and hexadecimal numbers in the table below.

Hexadecimal is a convenient way to express binary numbers in modern computers in which

a byte is almost always defined as containing eight binary digits. When showing the contents of
computer storage (for example, when getting a core dump of storage in order to debug a new
computer program or when expressing a string of text characters or a string of binary values in
coding a program or HTML page), one hexadecimal digit can represent the arrangement of four
binary digits. Two hexadecimal digits can represent eight binary digits, or a byte.

Program 1

Write an Assembly language program for converting BCD to HEX

We are given a five digit BCD number whose HEX equivalent is to be found i.e.65535 whose HEX
equivalent to be found. First we will find the HEX equivalent of 60,000.We will compare 60,000H with
10,000H.Each time we compare a counter is decremented by 10,000 and we add 10,000 decimal
(2710H).Then we will find the equivalent of 5000.Now we will compare 5000H with 1000H.Each time
we compare the counter decrements by 1000 and we add 1000 decimal (3E8 H).Then we will find the
equivalent of 500H by comparing it with 100H.Each time counter decrements by 100 and we add decimal
100(64H).Then we find equivalent of 30H by comparing it with 10H.Each time counter decrements by 10
and we add 10 decimal (0A H).Then equivalent of 5 is 5H.

Finally, all the equivalent obtained are added to get the equivalent of 65535.s

Algorithm:

Step I : Initialize the data segment.

Step II : Load the MSB of word in register AX.

Step III : Compare it with 0,if zero goto step VII else goto step IV.

Step IV : Decrement AX and initialize BX=0000.

Step V : Add 1000 decimal to BX.

Step VI : Jump to step III.

Step VII : Load LSB of word in register AX.

Step VIII : Compare it with 1000,if below goto step XII else goto step IX.

Step IX : Subtract 1000H from AX.

Step X : Add 1000 decimal to BX.

Step XI : Jump to step VIII.

Step XII : Compare number in AX now with 100H,if below goto step XVI, else goto step
XIII.

Step XIII : Subtract 100H from AX.

Step XIV : Add 100 decimal to BX.

Step XV : Jump to step XII.

Step XVI : Compare number in AX with 10H, if below goto step XX, else goto step XVII.

Step XVII : Subtract 10H from BX.

Step XVIII : Add 10 Decimal To Bx.

Step XIX : Jump to Step Xvi.

Step XX : Add Contents Of Ax And Bx.

Step XXI : Display The Result.

Step XXII : Stop.

Program 2

Write an Assembly language program for converting HEX to BCD

We have a 4digit Hex number whose equivalent binary number is to be found i.e. FFFFH initially we
compare FFFFH with decimal 10000(2710 H in Hex) if number is greater than 100000 we add it to DH
register also we subtract decimal from FFFFH is made . then we compare the number obtain in AX by
1000 decimal to BX. Then we compare the number obtain in AX by 199 decimal. Each time we subtract
100 decimal from AX and add 100 decimal to BX to obtain BCD equivalent then we compare the
number obtain in AX 10 decimal. Each time we subtract 10 decimal to AX and add 10 decimal to BX.
Finally we add the result in BX with reminder in AX . The final result is present in register DH (which
contains the 5th digit if present) and register AX.

-Display the result.

ALGORITHM:

Step 1 : initialize the data segment.

Step 2 : initialize BX=0000H and DH=00H.

Step 3 : Load the number in AX.

Step 4 : compare the number with 10000 decimal. If below go to step VII else go to step V.

Step 5 : Subtract 10000 decimal from AX and add 1 Decimal to DH.

Step 6 : Jump to step 4.

Step 7 : Compare number in AX with 1000 if below go to step 10 else go to step 8.

Step 8 : Subtract 1000 decimal form AX and add 1000 Decimal to BX.

Step 9 : Jump to Step 7.

Step 10 : Compare the number in AX with 100 Decimal if below go to Step 8.

Step 11 : Subtract 100 Decimal from AX and add 100 Decimal to BX.

Step 12 : Jump to step 10.

Step 13 : Compare number in AX with 10. If below go to step 16.

Step 14 : Subtract 10 Decimal from AX and add 10 Decimal to BX.

Step 15 :Jump to Step 13.

Step 16 : Add Remainder in AX with result in BX.

Step 17 : Display the result in DH and BX.

Step 18 : Stop.

Conclusion:
 EXPERIMENT NO: 7

Aim: Write an Assembly language program to display contents of 16 bit flag register.

Theory:

Flag registers of 8086

Flag register is a part of EU (Execution Unit). It is a 16 bit register with each bit corresponding to a flip-
flop.A flag is a flip-flop. It indicates some condition produced by the execution of an instruction. For
example the zero flag (ZF) will set if the result of execution of an instruction is zero.

Figure below shows the details of the 16 bit flag register of 8086 CPU.

It consists of 9 active flags out of 16. The remaining 7 flags marked ‘U’ are undefined flags.

These 9 flags are of two types:

• 6 Status flags
• 3 Control flags

Status flags:
 1. Carry flag (CY)

• It is set whenever there is a carry or borrow out of the MSB (most significant bit) of a result. D7
bit for an 8 bit operation and D15 bit for a 16 bit operation.

2. Parity flag (PF)

• It is set if the result has even parity. If parity is odd, PF is reset.

• This flag is normally used for data transmission errors.
3. Auxiliary carry flag (AC)
• It is set if a carry is generated out of the lower nibble.
• It is used only in 8 bit operations like DAA and DAS.
4. Zero flag (ZF)
• It is set if the result is zero.
5.Sign flag (SF)

• It is set if the MSB of the result is 1. For signed operations such a number is treated as negative.
6.Overflow flag (OF)

• It will be set if the result of a signed operation is too large to fit in the number of bits available to
represent it.
• It can be checked using the instruction INTO (Interrupt on Overflow).

Control flags:

1. Trap flag (TF)

• It is used to set the trace mode i.e. start single stepping mode.
• Here the microprocessor is interrupted after every instruction so that the program can be
debugged.
2. Interrupt enable flag (IF)

• It is used to mask (disable) or unmask (enable) the INTR interrupt.

• If user sets IF flag, the CPU will recognize external interrupt requests. Clearing IF disables these
interrupts.
3. Direction flag (DF)

• If this flag is set, SI and DI are in auto-decrementing mode in string operations.

Program

Write an Assembly language program to display contents of 16 bit flag register

To display the contents of flag register pushf and pop instruction. Each bit of flag register is then masked
off with 1 and all 0’s (i.e. 1000 0000 0000 0000(16 bit) 8000h) and based on the result of masking
either 0 (30h) or 1 (31h) is get displayed on the screen. Each bit of the above 16 bit number gets shifted in
right direction by 1 position before masking to obtain the next bit position of flag register. This whole
procedure gets repeated 16 times.

Algorithm

1. Start
2. Initialize data segment through AX register in the DS register.
3. Display the flag bit names as “X X X X O D I T SF ZF x AF X PF X CF ”
4. Push the contents of flag register to a stack
5. Pop the contents of stack to register to any 16 bit register (say BX =0000 0100 1000 1001)
6. Move the contents of BX to temporary variable say t
7. Move the 8000h number to AX.(AX 8000h)
8. Move the count as 16(in decimal) to CX register (as 16 bit flag register)
9. Move the contents of temporary variable t to BX.
10. And the contents of BX and AX.
11. If zero flag is set then goto the step no 14 otherwise goto step no. 12
12. Move the 31h to DL register.
13. Make the unconditional jump to a step no. 15
14. Move the 30h to DL register.
15. Preserve the (8000h ) number from AX in t1 temporary variable. (As while displaying 30h or 31
h AH register get modified as 02h function is moved of INT 21h).
16. Display the contents of DL register.
17. Move the contents of t1 to AX register back (As while displaying 30h or 31 h AH register get
modified as 02h function is moved of INT 21h).
18. Rotate the contents of AX by 1 positions in right direction.
19. Repeat step no 5 to 17 till count CX reaches to 0.
20. Stop.

Conclusion:
 EXPERIMENT NO: 8

Aim: Program based on 32 bit Architecture

Theory:

In computer architecture, 32-bit integers, memory addresses, or other data units are those that are
32 bits (4 octets) wide. Also, 32-bit CPU and ALU architectures are those that are based
on registers, address buses, or data buses of that size. 32-bit microcomputers are computers in which 32-
bit microprocessors are the norm. A 32-bit register can store 232 different values. The range
of integer values that can be stored in 32 bits depends on the integer representation used. With the two
most common representations, the range is 0 through 4,294,967,295 (232 − 1) for representation as an
(unsigned) binary number, and −2,147,483,648 (−231) through 2,147,483,647 (231 − 1) for representation
as two's complement. A 32-bit file format is a binary file format for which each elementary information is
defined on 32 bits (or 4 bytes). An example of such a format is the Enhanced Metafile Format.

Flag Register

The flag register is the status register in Intel x86 microprocessors that contains the current state of the
processor.

31 21 16 15 8 7 0

Reserved ID VIP VIF AC VM RF 0 NT IOPL OF DF IF TF SF ZF 0 AF 0 PF 1 CF

Bit Name Description

8 Trap Flag (TF) Single-step mode active when set.

9 Interrupt Flag (IF) Interrupts allowed when set.

Auto-increment string operatings when clear, auto-decrement when

10 Direction Flag (DF)
set.

12-
I/O Privilege Level (IOPL) Privilege level needed to do I/O instructions.
13

14 Nested Task (NT) If set, IRET back-switches.

16 Resume Flag (RF) Flag to ensure single-step only happens once per instruction.

17 Virtual 8086 Mode (VM) When set, CPU operates in pseudo-real mode.

18 Alignment Check (AC) If set and CR0[AM] = 1, alignment checks are made.

19 Virtual Interrupt Flag (VIF)

Virtual Interrupt Pending

20
(VIP)

21 CPU Identification (ID) Modifiable if CPU supports CPUID instruction.

P (parity)
Parity is a logic 0 for odd parity and a logic 1 for even parity. Parity is a count of ones in
a number expressed as even or odd.
If a number contains zero one bits, it has even parity. The parity flag finds little application in
modern programming and was implemented in early Intel microprocessors for checking data in
data communications environments. Today parity checking is often accomplished by the data
communications equipment instead of the microprocessor.

A (auxiliary carry)
The auxiliary carry holds the carry (half-carry) after addition or the borrow after subtraction
between bits positions 3 and 4 of the result. This highly specialized flag bit is tested by the DAA
and DAS instructions to adjust the value of AL after a BCD addition or subtraction. Otherwise,
the A flag bit is not used by the microprocessor or any other instructions.

Z (zero)
The zero flag shows that the result of an arithmetic or logic operation is zero. If Z=1, the result is
zero; if Z= 0, the result is not zero.

S (sign)
The sign flag holds the arithmetic sign of the result after arithmetic or logic instruction
executes. If S=1, the sign bit (leftmost hit of a number) is set or negative; if S=0, the sign bit is
cleared or positive.

T (trap)
The trap flag enables trapping through an on-chip debugging feature. (A program is debugged to
find an error or bug.) If the T flag is enabled (1), the microprocessor interrupts the flow of the
program on conditions as indicated by the debug registers and control registers. lf the T flag is a
logic 0, the trapping (debugging) feature is disabled.

I (interrupt)
The interrupt flag controls the operation of the INTR (interrupt request) input pin. If I=1. the
INTR pin is enabled: if I= 0, the INTR pin is disabled. The state of the I flag bit is controlled by
the STI (set I flag) and CLI (clear I flag) instructions.

D (direction)
The direction flag selects either the increment or decrement mode for the Dl and/or SI registers
during string instructions. If D=1, the registers are automatically decremented:
if D=1, the registers are automatically incremented. The D flag is set with the STD (set
direction) and cleared with the CLD (clear direction) instructions.

0 (overflow)
Overflows occur when signed numbers are added or subtracted. An overflow indicates that
the result has exceeded the capacity of the machine. For unsigned operations, the overflow
flag is ignored.

IOPL (I/0 privilege level)

IOPL is used in protected mode operation to select the privilege level for I/O devices. If the
current privilege level is higher or more trusted than the IOPL, I/O executes without hindrance.
If the IOPL is lower than the current privilege level, an interrupt occurs, causing execution to
suspend. Note that an IOPL of 00 is the highest or most trusted: if IOPL is 11, it is the lowest or
least trusted.

NT (nested task)
The nested task flag indicates that the current task is nested within another task in
protected mode operation. This line is set when the task is nested by software.

RF (resume)
The resume flag is used with debugging to control the resumption of execution after the next
instruction.

VM (virtual mode)
The VM flag bit selects virtual mode operation in a protected mode system. A virtual mode
system allows multiple DOS memory partitions that are 1M byte in length to coexist in
the memory system. Essentially, this allows the system program to execute multiple DOS
programs.

AC (alignment check)
The alignment check flag bit activates if a word or double word is addressed on a non-word or
non-double word boundary. Only the 80486SX microprocessor contains the alignment check hit
that is primarily used by its companion numeric coprocessor, the 80487SX, for synchronization.

VIF (virtual interrupt flag)

The VIF is a copy of the interrupt flag bit available to the Pentium-Pentium II microprocessors.

VIP (virtual interrupt pending)

VIP provides information about a virtual mode interrupt for the Pentium—Pentium II
microprocessors. This is used in multitasking environments to provide the operating system with
virtual interrupt flags and interrupt pending information.

ID (identification)
The ID flag indicates that the Pentium—Pentium II microprocessors support the CPUID
instruction. The CPUID instruction provides the system with information about the Pentium
microprocessor, such as its version number and manufacturer.

Segment Registers

Additional registers, called segment registers, generate memory addresses when combined with
other registers in the microprocessor. There are either four or six segment registers in various
versions of the microprocessor. A segment register functions differently in the real mode when
compared to the protected mode operation of the microprocessor. Following is a list of each
segment register, along with its function in the system:

CS (code)
The code segment is a section of memory that holds the code (programs and procedures) used by
the microprocessor. The code segment register defines the starting address of the section
of memory holding code. In real mode operation, it defines the start of a 64K-byte section
of memory; in protected mode, it selects a descriptor that describes the starting address and
length of a section of memory holding code. The code segment is limited to 64K bytes in the
8088-80286, and 4G bytes in the 80386 and above when these microprocessors operate in the
protected mode.

DS (data)
The data segment is a section of memory that contains most data used by a program. Data are
accessed in the data segment by an offset address or the contents of other registers that hold the
offset address. As with the code segment and other segments, the length is limited to 64K bytes
in the 8086-80286, and 4G bytes in the 80386 and above.

ES (extra)
The extra segment is an additional data segment that is used by some of the string instructions to
hold destination data.

SS (stack)
The stack segment defines the area of memory used for the stack. The stack entry point is
determined by the stack segment and stack pointer registers. The BP register also addresses data
within the stack segment.

FS and GS
The FS and GS segments are supplemental segment registers available in the 80386, 80486,
Pentium. and Pentium Pro microprocessors to allow two additional memory segments for access
by programs.

Program
Program for 32bit architecture

In this program first we have to declare two 32 bit number. After reading these two number add lower 16
bits of both numbers. Add higher bits of both numbers with carry of previous sum. Later display sum with
carry.

Algorithm:

Step I : Read first 32 bit number

Step II : Read second 32 bit number.

Step III : Add lower 16 bits of both numbers.

Step IV : Add higher 16 bits of both numbers with carry of previous sum.

Step V : Display sum with carry.

Conclusion:
 EXPERIMENT NO: 09

Aim: CASE STUDY ON RISC ARCHITECTURE

Theory:

RISC (Reduced Instruction Set Computer) Architecture

The microcontroller architecture that utilizes small and highly optimized set of instructions is termed as the Reduced
Instruction Set Computer or simply called as RISC. It is also called as LOAD/STORE architecture.

In the late 1970s and early 1980s, RISC projects were primarily developed from Stanford, UC-Berkley and IBM.
The John Coke of IBM research team developed RISC by reducing the number of instructions required for
processing computations faster than the CISC. The RISC architecture is faster and the chips required for the
manufacture of RISC architecture is also less expensive compared to the CISC architecture.

Fig: RISC Architecture

Typical Features of RISC Architecture

 • Pipelining technique of RISC, executes multiple parts or stages of instructions simultaneously such that
every instruction on the CPU is optimized. Hence, the RISC processors have Clock per Instruction of one
cycle, and this is called as One Cycle Execution.
• It optimizes the usage of register with more number of registers in the RISC and more number of
interactions within the memory can be prevented.
• Simple addressing modes, even complex addressing can be done by using arithmetic AND/ OR logical
operations.
• It simplifies the compiler design by using identical general purpose registers which allows any register to
be used in any context.
• For efficient usage of the registers and optimization of the pipelining uses, reduced instruction set is
required.
• The number of bits used for the opcode is reduced.
• In general there are 32 or more registers in the RISC.
Advantages of RISC processor architecture

• Because of the small set of instructions of RISC, high-level language compilers can produce more efficient
code.
• RISC allows freedom of using the space on microprocessors because of its simplicity.
• Instead of using Stack, many RISC processors use the registers for passing arguments and holding the local
variables.
• RISC functions uses only a few parameters, and the RISC processors cannot use the call instructions, and
therefore, use a fixed length instructions which are easy to pipeline.
• The speed of the operation can be maximized and the execution time can be minimized.
• Very less number of instruction formats (less than four), a few number of instructions (around 150) and a
few addressing modes (less than four) are needed.
Drawbacks of RISC processor architecture

• With the increase in length of the instructions, the complexity increases for the RISC processors to execute
due to its character cycle per instruction.
• The performance of the RISC processors depends mostly on the compiler or programmer as the knowledge
of the compiler plays a major role while converting the CISC code to a RISC code; hence, the quality of the
generated code depends on the compiler.
• While rescheduling the CISC code to a RISC code, termed as a code expansion, will increase the size. And,
the quality of this code expansion will again depend on the compiler, and also on the machine’s instruction
set.
• The first level cache of the RISC processors is also a disadvantage of the RISC, in which these processors
have large memory caches on the chip itself. For feeding the instructions, they require very fast memory
systems.

Conclusion:
 EXPERIMENT NO: 10

Aim: CASE STUDY ON CISC ARCHITECTURE

Theory :

CISC (Complex Instruction Set Computer) Architecture

The main intend of the CISC processor architecture is to complete task by using less number of assembly lines. For
this purpose, the processor is built to execute a series of operations. Complex instruction is also termed as MULT,
which operates memory banks of a computer directly without making the compiler to perform storing and loading
functions.

Fig : CISC Architecture

Features of CISC Architecture

• To simplify the computer architecture, CISC supports microprogramming.

• CISC have more number of predefined instructions which makes high level languages easy to design and
implement.
• CISC consists of less number of registers and more number of addressing modes, generally 5 to 20.
• CISC processor takes varying cycle time for execution of instructions – multi-clock cycles.
• Because of the complex instruction set of the CISC, the pipelining technique is very difficult.
 • CISC consists of more number of instructions, generally from 100 to 250.
• Special instructions are used very rarely.
• Operands in memory are manipulated by instructions.

Advantages of CISC architecture

• Each machine language instruction is grouped into a microcode instruction and executed accordingly, and
then are stored inbuilt in the memory of the main processor, termed as microcode implementation.
• As the microcode memory is faster than the main memory, the microcode instruction set can be
implemented without considerable speed reduction over hard wired implementation.
• Entire new instruction set can be handled by modifying the micro program design.
• CISC, the number of instructions required to implement a program can be reduced by building rich
instruction sets and can also be made to use slow main memory more efficiently.
• Because of the superset of instructions that consists of all earlier instructions, this makes micro coding
easy.
Drawbacks of CISC

• The amount of clock time taken by different instructions will be different – due to this – the performance of
the machine slows down.
• The instruction set complexity and the chip hardware increases as every new version of the processor
consists of a subset of earlier generations.
• Only 20% of the existing instructions are used in a typical programming event, even though there are many
specialized instructions in existence which are not even used frequently.
• The conditional codes are set by the CISC instructions as a side effect of each instruction which takes time
for this setting – and, as the subsequent instruction changes the condition code bits – so, the compiler has to
examine the condition code bits before this happens.

Conclusion: