MEMORY CLASSIFICATION

Memory can be classified into two groups: Prime (system or main) memory and storage memory.
The R/WM and ROM are examples of primary memory; this is the memory the microprocessor uses in
executing and storing programs. This memory should be able to respond fast enough to keep up with the
execution speed of the microprocessor. There fore it should be random access memory, meaning that the
microprocessor should be able to access information from any register with same speed. The size of a
memory chip is specified in terms of bits. For example, a 1k memory chip it can store 1k (1024) bit (not byte)..
The other group is the storage memory, such as magnetic disks and tapes (see fig MC1).This
memory is used to store programs and results after the completion of program execution. Information stored
in these memories is nonvolatile, meaning information remains intact even the system is turned off. The
microprocessor cannot directly execute or process programs stored in these devices; program need to be
copied into the R/W prime memory first. Therefore, the size of the prime memory, such as 512K or 8M
(megabytes), determines how large the program the system can process. The size of the storage memory is
unlimited; one disk or tape is full, the next one can be used. Fig MC1 shows two groups in storage memory:
secondary storage and backup storage. The secondary storage and the backup storage include devices such
as disks, magnetic tapes, magnetic bubble memory and the charged coupled devices, as shown in fig MC1.
The primary features of these devices are high capacity, low cost and slow access. A disk is similar to record;
the access to the stored information in the disk in the semi-random. The remaining devices shown in Figure
MC1 are serial, meaning if information is stored in the middle of the tape, it can be accessed after running half
the tape. Figure MC1 shows that the prime (system) memory is divided into two main groups: Read/Write
memory (R/WM) and Read-Only Memory (ROM);each group includes several different types of memory as
discussed below.

R/WM (READ/WRITE MEMORY)

As the name suggests, the microprocessor can write into or read from this memory; it is popularly known as
Random Access Memory (RAM). It is used primarily for information that is likely to be altered, such as writing
programs or receiving data. This memory is volatile, meaning that when the power is turned off, all the contents
are destroyed. Two types of R/W memories-static and dynamic-are available; they are described in the
following paragraphs.

Static Memory (SRAM) :

This memory is made up of flip-flops, and it stores the bit as a voltage. Each memory cell requires six transistors;
therefore, the memory chip has low density but high speed. This memory is more expensive and consumes
more power than the dynamic memory. In high-speed cache memory is also included external to the processor
to improve the performance of the system.

Dynamic Memory (DRAM) :

This memory is made up of MOS transistor gates, and it stores the bit as a charge. The advantages of dynamic
memory are that it has high density and low power consumption and is cheaper than static memory. The
disadvantage is that the charge (bit information) leaks; therefore, stored information needs to be read and written
again every few milliseconds. This is called refreshing the memory, and it requires extra circuitry, adding to the
cost of the system. It is generally economical to use dynamic memory when the system memory size is at least
8K; for small systems, the static memory is appropriate. However, in recent years, the processor speed has
reached beyond 200 MHz, and 1000 MHz processors are in the design stage. In comparison to the processor
speed, the DRAM is too slow. To increase the speed of DRAM various techniques are being used. These
techniques have resulted in high-speed memory chips such as EDO (Extended Data Out). SDRAM
(Synchronous DRAM) and RDRAM (Rambus DRAM).

ROM (READ-ONLY MEMORY) (DIODE ROM) :

The ROM is a non-volatile memory; it retains stored information even if the power is turned off. This memory is
used for programs and data that need not be altered. As the name suggests, the information can be read only,
which means once a bit pattern is stored, it is permanent or at least semi-permanent. The permanent group
also includes two types of memory; masked ROM and PROM. The semi-permanent group also includes two

1
types of memory; EPROM and EE-PROM, as shown in the figure MC1. The concept underlying

The diode representation is a simplified version of the actual MOSFET memory cell. The manufacture
of the ROM designs the MOSFET matrix according to the information to be stored; therefore, information is
permanently recorded in the ROM, as a song is recorded on a record. Five types of ROM-masked ROM, PROM,
EPROM, EE-PROM and Flash Memory--are described in the following paragraphs.

Fig MC(2)

Masked ROM:
In this ROM, a bit pattern is permanently recorded by the making and metallization process. Memory
manufacturers are generally equipped to do this process. It is an expensive and specialized process, but
economical for large production quantities.

PROM (Programmable Read-Only Memory):

This memory has nichrome or poly-silicon wires arranged in a matrix; these wires can be functionally viewed
as diodes or fuses. This memory can be programmed by the user with a special PROM programmer that
selectively burns the fuses according to the bit pattern to be stored. The process is known as "burning the
PROM," and the information stored is permanent.

EPROM (Erasable Programmable Read-Only Memory):

This memory stores a bit by charging the floating gate of an FET. Information is stored by using an EPROM
programmer, which applies high voltages to charge the gate. All the information can be erased by exposing the
chip to ultraviolet light through its quartz window, and the chip can be reprogrammed. Because the chip can be
reused many times, this memory is ideally suited for product development, experimental projects, and college
laboratories. The dis-advantage of EPROM are (1) it must be taken out of the circuit to erase it, (2) the entire
chip must be erased, and (3) the erasing process takes 15 to 20 minutes.

EE-PROM (Electrically Erasable PROM):

This memory is functionally similar to EPROM, except that information can be altered by using electrical signals
at the register lever rather than erasing all the information. This has an advantage in field and remote control
applications. In microprocessor systems, software update is a common occurrence. If EE-PROMs are used in
the systems, they can be updated from a central computer using a remote link via telephone lines. Similarly, in
a process control where timing information needs to be changed, it can be changed by sending electrical signals
from a central place. This memory also includes a Chip Erase mode, whereby the entire chip

2
Flash Memory:
This is a variation of EE-PROM that is becoming popular. The major difference between the flash memory and
EE-PROM is in the erasure procedure: The EE-PROM can be erased at a register level, but the flash memory
must be erased either in its entirety or at the sector (block) level. These memory chips can be erased and
programmed at-least a million times. The power supply requirement for programming these chips was around
12 V, but now chips are available that can be programmed using a power supply as low as 1.8 V. Therefore,
this memory is ideally suited for low-power systems.

In a microprocessor-based product, programs are generally written in ROM, and data that are likely to
vary are stored in R/WM. For example, in a microprocessor-controlled oven, programs that run the oven are
permanently stored in ROM, and data such as baking - period, starting time, and temperature are entered in
R/W memory through the keyboard. On the other hand, when microcomputers are used for developing software
or for learning purposes, programs are first written in R/W memory, and then stored on a storage memory such
as a cassette tape or floppy disk.

OPEN AND CLOSED LOOP SYSTEMS

One of the applications of the microprocessor control is a typical process control application; the
microprocessor continuously monitors one or more processor variable values and outputs these to the
electromechanical elements which in turn control the process variables. This kind of control is known as closed
loop control, for e.g. pH controller. On the contrary if the microprocessor outputs control variables to human
operators through line printers or CRT monitors who in turn apply the necessary control inputs for these process
variables, then the control strategy is known as open-loop control, for example temperature monitoring system.

TEMPERATURE MONITORING SYSTEM (Example for Open – Loop)

Temperature monitoring system is a microprocessor based open loop system, which monitors the
process temperature and displays on seven-segment display. The system accepts temperature variations as
inputs and monitors it to be within the lower and upper limits set by the user. If at any moment these limits are
crossed, suitable alarms must be set which might be of the form of LED’s one indicating high state and the
other low state. The overall system design has three systems.
1) Processor and memory subsystem,
This uses 8085 microprocessor for process control and 8155 for program and data storage.
2). Input subsystem:
The microprocessor should be able to accept the following input variables.
a). Temperature and
b). Low and high limits.
The temperature may be converted to an analog voltage by means of a suitable transducers (which
converts energy from one form to another) and this o/p applied to an ADC.
3). Out put subsystems:
It should be able to display the value of temperature on seven-segment display and activate Low/High
state alarms as and when required.
These three subsystems can be properly utilized by synchronization with a train of clock pulses for process
control.

 pH Cotroller (Example for Closed Loop)

pH control system helps to stop the titration at any desired value of p H .The significant feature of this
system is that the desired change in p H can be achieved by small changes in software. The system is based
on the operation of a solenoid valve which is open as long as the described p H is greater than the actual pH of
the titrants. When the pH of the titrants becomes equal to or greater than the described value, the
3
microprocessor outputs a signal, which closes the solenoid valve. The value of p H is entered into the
microprocessors memory in its digital form through a keyboard.

The pH controller system consists of a pH meter, A/D converter, two microprocessor controlled solenoid
moulds and chemicals. The base is let into a beaker containing acid through a solenoid valve. As the base is
being added to the acid, pH - value changes continuously and is monitored by the pH sensor. pH meter displays
this value and also gives an equivalent electrical signal (in analog form) The output voltage is converted into 8
bit digital form using ADC. The output of ADC (digital equivalent of pH value) is compared with the value of p H
already stored in microprocessor. Then if CY (carry) is set the solenoid valve is continued to be open when
digital pH equivalent is found to be equal to or less turn the described value of pH. The microprocessor outputs
a signal that closes the solenoid valve when it reaches the described p H value. The solenoid valves are operated
by relays. Using appropriate peripheral devices apart from microprocessor can suitably modify the software
problem for control of chemical kinetic reaction at specific pH value.

4
 D- A and A-D Converters
INTRODUCTION
Most of the real-world physical quantities such as voltage, current, temperature, pressure
and time etc. are available in analog form. Even though an analog signal represents a real physical
parameter with accuracy, it is difficult to process, store or transmit the analog signal without
introducing considerable error. Therefore, for processing, transmission and storage purposes, it is
often convenient to express these variables in digital form. It gives better accuracy and reduces
noise. The operation of any digital communication system is based upon analog to digital (A/D) and
digital to analog (D/A) conversion.
Figure (AD1) highlights a typical application within which A/D and D/A conversion is used. The
analog signal obtained from the transducer is given to Sample and hold circuit (S/H) output of S/H is
given to ADC. The ADC output is a sequence in binary digits. The microcomputer or digital signal
processor performs the numerical calculations of the desired control algorithm. The D/A converter is
to convert digital signal in analog and hence the function of DAC is exactly opposite to that of ADC.
The D/A converter is usually operated at the same frequency as the ADC. The output of a D/A
converter is commonly a staircase. This staircase-like digital output is passed through a smoothing
filter to reduce the effect of quantization noise.

5
Basic DAC techniques:
The schematic of a DAC is shown in fig (AD2). The input is an n – bit binary word D and is combined with a
reference voltage VR to give an analog output signal. The output of a DAC can be either a voltage or current.
For a voltage output DAC, the D/A converter is mathematically described as
V0 = K VFS (d12-1 + d22-2 +……… + dn2-n) -- eq (1)
V0 = output voltage. K =scaling factor. VFS =full scale output voltage.
dn = n – bit binary fractional word d1 = most significant bit (MSB)
dn = least significant bit (LSB)

There are various ways to implement above equation. The other techniques are
1. Weighted resistor DAC
2. R – 2R ladder.
3. Inverted R – 2R ladder.

Weighted Resistor DAC:

One of the simplest circuits shown in fig (AD3)(a) uses a summing amplifier with a binary weighted resistor
network. It has n – electronic switches d1, d2,.. dn controlled by binary input word. These switches are single
pole double throw type. If the binary input to a particular switch is 1, it connects the resistance to the reference
voltage (- VR). And if the input bit is 0, the switch connects the resistor to the ground. From fig (AD3)(a), the
output current I0 for an ideal op – amp can be written as
I0 = I1 + I2 + I3 + …… + In
VR
= d + VR d + ........ + VR d
1 2 n
2R 22 R 2n R

6
 =
VR
(d 2−1 + d 2−2 + ... + d 2−n )
1 2 n
R

The output voltage

Rf
V0 = I0 R f = VR (d1 2−1 + d 2−2 + ... + d 2−n )  eq (2)
R 2 n

Comparing eq (2) with eq (1) it can be seen that if R f = R then K = 1 and VFS = VR.
Wide ranges of resistors values are required to construct this sort of circuit. The accuracy and stability of a
DAC depends upon the accuracy of the resistors.

R-2R ladder type DAC:

Wide ranges of resistors are required in binary weighted resistor type DAC. This can be avoided by
using R – 2R ladder type DAC where only two values of resistors are required. It is well suited for integrated
circuit realization. For simplicity, consider a 3 – bit DAC as shown in fig (AD4)(a) where the switch position d
1 d2 d3 corresponds to the binary word 100. The circuit can be simplified to the equivalent form of Fig (AD4)(b)
and finally to fig (AD4)(c). Then, voltage at node C can be easily calculated by considering nodal analysis
method to the circuit in fig (AD4)(c) and the virtual ground concept of Op-amp. Applying virtual ground concept
of Op-amp and nodal analysis technique at node C 2 the voltage at node C is
−V R
R 3 
 V
 =−R
2
2R + R 4
3

7
 VFS
− 2R  VR  VR =
V= − =

The output voltage o  

R  4  2 2
In a similar fashion, the output voltage for R – 2R ladder type DAC corresponding to other 3 – bit
binary word can be calculated.

A – D Converters:

The block schematic of ADC shown in fig (AD5) provides the function just opposite to that of a DAC.
It accepts an analog input voltage V a and produces an output binary word
d1 d2 ……dn of functional value D, so that

−1
D = d 12 + d 22−2 + ... + d 2−nn

where d1 is the most significant bit and d n is the least significant bit. An ADC usually has two additional controls
lines; the START input to tell the ADC when to start the conversion and the EOC (end of conversion) output to
announce when the conversion is complete. Depending upon the type of application. ADCs are designed for
microprocessor interfacing or to directly drive LCD or LED displays. ADCs are classified broadly into two groups
according to their conversion technique. Direct type ADCs and Integrating type ADCs. Direct type ADCs
compares a given analog signal with the internally generated equivalent signal. This group includes

Flash (comparator) type converter

Counter type converter.
and
Successive approximation type converter.

Integrating type ADCs perform conversion in an indirect manner by first changing the analog input
signal to a linear function of time or frequency and then to a digital code. The mostly used integrating type
converter is Dual slope ADC. The successive approximation and comparator type are faster but generally less
accurate than integrating type converters. The flash type is expensive for high degree of accuracy. The
integrating type converter is used in applications such as digital meter; panel meter and monitoring system
where the conversion accuracy is critical.

8
# Direct type ADCs

1. The Flash type converter:

This is the simplest possible A/D converter. It Is at the same time, the fastest and most expensive
technique. Fig (AD6)(a) shows a 3 – bit A/D converter. The circuit consists of a resistive divider network, 8
op – amp comparators and a 8 – line to 3 – line encoder. The comparator and its truth table is shown in fig
(AD6)(c). At each node of the resistive divider, a comparison voltage is available. Since all the resistors are
of equal value, the voltage levels available at the nodes are equally divided between the reference voltage
VR and the ground. The purpose of the circuit is to compare the analog input voltage V a with each of the node
voltages. The truth table for the flash type A/D converter is shown in fig (AD6)(d). The circuit has the
advantage of high speed as the conversion take place simultaneously rather than sequentially. Typical
conversion time is 100 ns or less. This type of ADC has the disadvantage that the number of comparators
required almost doubles for each added bit. A 2 bit ADC requires 3 comparators. In general the number of
comparators required are 2n – 1 where n is the desired number of bits.

(a)

Voltage input Logic output X

Va > Vd X=1
Va < Vd X=0
Va = Vd X = previous value

(b) (c)
Input voltage V a X7 X6 X5 X4 X3 X2 X1 X0 Y2 Y1 Y0
0 to VR/8 0 0 0 0 0 0 0 1 0 0 0
VR/8 to VR/4 0 0 0 0 0 0 1 1 0 0 1
VR/4 to 3 VR/8 0 0 0 0 0 1 1 1 0 1 0
3VR/8 to VR/2 0 0 0 0 1 1 1 1 0 1 1
VR/2 to 5 VR/8 0 0 0 1 1 1 1 1 1 0 0
5VR/8 to 3VR/4 0 0 1 1 1 1 1 1 1 0 1
3VR/4 to 7 VR/8 0 1 1 1 1 1 1 1 1 1 0
7VR/8 to VR 1 1 1 1 1 1 1 1 1 1 1
Fig (AD6) (d)

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 2. The Counter Type A/D Converter:

A 3 – bit-counting ADC is shown in fig (AD7). The counter is reset to zero count by the reset pulse.
Upon the release of RESET, the binary counter counts the clock pulses. These pulses go through the AND
gate which is enabled by the voltage comparator high output. The number of pulses counted increase with time.
The binary word representing this count is used as the input of a D/A converter. The analog output V d of DAC
is compared to the analog input V a by the comparator. If Va > Vd, the output of the comparator becomes high
and the AND gate is enabled to allow the transmission of the clock pulses to the counter. When V a < Vd , the
output of the comparator becomes low and the AND gate is disabled. This stops the counting at the time V a 
Vd and the digital output of the counter represents the analog input voltage Va, for a new value of analog input
Va a second reset pulse is applied to clear the counter. Upon the end of the reset, the counting begins again.

3. Successive Approximation Converter:

The successive approximation technique uses a very efficient code search strategy to
complete n – bit conversion in just n – clock periods. An eight-bit converter would require eight clock
pulses to obtain a digital output. Fig (AD8) shows an eight-bit converter. The circuit uses a successive
approximation register (SAR) to find the required value of each bit by trial and error. The circuit operates
as follows. With the arrival of the START command, the SAR sets the MSB d 1 = 1 with all other bits to
zero so that the trial code is 1000 0000. The output V d of the DAC is now compared with analog input
Va. If Va > Vd then 1000 0000 is less than the correct digital representation. Then the MSB is left at ‘1’
and the next lower significant bit is made ‘1’ and further tested. If V a < Vd then 1000 0000 is greater
than the correct digital representation. So it resets MSB to ‘0’ and goes on to the next lower significant
bit. This procedure is repeated for all subsequent bits, one at a time, until all bit positions have been
tested. Whenever the DAC output crosses V a, the comparator changes state and this can be taken as
the end of conversion (EOC) command. It requires eight pulses to establish the accurate output
regardless of the value of the analog input.

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 4. Dual Slope ADC:

Fig (DC1)(a) shows the functional diagram of the dual – slope or dual ramp converter. The analog part
of the circuit consists of a high input impedance buffer A 1, precision integrator A2 and a voltage comparator.
The converter first integrates the analog input signal Va for a fixed duration of 2n clock periods as shown in
fig (DC1)(b). Then it integrates an internal reference voltage V R of opposite polarity until the integrator output
is zero. The number N of clock cycles required to return the integrator to zero is proportional to the value of
Va averaged over the integration period. Hence N represents the desired output code. The circuit operates
as follows:

Integrator output
Voltage
Vo

0 t1 t2 t3

V1
Va - VR
Integrate

Fig (DC1)(b)
Before the START command arrives, the switch SW 1 is connected to ground and SW 2 is closed. Any
offset voltage present in the A1, A 2, and comparator loop after integration, appears across the capacitor CAZ
thus provides automatic compensation for the input – offset voltages of all the three amplifiers. Later, when
SW2 opens, CAZ acts as a memory to hold the voltage required to keep the offset nulled. At the arrival of the
START command at t = t1, the control logic opens SW 2 and connects SW1 to Va and enables the counter
starting from zero. The circuit uses an n-stage ripple counter and therefore the counter resets to zero after
counting 2n pulses. The analog voltage V a is integrated for a fixed number 2n counts of clock pulses after
which the counter resets to zero. If the clock period is T, the integration takes place for a time T 1 = 2n X T
and the output is a ramp going downwards as shown in fig (DC1)(b).
The counter resets itself to zero at the end of the interval T1 and the switch SW1 is connected to the
reference voltage (-VR). The output voltage v0 will now have a positive slope. As long as v 0 is negative, the
output of the comparator is positive and the control logic allows the clock pulse to be counted. However,
when v0 becomes zero at time t=t3, the control logic issues an end of conversion (EOC) command and no
further clock pulses enter the counter.

31
 2n counts t3 − t2 = digital count N
T1 = t2 - t1 = clock rate
clockrate

For an integrator
v0 = (-1/RC) V(t)
The voltage v0 will be equal to v1 at the instant t2 and can be written as
v1 = (-1/RC) Va(t2 – t1)
The voltage v1 is also given by
v1 = (-1/RC) (–VR)(t2 – t 3)
So, Va (t2 – t1) = VR (t3 – t2)
Putting the values of (t2 – t1) = 2n and (t3 – t2) = N, we get
Va 2n = VR N Or Va = (VR)(N/2n)
The following important observations can be made:
1. Since VR and n are constant, the analog voltage V a is proportional to the count reading N and is
independent of R, C and T.
2. The dual slope ADC integrates the input signal for a fixed time; hence it provides excellent noise
rejection of ac signal.
3. The main disadvantage of the dual –slope ADC is the long conversion time.

DAC/ADC Specifications:

Both D/A and A/D converters are available with wide range of specifications. The various important
specifications of converters generally specified by the manufacturer are analyzed.

Resolution:
The resolution of a converter is the smallest change in voltage, which may be produced at the output
(of input) of the converter. For example, an 8 –bit D/A converter has 28 – 1 = 255 equal intervals. Hence the
smallest change in output voltage is (1/255) of the full-scale output range. In short, the resolution is the value
of the LSB.

VFS
Resolution (in volts) =
2n −1 = 1 LSB increment

Similarly, the resolution of an A/D converter is defined as the smallest change in analog input for a one -bit
change at the output.

Linearity:
The linearity of an A/D or D/A converter is an important measure of its accuracy and tells us how close
the converter output is to its ideal transfer characteristics. In an ideal DAC, equal increment in the digital input
should produce equal increment in the analog output and the transfer curve should be linear.

Accuracy:
Absolute accuracy is the maximum deviation between the actual converter output and the ideal
converter output. Relative accuracy is the maximum deviation after gain and offset errors have been removed.
Datasheets normally specify relative accuracy rather than absolute accuracy. The accuracy is also specified in
terms of LSB.

Monotonicity:
A monotonic DAC is the one whose analog output increases for an increase in digital input. If a DAC
has to be monotonic, the error should be less than (1/2) LSB at each output level.

Stability:
The performance of converter changes with temperature, age and power supply variations. So all the
relevant parameters such as offset, gain, linearity error and monotonicity must be specified over the full
temperature and power supply ranges.

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