Application Note 143

December 2013

A Simple Method to Accurately Predict PLL Reference

Spur Levels Due to Leakage Current
Michel Azarian and Will Ezell

Presented is a simple model that can be used to accurately The VCO output is compared to the reference clock (the
predict the level of reference spurs due to charge pump OCXO output here) after both signals are divided down in
and/or op amp leakage current in a PLL system. Knowing frequency by their respective integer dividers (N and R,
how to predict these levels helps pick loop parameters respectively). The PFD block controls the charge pump to
wisely during the early stages of a PLL system design. sink or source current pulses at the fPFD rate into the loop
filter to adjust the voltage on the tuning port of the VCO
Quick Review of PLLs (V_TUNE) until the outputs of the clock dividers are equal
The phase locked loop (PLL) is a negative feedback system in frequency and are in phase. When these are equal, it is
that locks the phase and frequency of a higher frequency said that the PLL is locked. The LO frequency is related to
device (usually a voltage controlled oscillator, VCO) whose the reference frequency, fREF, by the following equation:
phase and frequency are not very stable over temperature
and time to a more stable and lower frequency device N
f LO = • f REF
(usually a temperature compensated or oven controlled R
crystal oscillator, TCXO or OCXO). As a black box, the PLL The PLL shown in Figure 1 is called an integer-N PLL be-
can be viewed as a frequency multiplier. cause the feedback divider (the N-divider) can only assume
A PLL is employed when there is the need for a high integer values. When this divider can assume both integer
frequency local oscillator (LO) source. Example applica- and noninteger values, the loop is called a fractional-N
tions are numerous and include wireless communications, PLL. The focus here will be only on integer-N PLLs, as
medical devices and instrumentation. different mechanisms are at work in fractional-N PLLs.
Figure 1 shows the building blocks of a PLL system used Integer-N PLL Nonidealities
for generating an LO signal. The PLL integrated circuit
(IC) usually contains all clock dividers (R and N), phase/ The PLL IC contributes its own nonidealities to the system,
frequency detector (PFD) and the charge pump, represented principally phase noise and spurious.
by the two current sources, ICP_UP and ICP_DN. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PLLWizard is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.

V_CP
PLL IC
V_OCXO V_VCO
ICP_UP
OCXO LOOP FILTER
fREF = fOCXO fPFD PFD VCO fLO
÷R V_TUNE
LO
CP RZ
ICP_DN
CI

FEEDBACK
÷N
AN143 F01

Figure 1. Basic Building Blocks of a PLL

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Application Note 143
Phase Noise For example, Figure 3 shows the spectrum of a 2.1GHz LO
The PLL system of Figure 1 acts as a low pass filter on the signal. fPFD is 1MHz (N = 2100) and the reference clock
is 10MHz (R = 10). The loop bandwidth is 40kHz. As a
reference clock phase noise and as a high pass filter on
side note, it is worth mentioning that the spurious level
that of the VCO. The low pass and high pass filter cutoff
achieved in this measurement is world class due to the
frequency is defined by the loop bandwidth (LBW) of the
high performance of the LTC6945, an ultralow noise and
PLL. Ideally, the LO phase noise follows that of the reference
spurious PLL IC from Linear Technology.
clock converted to the LO frequency (that is, multiplied by
N/R) up to the LBW and subsequently follows the phase
0
noise of the VCO. The PLL IC’s noise contribution elevates
the phase noise in the transition area. –20

Figure 2 is a phase noise plot generated by PLLWiz- –40

AMPLITUDE (dBc)
ard™, a free PLL design and simulation tool from Linear –60
Technology. The figure shows both the total output phase –80
noise (TOTAL), and the individual noises at the output
due to the reference (REF at RF) and the VCO (VCO at –100

RF). The IC’s noise contribution can easily be seen in the –120
highlighted area.
–140
2096 2098 2100 2102 2104
–40 FREQUENCY (MHz)
–50 VCO AT RF AN143 F03
REF AT RF
–60 TOTAL Figure 3. Reference Spurs of a 2100 MHz LO Signal with an
–70
fPFD of 1MHz Generated Using the LTC6945 PLL IC from Linear
PHASE NOISE (dBc/Hz)

–80
Technology Along with the UMX-586-D16-G VCO from RFMD
–90
–100
–110 Causes of Reference Spurs
–120
–130
In steady-state operation, the PLL is locked, and, theoreti-
–140 cally, there is no more need to engage the ICP_UP and
–150 ICP_DN current sources of Figure 1 during every PFD
–160
100 1k 10k 100k 1M cycle. However, doing so would create a dead zone in the
OFFSET FREQUENCY (Hz) loop response as there is a significant drop in the small-
AN143 F02
signal loop gain (practically, an open loop). This dead zone
Figure 2. PLL IC Phase Noise Contribution Region as Highlighted is eliminated by forcing ICP_UP and ICP_DN to produce
by the Drawn Ellipse extremely narrow pulses during every PFD cycle. These
are commonly referred to as anti-backlash pulses. This
Spurious produces energy content on the VCO tune line at fPFD and
Any unwanted signals on the power supplies shown in its harmonics. The negative feedback cannot counteract
Figure 1 (V_OCXO, V_CP and V_VCO) can translate into these pulses since these frequencies are outside the loop
spurious (spurs) on the LO signal. Careful design of these bandwidth of a properly designed PLL. The VCO, then, is
supplies greatly reduces or even eliminates these spurs. frequency modulated (FM) by this energy content, and
Charge pump related spurs, however, are inevitable. But, related spurs appear at fPFD and its harmonics, all centered
they can be reduced with careful PLL system design. around LO.
These spurs are commonly referred to as reference spurs, Between anti-backlash pulses, the charge pump current
though reference here does not mean the reference clock sources are off (tri-stated). Inherently, the charge pump
frequency. Rather, it refers to fPFD. An LO signal produced has some leakage current when tri-stated. Using an op amp
by an integer-N PLL has dual sideband spurs at fPFD and in an active loop filter (such as in Figure 7) introduces yet
its harmonics.
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 Application Note 143
another leakage current source due to the op amp’s input DESIRED
ADJACENT CHANNEL AT IF
bias and offset currents. The aggregate of these unwanted CHANNEL
ADJACENT
MIXER
currents, whether sourcing or sinking, causes a drift in DESIRED
RF IF CHANNEL AT IF

the voltage across the loop filter and, consequently, in CHANNEL

the tune voltage of the VCO. The negative feedback of the

loop will correct for this anomaly by introducing a unipolar

LO
AN143 F04

current pulse from the charge pump once every PFD cycle fIF
so that the average tune line voltage produces the correct CHANNEL
SPACING REFERENCE
frequency out of the VCO. The pulses produce energy at SPUR
fRF
fPFD, which also causes spurs to appear centered around LO
and offset by fPFD and its harmonics as previously noted. CHANNEL
SPACING
In integer-N PLLs, fPFD is often chosen to be relatively small fLO
because of the system’s frequency step size requirements.
This means that the anti-backlash pulse width, especially Figure 4. Illustration of Adjacent Channel Interference Due to
with the present high speed IC technologies, is extremely Reference Spurs
small compared to the PFD period. As such, a large leak-
age current causes the total charge pump pulses to be Relationship Between Leakage Current and Reference
unipolar and tends to be the dominant cause of reference Spur Levels
spurs. This phenomenon will be examined in more depth.
The mathematical prediction of a PLL IC’s phase noise
Reference Spurs’ Effect on System Performance contribution is relatively straightforward and can be ac-
curately determined by calculations. However, the predic-
In a particular communications frequency band there are tion of reference spur levels is traditionally believed to
multiple channels that occupy equal bandwidths. The be complex. This section derives a method to accurately
center-to-center frequency distance between two adjacent predict reference spur levels due to leakage current using
channels is equal among all channels and is denoted by simple calculations. Two examples using different loop
channel spacing. Due to several factors, it is common to filters will be examined.
find large variations in signal strength between any two
adjacent channels. Passive Loop Filter Example
A typical scenario in a multi-channel wireless communi- A PLL system with a typical passive loop filter is shown in
cations system where a stronger channel exists adjacent Figure 5 along with a current source denoted I_LEAKAGE
to the desired but weaker channel is shown in Figure 4. to represent the leakage current of the charge pump. As-
Only one of the LO reference spurs of concern is shown. suming the PLL is locked, I_LEAKAGE reduces the charge
In an integer-N PLL, fPFD is usually chosen to be equal held by CP during the time when the charge pump is off.
to the channel spacing, which means that the reference When the charge pump turns on once every PFD cycle,
spurs are positioned at the channel spacing from the LO. ICP_UP replenishes the charge lost from CP by applying
These spurs translate all adjacent and nearby channels to a short pulse of current. Feedback forces the average
the center of the intermediate frequency (fIF) along with voltage seen at V_TUNE (V_TUNE_AVG) to be constant,
the LO mixing the desired channel to the same frequency. maintaining the correct LO frequency. Figure 6 depicts
These undesired channels, being uncorrelated to the signal this visually.
in the desired channel, appear as an elevated noise floor The derivation of the resultant spurs involves some knowl-
to the desired signal and limit the signal-to-noise ratio. edge of loop stability requirements, the first being LBW

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Application Note 143
restrictions. The LBW of the PLL system is designed to This means that the PFD period is almost five times shorter
be at least 10 times smaller than fPFD, than the time constant of the zero, τZ. This implies that the
f ripple produced at a period of TPFD across CP is mostly
LBW≤ PFD unseen by CI. The closed-loop bandwidth LBW is approxi-
10
mately equal to the unity crossing of the open-loop gain.
This means that the period of the PFD is: Since the zero is located within the loop bandwidth (it is
1 1 located at 1/3rd the unity crossing of the open-loop gain),
TPFD = and, hence, LBW ≤ the voltage across CI is dictated by the negative feedback
f PFD 10 • TPFD
and is mostly a DC value.
To create a stable loop with plenty of phase margin, a zero, Practically speaking, only CP is discharged and charged
consisting of RZ and CI in Figure 5, is inserted in the loop during the PFD cycles shown in Figure 6.
at about 1/3rd the LBW. That is,
If a capacitor, C, is charged or discharged with a constant
LBW 1 3 current source, I, over a period of time given by ΔT, the
Zero Location ≈ = ⇒LBW ≈ ,
3 2πτz 2πτz voltage delta across this capacitor is given by:
where τz =Rz •CI ΔT
ΔV =I
Replacing LBW in the last equation with its equivalent in C
terms of TPFD results in: To maintain a fixed output frequency at LO, the voltage
3 1 2π droop that occurs during the discharge period is equal to
≤ , or TPFD ≤ τ
2πτz 10 • TPFD 30 z

V_CP
PLL IC
V_OCXO V_VCO
ICP_UP
OCXO LOOP FILTER
PFD VCO
÷R V_TUNE
LO
I_LEAKAGE
CP RZ
ICP_DN
CI

FEEDBACK
÷N
AN143 F05

Figure 5. A PLL System with a Passive Loop Filter and I_Leakage Representing the
Charge Pump Leakage Current

I_CP

VP-P V_TUNE_AVG

TCHARGE TDISCHARGE TPFD

TIME AN143 F06

Figure 6. CP Discharging Through I_Leakage and Charging Back Through

ICP_UP Every PFD Cycle
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 Application Note 143
the voltage buildup during the charging period of Figure 6. The DC value, which is equal to V_TUNE_AVG in Figure 6,
That is: is set by the negative feedback per the requested LO fre-
I_LEAKAGE • TDISCHARGE I_CP • TCHARGE quency. The AC components, however, frequency modulate
VP-P = = the VCO through its tune pin with a tuning sensitivity of
CP CP
KVCO to produce dual sideband spurs with a fundamental
where, TCHARGE is the amount of time the charge pump of fPFD. The Appendix derives the following equation that
current is active during every PFD cycle. is going to be used next.
The charge pump current, I_CP, is usually in the mA range SIDEBAND K •E 
= 20log10 VCO m , dB
and I_LEAKAGE is usually in the nA range, which means CARRIER  2fm 
that:
The effect of the negative feedback on these AC components
TCHARGE  TPFD and TDISCHARGE ≈ TPFD is negligible because fPFD, being the fundamental and the
lowest frequency component, is at least 10 times higher
This implies that the ripple voltage seen across CP can be
in frequency than the zero dB crossing of the open-loop
represented by a sawtooth waveform.
gain by design.
To study the effect of this sawtooth waveform on the
To find the fundamental reference spur-to-carrier power
spectrum of the LO signal, and since the waveform is a
ratio, fm = fPFD, Em = VP-FUND and:
periodic function, it can be broken down into its frequency
components using Fourier Series analysis. REF_SPUR_FUND KVCO • I_LEAKAGE
= 20log10 , dBc
V ∞ sin(2πnft) CARRIER  2πCP • fPFD2 
SAWTOOTH FOURIER SERIES = DC VALUE – P -P ∑
π n=1 n
For the 2nd harmonic reference spur, fm = 2 fPFD, Em =
where: VP-2ndHAR and:
I_LEAKAGE • TPFD I_LEAKAGE REF_SPUR_2ndHAR KVCO • I_LEAKAGE
VP -P = = = 20log10 , dBc
CP CP • fPFD CARRIER  8πCP • fPFD2 

When n = 1, the fundamental peak is: Ratios for higher order harmonics are found using a
I_LEAKAGE similar approach.
VP -FUND =
πCP • fPFD
Active Loop Filter Example
the 2nd harmonic peak is: Figure 7 shows an example implementation of an active
I_LEAKAGE loop filter built around an op amp. I_LEAKAGE represents
VP - 2ndHAR = the combined leakage currents of the charge pump and the
2πCP • fPFD
and so on.
V_CP LOOP FILTER

PLL IC
V_OCXO V_OPAMP V_VCO

ICP_UP V_CP_BIAS
OCXO + V_FILT RP2 V_TUNE VCO
PFD LO
÷R –
I_LEAKAGE CP CP2
ICP_DN
CI
RZ

FEEDBACK
÷N
AN143 F07

Figure 7. A PLL System with an Active Loop Filter and I_Leakage Representing the Charge Pump and Op Amp Leakage Currents
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Application Note 143
op amp. The same methodology used in the passive filter values were injected into the loop while measuring the
example applies here since the loop filters have a similar fundamental reference spur levels. Figure 8 compares
structure. The addition of the pole composed of RP2 and the measured and calculated values for both filter types.
CP2 at the output of the op amp to limit the device’s con- The measured and calculated numbers agree to within the
tribution of noise beyond 15 or 20 times the LBW reduces instrument accuracies and component tolerances.
the amplitude of the sawtooth signal seen at the tuning
node of the VCO. It should be noted that CP2 includes the –40

FUNDAMENTAL REFERENCE SPUR LEVEL (dBc)

input capacitance of the VCO tune port. PASSIVE FILTER, MEASURED
PASSIVE FILTER, CALCULATED
–50 ACTIVE FILTER, MEASURED
The sawtooth signal undergoes low pass filtering whose ACTIVE FILTER, CALCULATED

equation can be found using basic voltage division equa- –60

tions in the Laplace Transform domain and can be written as:
–70

| V_TUNE | | 1 |
–80
| |=| |
| V_FILT | | 1+ j2πf •RP2 •CP2 | ,
–90
where f represents frequency in Hz.
–100
Naturally, the sawtooth signal Fourier Series components 5 10 25 50 100
INJECTED CURRENT (nA)
1000

get affected differently according to their frequency. The AN143 F08

reference spur-to-carrier ratios become:

Figure 8. Comparison of Measured and Calculated Fundamental
 | V_TUNE |  Reference Spur Levels Using Active and Passive Loop Filters
KVCO • I_LEAKAGE •| |
REF_SPUR_FUND  | V_FILT |1 
= 20log10  ,
CARRIER  2πCP • fPFD2 
Table 1. Details About the PLL Systems Used to Generate the
dBc, where Measurements of Figure 8.
| V_TUNE | | 1 | PASSIVE LOOP FILTER ACTIVE LOOP FILTER
| | =| |,
| V_FILT |1 | 1+ j2π • f • R • C
PFD P2 P2 | PLL IC LTC6945, 6GHz LTC6945, 6GHz Integer-N
Integer-N Synthesizer Synthesizer from Linear
 | V_TUNE |  from Linear Technology
REF_SPUR_2ndHAR KVCO • I_LEAKAGE •|| V_FILT || 2 Technology
= 20log10  ,
CARRIER  8πCP • fPFD2  Op Amp N/A LT1678, Low Noise, Rail-to-
Rail Precision Op Amp from
dBc, where Linear Technology
VCO CVCO55CL-0902-0928, UMS-1400-A16-G, 700-1400
| V_TUNE | | 1 |
| | =| |, and so on. 902 to 928 MHz VCO MHz VCO from RFMD
| V_FILT |2 | 1+ j4π • fPFD •RP2 •CP2 | from Crystek
CP (nF) 8.2 22
Lab Verification of the Theory fPFD (kHz) 250 250
KVCO (MHz/V) 18 63
The PLL systems shown in Figures 5 and 7 were reproduced LBW (kHz) 7 7.6
in the lab. External current was introduced at the charge
RP2 (Ω) N/A 100
pump node using a precision source meter to null the
CP2 (nF) N/A 13.3
intrinsic fundamental reference spur caused by inherent
leakages in the system. Then, specific additional current

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 Application Note 143
Summary of Results where Ec is the peak amplitude of e(t) in V.
Table 2 summarizes the equations derived in this applica- The instantaneous frequency of e(t) is:
tion note.
d
ω inst = (2πfct+θ(t)) = 2πfc +θ´(t), rad/sec
Conclusion dt
Integer-N PLL operation and nonidealities are important Since e(t) is an FM signal, the modulating signal em(t)
topics in the design of RF systems. Reference spurs can modulates the instantaneous frequency of e(t) as follows:
have a significantly negative impact on overall system q´(t) = Kem (t), rad/sec
performance. The simple model shown here accurately
predicts reference spur levels due to leakage current in where K is the deviation sensitivity of frequency in rad/
PLLs and can be a useful design tool, significantly reduc- (sec • V):
ing the number of board revisions required to reach a
t t t
desired solution. θ(t)= ∫o θ´(t)dt = ∫o Kem(t)dt =K ∫o em(t)dt

Appendix: Derivation of Spur-to-Carrier Ratio Using As far as this paper is concerned, the modulating signal
Narrowband FM Equations is a tone—one of the Fourier Series components of the
Consider an FM signal centered at an LO of frequency fc sawtooth waveform—which is given by:
in Hz. This signal can be written as: em(t) = Em cos(2pfmt),
e(t) = Ec cos(2pfct + q(t)), where Em is the peak amplitude of em(t) in V and fm is its
frequency in Hz.

Table 2. Summary of Formulas to Predict Reference Spur Levels Up to the 3rd Harmonic
Loop Filter Type Passive Active
Reference to Figure 5 Figure 7

 | V_TUNE |

REF_SPUR_FUND
(dBc ) KVCO • I_LEAKAGE • || V_FILT ||1


CARRIER 20log10 
 2πCP • fPFD2


| V_TUNE | | 1 |
| | 1 | |
| V_FILT | 1 | 1+ j2π • fPFD •RP2 •CP2 |

 | V_TUNE |

REF_SPUR_2ndHAR KVCO • I_LEAKAGE • || V_FILT ||2

(dBc ) 20log10 

CARRIER  8πCP • fPFD2


| V_TUNE | | 1 |
| | 1 | |
| V_FILT | 2 | 1+ j4π • f •R •C
PFD P2 P2 |

 | V_TUNE |

REF_SPUR_3rdHAR KVCO • I_LEAKAGE • || V_FILT ||3

(dBc ) 20log10 

CARRIER  18πCP • fPFD2


| V_TUNE | | 1 |
| | 1 | |
| V_FILT | 3 | 1+ j6π • fPFD •RP2 •CP2 |

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. AN143-7
Application Note 143

This means that the time varying component of e(t)’s or

phase is: 1
e(t)=Ec cos(2πfCt)+ m • Ec (cos(2π(fC + fm)t)
t K •Em 2
θ(t)=K ∫o Emcos(2πfmt)dt = sin(2πfmt)
2πfm – cos ( 2π(fc – fm)t)),
2πKVCO •Em
= sin(2πfmt), which is a narrow band FM signal composed of a carrier
2πfm at fc and two sidebands located at ±fm centered around
where KVCO, in Hz/V, is the tuning sensitivity of the VCO the carrier.
used to generate e(t). Based on the last representation of e(t), sideband-to-carrier
Define m as the modulation index, such as: power ratio in dBc is given by:

K •E SIDEBAND m K •E 
θ(t)= VCO m sin(2πfmt)=m • sin(2πfmt), = 20log10 = 20log10 VCO m
fm CARRIER  2  2fm 

K •E
where m= VCO m
fm Bibliography

e(t), then, can be written as: 1. B. P. Lathi, “Modern Digital and Analog Communica-
tion Systems”, Third Edition, Oxford University Press,
e(t) = Ec cos(2pfct + m • sin(2pfmt)). 1998, ISBN 0195110099
Expanding using some basic trigonometric identities gives: 2. F. M. Gardner, “Phaselock Techniques”, Third Edition,
e(t) = Ec cos(2pfct) • cos(m • sin(2pfmt)) – Ec sin(2pfCt) John Wiley and Sons, 2005, ISBN 0471430633
• sin(m • sin(2pfmt)), 3. Linear Technology, LTC6945 data sheet, 1630 McCarthy
m is much smaller than 1 as far as the reference spur Blvd., Milpitas, CA, 95035, www.linear.com
generation is concerned. This implies that: 4. R. E. Best, “Phase-Locked Loops, Theory, Design, and
cos(m • sin(2pfmt)) ≈ 1, Applications”, Second Edition, McGraw-Hill, 1993, ISBN
0079113869
and sin(m • sin(2pfmt)) ≈ m • sin(2pfmt)
5. W. F. Egan, “Frequency Synthesis by Phase Lock”,
Then Second Edition, John Wiley and Sons, 2000, ISBN
e(t) ≈ Ec cos(2pfct) – m • Ec sin(2pfct) • sin(2pfmt), 0471321044
6. Z. Tranter, “Principles of Communications, Systems,
Modulation, and Noise”, Fourth Edition, John Wiley
and Sons, 1995, ISBN 0471124966

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