Complex State-Space Modeling and Nonlinear Control of Active Front-End Converters
Complex State-Space Modeling and Nonlinear Control of Active Front-End Converters
Abstract—This paper presents the modeling and control of in these applications, where these rectifiers have become known
active front-end (AFE) converters using complex state-space as active front-end (AFE) converters.
representation, a technique developed and thus far mostly em- All these appealing characteristics have been achieved thanks
ployed for the analysis of ac machines. Particularly, three-phase
PWM voltage-source and current-source rectifiers are thor- to the development of high-power semiconductor devices and
oughly studied using the graphical capabilities of this approach, advanced control strategies [2], [7]–[9], upon which state-feed-
namely, complex signal flow graphs. These are used to directly back input–output linearization (IOL) has been one of the
and intuitively derive high-performance nonlinear control laws most promising [10]. The main achievement of this nonlinear
based on input–output feedback linearization. Specifically, a
cascaded and a paralleled control scheme are investigated for the
control technique has been the decoupling and linearization
voltage-source rectifier, whereas a cascaded scheme is considered of the synchronous - axes dynamics in AFE converters [5],
for the current-source rectifier. Under these strategies both con- [11]–[13], which furthermore ensures the stability of high-per-
verters exhibit linear and decoupled – axes dynamics, while formance regenerative drives [14]. The attractiveness of IOL
also attaining a reactive power compensation capacity. Moreover, has not passed unattended. On the contrary, it has been applied
linearization of their respective dc-link voltage and current loops
utterly enforces and ensures their operating stability. All this with excellent results to motor drives [15]–[17], reactive power
is achieved without the elaborate mathematical complexity of compensators [18], and power-factor correction circuits among
input–output linearization, effectively shunned out by the pro- others [19]. However, its involved mathematical intricateness
posed complex state-space approach. Finally, experimental results has somehow constrained the widespread usage of this tech-
from 5-kVA digital-signal-processor-based laboratory prototypes nique, so that simple linear approaches —yet having nonlinear
verify the analysis and downright performance evinced by these
AFE converters. dynamics—are still preferred [3], [7]–[9].
On the load side of these AFE converters there is also a signif-
Index Terms—Active front-end (AFE) converter, complex
state-space, input–output linearization, pulsewidth-modulated icantly elaborate system, the electrical machine, whose differen-
(PWM) current-source rectifier, pulsewidth-modulated (PWM) tial equations represent a highly coupled nonlinear system [20].
voltage-source rectifier. Notwithstanding, a simple yet effective way of modeling their
dynamics has enlightened their operation by employing com-
plex state variables and space vector theory [21]. The unique-
I. INTRODUCTION
ness of this approach is that it enables the modeling, analysis,
(11)
(4)
(12)
Continuing, if (2) is complied with for every output, the fol-
lowing system of differential equations is obtained:
where is the power supply phase-voltage vector
is the input filter inductance, is the dc-link
capacitance, and and are parasitic resistances of the
..
. inductors and capacitors not shown in Fig. 1 for the sake of
clarity. The dc-link voltage dynamics may be alternatively
BURGOS et al.: COMPLEX STATE-SPACE MODELING AND NONLINEAR CONTROL OF AFE CONVERTERS 365
expressed in terms of the converter input–output power balance Then, by applying (15) and (17) to (11) and (12), the fol-
in accordence to the following relationship between its ac and lowing complex state-space system is obtained:
dc sides:
(18)
(13)
(19)
This expression assumes that the losses on both ac inductors and
power converter are negligible. Finally, rearranging (13) yields
where time constants and are, respectively, defined as
the dynamics of the dc-link voltage in its state-space form as
and , and the complex-variable inner product used
shown below
in (19) by
(14)
(20)
B. Synchronous – Axes Complex State-Space Model Alternatively, the dynamics of may be expressed in terms of
The following transformation is used in this paper to trans- the converter power balance as follows:
form abc-frame variables into space vectors:
(21)
(15)
where , and are three-phase variables, and is IV. PWM-CSR TOPOLOGY AND MODELING
the resultant space vector expressed as follows in the complex
plane: A. Stationary Frame State-Space Model
Fig. 2 shows the schematic of a PWM-CSR, where rep-
(16) resents the current-source inverter and motor load. Accordingly,
the average input–output converter relationships are defined by
Hereinafter, complex variables will be written in bold fonts.
Equation (15) represents a transformation into the stationary (22)
– frame. A rotating transformation into the synchronous –
axes frame might then be defined as follows: (23)
. The state-space model of the converter is then Its power balance relation may also be converted into the com-
given by plex state-space as shown below
(24) (32)
Fig. 3. Complex signal flow graph of the cascaded PWM-VSR representation. (a) Input current i and dc-link voltage v dynamics. (b) Converter input–output
power balance-based dc-link voltage dynamics.
The input–output power balance of the PWM-VSR cannot be control inputs that are bound to replace . Such a relationship,
directly analyzed from Fig. 3(a), as this signal flow graph solely for instance, is
represents the current and voltage dynamics. For that purpose,
a separate signal flow diagram equivalent to (21) is developed (34)
and shown in Fig. 3(b). This is an alternative representation to
study the dc-link voltage dynamics, which nonetheless are also The advantage of the proposed approach is that the current
captured by means of a first-order complex time delay of con- control law may be simply and directly obtained by inspection
stant . Its inputs in this case however are the power supply of the complex signal flow graph, as opposed to following the
voltage and ac current , whose product represents the con- involved mathematical procedure demanded by IOL. In fact, by
verter input power, and the load current representing the observing in Fig. 3(a) the signals and terms that need to be can-
output power of the converter. As expected, the instantaneous celled out to comply with (34), and by equating this same equa-
difference between the input and output power charges or dis- tion with (18), the input transformation may, thus, be obtained.
charges the dc-link capacitor. Notice that in this case current This current control law is shown below
is replaced by its reference , which corresponds to the input
control signal of this power system representation. (35)
Fig. 4. Block diagram of the cascaded control scheme for the PWM-VSR. (a) Input current i loop. (b) Outer dc-link voltage v and reactive power q loops.
according to settling time . Their specific values are actual control signal of the outer loop. This again implies that a
determined per the ITAE criterion (integral of time multiplied first-order dependence exists between and its control signal,
by the absolute value of error) optimized for a ramp input as also dictating the type of linear differential relationship that may
follows [30]: be constructed between and its new control signal , which
is explicitly shown below
(37)
(38)
This linear controller features exponentially convergent
tracking dynamics—which greatly enhances the performance Then, by equating (21) and (38) and by observing the signals
of this inner loop—attained by adding the time derivative of and terms that need to be cancelled out in Fig. 3(b), the dc-link
. This does not increase the noise sensitivity of the control voltage input transformation may be written as follows:
law as is defined and bounded by the outer loops. The
controller also presents parameter mismatch compensation (39)
through its integrator term. This ensures zero steady-state error
even when subject to temperature or aging parameter variations In this control law, has been nulled through proper synchro-
given the nature of the nonlinear transformation, which depends nization of the space-vector transformation, hence, may be
on system and converter parameters as shown in (35). Fig. 4(a) solely controlled by the -axis current. The new control signal
shows the resulting block diagram for this current control loop. is then defined in terms of the dc-link voltage error , and
used to tune the dynamic response of this loop as shown below
C. Outer DC-Link Voltage Loop
The complex signal flow graph depicted in Fig. 3(a) gives (40)
the false impression that a first-order dependence also exists be-
tween the converter dc-link voltage and the control signal In (40) is the dc-link voltage refer-
, manifested by current which depends from and as ence, and constants and are used for pole placement of
shown by this graph and (19). However, in current itself lies a the corresponding transfer function between and its ref-
hidden dependence of from given that is already a func- erence for a given settling time . These constants
tion of this control signal as shown in (18). This implies that the are determined per the ITAE criterion optimized for a step input
dependence between and is of second order and not first, as shown below [30]
the reason why a converter representation other than (19) is re-
quired to linearize the dc-link voltage dynamics.
A suitable alternative to model these dynamics is (21), which (41)
by considering the converter input–output power balance appro-
priately captures the above-mentioned subtlety, solely modeling Given that this is an outer loop there is no need for tracking ca-
the dependence between and as illustrated in Fig. 3(b). pacity, therefore, only an integrator has been added for possible
Notice that, given the cascaded control loop structure of this parameter mismatch compensation. Fig. 4(b) shows the block
scheme, current may be readily replaced by , namely the diagram of the dc-link voltage control loop.
BURGOS et al.: COMPLEX STATE-SPACE MODELING AND NONLINEAR CONTROL OF AFE CONVERTERS 369
Fig. 5. Complex signal flow graph of paralleled PWM-VSR representation. This graph captures the input current i and dc-link voltage v interaction as well as
the input–output converter power balance.
D. Reactive Power Loop converter representation. Particularly, this approach models the
The PWM-VSR reactive power is given by power flow passing through the converter instead of the dc cur-
rent generation. Consequently, the dc-link voltage results
from the instantaneous input–output power difference between
(42) the power system and the inverter load. This voltage signal flows
back then closing the nonlinear dynamic interaction of the con-
an expression that may be reduced to verter. Notice that in this case there is no appearance of ,
thus implying that may be directly controlled by together
(43) with the input current .
if is appropriately nulled by the space vector transforma- B. Input Current and DC-Link Voltage Loops
tion. Given the already linear dynamics of this relation, a simple Fig. 5 elicits the direct dependence of the PWM-VSR input
proportional–integral (PI) controller is used to regulate the con- current and dc-link voltage from its modulating signal ,
verter reactive power loop. This controller has the following being of first order for the former and of second order for the
structure: latter. These dependences are, respectively, observed through
the direct feed of product to the inductors block, and
(44) by the direct excitation of the capacitor block by current , a
function of as already revealed. This implies that both cur-
where is the reactive power reference, and rents and voltages may be controlled in parallel by the converter
the values of and are determined to ensure 20 dB at the modulating signal . However, only two variables may be con-
cutoff frequency of the current loop. These values are given by trolled by the complex space vector (equal to ), and
there are three distinct variables to control, specifically, the -
and -axes components of and itself. The solution nonethe-
(45)
less lies at hand.
Two key features to attain with any AFE converter based on
where is the nominal value of and is the current PWM-VSRs are unity input power factor, which implies con-
loop settling time. The block diagram of this control loop is also trolling the -axis current to zero, and, of course, regulation of
depicted in Fig. 4(b). the converter dc-link voltage. These, therefore, represent the two
main control objectives for this type of converter, which conve-
VI. PARALLELED REPRESENTATION AND CONTROL niently have the added advantage of inherently regulating the
OF THE PWM-VSR -axis current. This is so given that it is this current compo-
nent that actually generates the active power that regulates
A. Complex Signal Flow Graph
and, hence, by controlling this voltage is indirectly controlled,
By combining (18) and (21) a parallel current–voltage rep- becoming a bounded and stable internal dynamic of the con-
resentation of the PWM-VSR may be obtained. Fig. 5 shows trol system [10], [13]. Consequently, the reactive current and
the correspondent complex signal flow graph. As expected, both dc-link voltage may be readily chosen as control system out-
current/voltage interactions and converter power balance are ef- puts. The input transformation to replace by a new input in
fectively captured in this graph. Just as in the cascaded represen- order to attain IOL may, hence, be obtained as follows.
tation, the inputs to the system are the power supply voltage , As suggested by the previous analysis, a first-order differen-
the inverter load current , and the control input . The dy- tial relationship may be built for
namics of the reactive elements are also modeled by first-order
complex time delays of time constants and , where only the
capacitor block has been modified to accommodate the different (46)
370 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 2, APRIL 2005
Fig. 6. Block diagram of the paralleled control scheme for the PWM-VSR. (a) Inner q -axis current i and dc-link voltage v loops. (b) Outer reactive power q
loop.
In (46) is the -axis component of . Then, by observing by equating (49) and (50), which renders the following control
in Fig. 5 the terms to be cancelled out and equating (46) to the law:
-axis or imaginary part of (18), the input transformation for the
control of may be determined. This control law is given below
(47)
(50) (54)
Fig. 7. Complex signal flow graph of the cascaded PWM-CSR representation. (a) Input current i and dc-link current i dynamics. (b) Converter input–output
power balance-based dc-link current dynamics.
under the paralleled control scheme is in effect governed by as for the inductors, the self-induced negative feedback is only
(43), which naturally implies that an outer control loop may be observable from a nonstationary frame, also representing the
readily implemented to regulate it. This is possible given that cross-coupled nature of the - and -axes dynamics. Finally,
the only assumption taken in the derivation of (54) is that the dc-link inductor block is excited by the converter output
is zero, effectively achieved by proper synchronization of the voltage which is a function of and as shown in (31). Its
space-vector transformation. Then, a simple PI controller is im- output is the dc-link current which flows back through the
plemented given the aforementioned linear dynamics of . Its converter closing the state-variables interaction.
structure and parameters are also given by (44)–(45). The block Similarly to the PWM-VSR, the input–output power balance
diagram of this particular control loop is shown in Fig. 6(b). of the PWM-CSR cannot be directly studied from its current-
voltage representation. A separate signal flow graph is, hence,
developed and shown in Fig. 7(b). In this diagram, equivalent
VII. PWM-CSR PROPOSED CONTROL SCHEME to (32), the dc-link current dynamics are also represented by a
first-order complex time delay of time constant . Its inputs
A. Complex Signal Flow Graph are the converter input power, obtained through the product of
and , and voltage representing the converter output
Fig. 7(a) shows the signal flow diagram of the PWM-CSR
power. Hence, the instantaneous power difference between these
equivalent to its complex state-space model described by
increases or decreases the dc-link current. Notice that in this
(29)–(31). It is comprised of four blocks, namely, inductors and
graph current has also been replaced by , which becomes
capacitors that form a second-order input filter, dc-link inductor,
the control signal in this system.
and converter. The – filter dynamics are represented by the
series connection of two first-order complex time delays of time
constants and , respectively, whereas the dc-link inductor B. Inner Input-Current Loop
is modeled by a single first-order time delay of time constant
. The inputs to the system are the power supply voltage , Inspection of Fig. 7(a) clearly shows a second-order depen-
the current-source inverter voltage , and the control input dence of the converter input current from its control signal ,
, which, respectively, excite the input filter inductors, the as this current depends on the capacitors voltage , which in turn
dc-link inductor, and the converter itself. The inductors block depends on . Consequently, a second-order linear differential
is also excited by a negative, cross-coupled current feedback relationship may be constructed between and a new set of con-
or inductors back EMF, and by the input filter ac voltages . trol inputs with which is later replaced. Such a relationship
The output of this block, current , corresponds to the main is shown below
excitation to the ac capacitors, which are also excited by a
self-induced negative feedback voltage, and by the converter
ac current that captures the system nonlinearity. Just (55)
372 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 2, APRIL 2005
Fig. 8. Block diagram of the cascaded control scheme for the PWM-CSR. (a) Input current i loop. (b) Outer dc-link current i and reactive power q loops.
The second-order derivative of is then found by differentiating per the ITAE criterion optimized for a ramp input for a given
(29), which as depicted below presents an term that verifies a settling time as shown below [30]
the second-order dependence assumption previously made
(59)
(57) (60)
Fig. 9. Experimental waveforms of the PWM-VSR under the cascaded control scheme. (a) AC waveforms operating at unity power factor and 80% loading.
(b) DC waveforms under same conditions. (c) AC waveforms operating at 0.86 leading power factor and 65% loading. (d) DC waveforms for this condition.
(e) Transient response to a 30% reactive power step. (f) Transient response to 50% load shed. Waveforms shown are: power supply phase voltage v (100 V/div,
2 ms/diV), converter line voltage v (200 V/div, 2 ms/diV), dc-link voltage v (200 V/div, 2 ms/diV), dc-link current i (10 A/div, 2 ms/diV) load current i load
(10 A/div, 2 ms/diV), input current i (20 A/div, 2 ms/diV), d- and q -axes current components i and i (10 A/div, 5 ms/diV), and converter reactive power q and
its reference q (3.8 kvar/div, 5 ms/diV).
hence, solely controlled by the -axis component of . The VIII. PERFORMANCE EVALUATION
new control signal is defined as
A. Experimental Setup
In order to evaluate the performance of the control schemes
(62) presented for the PWM-VSR and PWM-CSR two 5-kVA exper-
imental prototypes were implemented. The converters were fed
from a 110-V/50-Hz three-phase power supply, and controlled
with , and the dc-link current reference. by means of a TMS320C32 DSP-based digital control system
Constants and are used to set the desired dynamic response operating at a sampling frequency of 3 kHz. The input filter
for this loop, respectively determined by (41). The resulting inductance of the PWM-VSR employed was 1.4 mH, and its
control loop block diagram is depicted in Fig. 8(b). dc-link capacitance 2 mF. The cascaded control scheme was de-
signed to attain an input current settling time of 6.6 ms, and a
dc-link voltage settling time of 66 ms. The controller constants
D. Reactive Power Loop employed were and for the
current loop, and for the dc-link
The reactive power loop of this converter has the same struc- voltage loop, and and for the reactive power
ture of that employed by both PWM-VSR control schemes, loop. The parallel control scheme had the same current settling
given that the PWM-CSR reactive power is also defined by time, but a faster dc-link voltage settling time of 46.2 ms. The
(43). Accordingly, the controller employed for this control controller constants employed were and
loop is also (44)–(45). The corresponding control loop block for the -axis current loop, and
diagram is shown in Fig. 8(b). , and for the dc-link voltage loop.
374 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 2, APRIL 2005
Fig. 10. Experimental waveforms of the PWM-VSR under the paralleled control scheme. (a) AC waveforms operating at unity power factor and 75% loading.
(b) DC waveforms under same conditions. (c) AC waveforms operating at 0.86 leading power factor and 65% loading. (d) DC waveforms for this condition.
(e) Transient response to a 30% reactive power step. (f) Transient response to 50% load shed. Waveforms shown are: power supply phase voltage v (100 V/div,
2 ms/diV), converter line voltage v (200 V/div, 2 ms/diV), dc-link voltage v (200 V/div, 2 ms/diV), dc-link current i (10 A/div, 2 ms/diV) load current i load
(10 A/div, 2 ms/diV), input current i (20 A/div, 2 ms/diV), d- and q -axes current components i and i (10 A/div, 5 ms/diV), and converter reactive power q and
its reference q (3.8 kvar/div, 5 ms/diV).
Its reactive power loop employed and . For phase voltage , converter line voltage , dc-link voltage
the PWM-CSR the input filter inductance and capacitance were , dc-link current , load current , input current -
respectively 1.4 mH and 90 F, while its dc-link inductance was and -axes current components and , and the converter
of 40 mH. This control scheme was designed to meet a current reactive power and its reference . These waveforms show
settling time of 6.6 ms, and a dc-link current settling time of 66 the good results attained with this control scheme, presenting
ms. The controller gains were , linear dynamics and a virtually nonexistent coupling between
and for the input current loop, the - and -axes channels.
and for the dc-link current loop, and and Fig. 10 shows experimental waveforms of the PWM-VSR
for the reactive power loop. under the paralleled control scheme. Fig. 10(a) and (b) shows
steady-state waveforms at unity input power factor, Fig. 10(c)
B. Results and (d) the operation at 0.86 leading power factor, while
Fig. 9 shows steady-state and transient waveforms of the Fig. 10(e) and (f) shows the converter transient response when
PWM-VSR operating with the cascaded control scheme. subject to a reactive power step command of 30%, and a
Fig. 9(a) and (b) depicts the converter operating at unity input 50% load rejection respectively. The advantage of this control
power factor and 80% nominal power, and Fig. 9(c) and (d) the scheme lies in a faster dc-link voltage control when compared
operation at 0.86 leading power factor under 65% power de- to the cascaded approach. However, due to the intrinsic dif-
mand. Fig. 9(e) on the other hand shows the transient response ferent time response of the -axis current and dc-link voltage
of the converter when subject to a reactive power step command control loops a slight coupling occurs between the - and the
of 30%, and Fig. 9(f) the response to a 50% load rejection. -axis currents as shown in Fig. 10(e). Nonetheless, this does
The waveforms shown in these pictures are: power supply not impair the converter capability to operate as a reactive
BURGOS et al.: COMPLEX STATE-SPACE MODELING AND NONLINEAR CONTROL OF AFE CONVERTERS 375
Fig. 11. Experimental waveforms of the PWM-CSR under cascaded control scheme. (a) AC waveforms operating at unity power factor and 80% loading. (b) DC
waveforms under same conditions. (c) AC waveforms operating at 0.8 leading power factor and 80% loading. (d) DC waveforms for this condition. (e) Transient
response to a 30% reactive power step. (f) Transient response to 25% dc-link current step. Waveforms shown are: power supply phase voltage v (100 V/div,
2 ms/div), input filter phase voltage v (100 V/div, 2 ms/div), dc-link voltage v (100 V/div, 2 ms/div), load voltage v (100 V/div, 2 ms/div), converter line
current i (20 A/div, 2 ms/div), dc-link current i (20 A/div, 2 ms/div), input current i (20 A/div, 2 ms/div), d- and q -axes current components i and i (10 A/div,
5 ms/div), and converter reactive power q and its reference q (3.8 kvar/div, 5 ms/div).
power compensator as shown by Fig. 10(c)–(e). This inherent scheme, featuring linear converter dynamics with decoupled -
capacity had not been exploited nor explored by previous works and -axes channels.
[12], [13], [26], [27]. The waveforms shown in these figures The – -axes waveforms depicted in Figs. 9–11 show an
are: power supply phase voltage , converter line voltage , apparent oscillation at the sixth harmonic (300 Hz), which
dc-link voltage , dc-link current , load current , input may be easily observed on the PWM-CSR and currents
current - and -axes current components and , and the due to the presence of the – filter. This is not a system
converter reactive power and its reference . resonance but the result of the modulation that takes place when
Fig. 11 shows steady-state and transient waveforms of the converting ac waveforms into the – synchronous frame. These
PWM-CSR operating under the cascaded control scheme pre- ac waveforms contain fifth and seventh harmonics—generated
sented. Fig. 11(a) and (b) depicts the converter operating at unity by the space-vector modulator regular sampling process—and,
input power factor and 80% nominal power, and Fig. 11(c) and thus, generate sixth harmonics on the converted – variables. To
(d) the operation at 0.8 leading power factor under the same verify this, a 100-kW PWM-CSR was simulated and subjected to
power conditions. The transient response of this converter is a 45% step change in its reactive power reference (Fig. 12). The
shown in Fig. 11(e) and (f), which, respectively, depict a reac- much higher power rating and lower damping of this converter
tive power step command of 35% and a 25% dc-link current system should have excited the sixth harmonic oscillation had
step. The waveforms shown are: power supply phase voltage it been a system resonance. However, as shown in Fig. 12, the
, converter line current , dc-link voltage , dc-link current converter showed linear and decoupled dynamics without any
, load voltage , input current - and -axes current resonance problems. The 300-Hz oscillation is present as well,
components and , and the converter reactive power and but at the same level shown in the experimental waveforms,
its reference . These results validate the presented control which verifies its modulation-generated nature.
376 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 2, APRIL 2005
Fig. 12. Simulated waveforms of a 220-V/50-Hz 100-kW PWM-CSR under cascaded control scheme subject to a 45% reactive power step. Waveforms shown
are: power supply phase voltage v , input filter phase voltage v , input current i, converter line current i , current i d-q axes components i and i , and converter
reactive power q and its reference q .
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technology,” IEEE Trans. Ind. Electron., vol. 45, no. 6, pp. 840–852, received the Electronics Engineering degree from
Dec. 1998. Santa Maria University, Valparaiso, Chile, in 1975,
[25] , “Sensorless control of induction motor drives,” Proc. IEEE., vol. and the Ph.D. degree from Concordia University,
90, no. 8, pp. 1359–1394, Aug. 2002. Montreal, QC, Canada, in 1985.
[26] H. Sugimoto, S. Morimoto, and M. Yano, “A high-performance con- Since 1976, has been with the University of Con-
trol method of a voltage-type PWM converter,” in Proc. IEEE PESC’88, cepción, Concepción, Chile, where he is currently
1988, pp. 360–368. a Professor in the Electrical Engineering Depart-
[27] S. Fukuda Y. Iwaji and T. Aoyama, “Modeling and control of sinusoidal ment. His research interests are power converters,
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medium-voltage current-source drives using sequential-sampling syn- distribution systems. His industrial experience includes more than 6000 hours
chronous space vector modulation,” IEEE Trans. Ind. Electron., vol. 50, working on engineering projects and consulting. He has published numerous
no. 6, pp. 1275–1289, Dec. 2003. technical papers and has coauthored technical books.
[29] E. Wiechmann, P. Ziogas, and V. Stefanovic, “Generalized functional Dr. Wiechmann is currently Chairman of the IEEE Chilean Joint Chapter
model for three-phase PWM inverter/rectifier converters,” IEEE Trans. of the IEEE Industry Applications, IEEE Power Electronics, and IEEE Indus-
Ind. Appl., vol. 23, no. 2, pp. 236–246, Mar./Apr. 1987. trial Electronics Societies. He is the recipient of the year 2000 Concepción City
[30] R. Dorf, Modern Control Systems. Reading, MA: Addison-Wesley, Award for Outstanding Achievements in Applied Research.
1992.