BT1120
BT1120
BT1120
1120-7 1
Scope
This HDTV interface operates at two nominal clock frequencies, 1.485 GHz and 2.97 GHz. The
uncompressed payload of the interface is defined in Part 1 and Part 2 of Recommendation ITU-R BT.709.
The interface may also be used for carrying packetized data.
recommends
1 that the specifications described in this Recommendation should be used for the basic
digital coding as well for the bit-parallel and bit-serial interfaces for HDTV studio signals.
PART 1
1 Digital representation
TABLE 1
Digital coding parameters
Value
Item Parameter
1125/60/2:1 1250/50/2:1
1 Coded signals Y, CB, CR or R, G, B These signals are obtained from gamma pre-corrected signals, namely
EY′ , ECB
′ , ECR
′ or E R′ , EG
′ , E B′
Also see Recommendation ITU-R BT.709, Part 1
2 Sampling lattice Orthogonal, line and picture repetitive
– R, G, B, Y
3 Sampling lattice Orthogonal, line and picture repetitive, co-sited with each other and with
alternate Y samples. The first active colour-difference samples are co-
– CB, CR sited with the first active Y sample
4 Number of active lines 1035 1152
5 Sampling frequency (1)
– R, G, B, Y (MHz) 74.25 72
6 Sampling frequency (1) Half of luminance sampling frequency
– CB, CR
7 Number of samples/line
– R, G, B, Y 2200 2304
– CB, CR 1100 1152
8 Number of active samples/line
– R, G, B, Y 1920
– CB, CR 960
Rec. ITU-R BT.1120-7 3
TABLE 1 (end )
Value
Item Parameter
1125/60/2:1 1250/50/2:1
9 Position of the first active Y, CB, CR 192 T 256 T
sampling instants with respect to the
analogue sync timing reference OH (2) (see
Fig. 6)
10 Coding format Uniformly quantized PCM for each of the video component signals 8 or
10 bit/sample 10 bit preferable
11 Quantization level assignment (3)
– Video data 1.00 through 254.75
– Timing reference 0.00 and 255.75 (4)
12 Quantization levels (5)
– Black level R, G, B, Y 16.00
– Achromatic level CB, CR 128.00
– Nominal peak
– R, G, B, Y 235.00
CB, CR 16.00 and 240.00
13 Filter characteristics See Recommendation ITU-R BT.709
(1) The sampling clock must be locked to the line frequency. The tolerance on frequency is ±0.001% for 1125/60/2:1 and
±0.0001% for 1250/50/2:1, respectively.
(2) T denotes the duration of the luminance sampling clock or the reciprocal of the luminance sampling frequency.
(3) To reduce confusion when using 8-bit and 10-bit systems together, the two LSBs of the 10-bit system are read as two fractional
bits. The quantization scale in an 8-bit system ranges from 0 to 255 in steps of 1, and in a 10-bit system from 0.00 to 255.75 in
steps of 0.25. When 8-bit words are presented in a 10-bit system, two LSBs of zeros are to be appended to the 8-bit words.
(4) In the case of a 8-bit system, eight MSBs are used.
(5) These levels refer to precise nominal video levels. Signal processing may occasionally cause the signal level to deviate outside
these ranges.
2 Digital interface
The interface provides a unidirectional interconnection between a single source and a single
destination. The data signals are in the form of binary information and are coded accordingly:
– video data (8-bit or 10-bit words);
– timing reference and identification codes (8-bit or 10-bit words except for 1250/50/2:1,
which use 10-bit words only);
– ancillary data (see Recommendation ITU-R BT.1364).
The data words corresponding to digital levels 0.00 through 0.75 and 255.00 through 255.75 are
reserved for data identification purposes and must not appear as video data.
For 1125/60/2:1, R, G, B signals are handled as 30-bit words in addition to the above 20-bit words
for Y, CB, CR signals.
TABLE 2
Line interval timing specifications
Value
Symbol Parameter
1125/60/2:1 1250/50/2:1
NOTE 1 – The parameter values for analogue specifications expressed by the symbols a, b and c indicate the nominal values.
NOTE 2 – T denotes the duration of the luminance sampling clock or the reciprocal of the luminance sampling frequency.
Rec. ITU-R BT.1120-7 5
The value of protection bits, P0 to P3, depends on the F, V and H as shown in Table 15. The
arrangement permits one-bit errors to be corrected and two-bit errors to be detected at the receiver,
but only in the 8 MSBs, as shown in Table 16.
6 Rec. ITU-R BT.1120-7
TABLE 3
Field interval timing specifications
NOTE 1 – Digital field blanking No. 1 denotes the field blanking period that is prior to the active video of field No. 1, and digital
field blanking No. 2 denotes that prior to the active video of field No. 2.
3 Bit-parallel interface
For the system of 1125/60/2:1, the bits of the digital code words which describe the video signal are
transmitted in parallel by means of 20 or 30 shielded conductor pairs. The 20 conductor pairs are
used for the transmission of the signal set consisting of luminance Y and time-multiplexed
colour-difference CB/CR components. The 30 conductor pairs are used for the transmission of R, G,
B signals or Y, CB/CR components with an additional data stream (auxiliary channel). An additional
shielded conductor pair carries the synchronous clock at 74.25 MHz.
For the 1250/50/2:1 system, the bits of digital code words that describe the video signal are
transmitted in parallel by means of 20 signal pairs, where each pair carries a stream of bits, 10 pairs
for luminance data and 10 pairs for time-multiplexed colour-difference data. The 20 pairs can also
carry ancillary data. A 21st pair provides a synchronous clock at 36 MHz.
Data signals are transmitted in non-return-to-zero (NRZ) form in real time (unbuffered).
For 1250/50/2:1, the transmitted clock signal is a 36 MHz square wave of unity mark/space ratio,
the transitions of which are coincident with the transition of the data (see Fig. 2). A logical high
state of the clock is concurrent with Y and CB data samples and a logical low state with Y and CR
data samples, as shown in Fig. 2 and Table 4.
TABLE 4
Clock signal specifications
Value
Parameter
1125/60/2:1 1250/50/2:1
Sampling frequency for Y, R, G, B 74.25 72
signals (MHz)
Clock period Tck 1/(2200 fH) 1/(1152 fH)
Nominal value (ns) 13.468 27.778
Clock pulse width, t 0.5 Tck
Tolerance ±0.11 Tck (nominal)
Clock jitter Within ±0.04 Tck Within ±0.5 ns
from the average time of transition over one field in interlace systems,
and over one frame in progressive systems
Data timing, Td 0.5 Tck 0.25 Tck
Tolerance ±0.075 Tck (nominal)
NOTE 1 – fH denotes the line frequency.
NOTE 2 – Values are specified at the sending end (source).
8 Rec. ITU-R BT.1120-7
TABLE 5
Line driver characteristics
Value
Item Parameter
1125/60/2:1 1250/50/2:1
TABLE 6
Line driver characteristics
Value
Item Parameter
1125/60/2:1 1250/50/2:1
FIGURE 3
Idealized eye diagram corresponding
to the minimum input signal level
TABLE 7
Connector contact assignment for 1250/50/2:1
NOTE 1 – Data 9-Data 0 represent each bit of the luminance signal (Y ), and Data 19-Data 10 that of
time-multiplexed colour-difference signal (CR/CB ). The suffix 19 to 0 indicates the bit number (bit 19
denotes MSB for CR/CB and bit 9 MSB for Y ). A and B correspond to the terminals A and B of Fig. 9,
respectively.
Rec. ITU-R BT.1120-7 11
4 Bit-serial interface
TABLE 8
Data stream timing specifications (see Fig. 14)
Value
Symbol Parameter
1125/60/2:1 1250/50/2:1
T Parallel clock period (ns) 1000/74,25 1000/72
Ts Multiplexed parallel data clock period T/2
m Digital line in parallel data stream 2200 2304
k Digital line blanking in parallel data 280 384
stream
n Ancillary data or blanking data in parallel 268 372
data stream
ms Digital line in multiplexed parallel data 4400 4608
stream
ks Digital line blanking in multiplexed 560 768
parallel data stream
ns Ancillary data or blanking data in 536 744
multiplexed parallel data stream
4.2.2 Serializing
See Part 2, § 4.2.2.
4.2.3 Channel coding
See Part 2, § 4.2.3.
4.2.4 Serial clock
Table 9 specifies the serial clock frequencies, which are twenty times the frequency of the parallel
clock (see Table 4).
TABLE 9
Serial clock frequency
Value
Parameter
1125/60/2:1 1250/50/2:1
PART 2
This part specifies digital interfaces for the systems listed in Table 10. For the 60, 30 and 24 Hz
systems, picture rates having those values divided by 1.001 are also included. Parameter values for
these systems are presented in parentheses.
TABLE 10
HDTV systems based on CIF (see Recommendation ITU-R BT.709, Part 2)
Capture
System (Hz) Transport
1 Digital representation
where D takes either the value 1 or 4, corresponding to 8-bit or 10-bit quantization respectively;
EG′ , E B′ , E R′ and EY′ denote analogue R, G, B and luminance signals that have been normalized to
span the range 0.0 to 1.0, while EC′ R and EC′ B denote analogue colour-difference signals that have
been normalized to span the range – 0.5 to +0.5.
2 Digital interface
The interface provides a unidirectional interconnection between a single source and a single
destination. The data signals are in the form of binary information and are coded accordingly:
– video data (8-bit or 10-bit words);
– timing reference and identification codes (8-bit or 10-bit words);
– ancillary data (see Recommendation ITU-R BT.1364).
TABLE 11
Digital coding parameters
System
Item Parameter
60/P 30/P 30/PsF 60/I 50/P 25/P 25/PsF 50/I 24/P 24/PsF
1 Coded signals Y, CB, CR or R, G, B These signals are obtained from gamma pre-corrected signals, namely EY' , EC
' , EC
' or ER' , EG
' , EB' . Also see
B R
Recommendation ITU-R BT.709, Part 2
2 Sampling lattice
– R, G, B, Y Orthogonal, line and picture repetitive
3 Sampling lattice
– CB, CR Orthogonal, line and picture repetitive, co-sited with each other and with alternate (1) Y samples
6 Number of samples/line
– R, G, B, Y 2 200 2 640 2750
– CB, CR 1100 1320 1375
System
Point Parameter
60/P 30/P 30/PsF 60/I 50/P 25/P 25/PsF 50/I 24/P 24/PsF
9 Coding format Uniformly quantized PCM for each of the video component signals 8- or 10-bit/sample
The digital line occupies m clock periods. It begins at f clock periods prior to the reference
transition (OH) of the analogue synchronizing signal in the corresponding line. The digital active
line begins at g clock periods after the reference transition (OH). The values for m, f and g are listed
in Table 12. See Fig. 6 and Table 12 for detailed timing relationships in the line interval.
For interlace and segmented frame systems, the start of digital field/segment is fixed by the position
specified for the start of the digital line. See Fig. 7a) and Table 13a) for detailed relationships in the
field/segment interval.
For progressive systems, the start of the digital frame is fixed by the position specified for the start
of the digital line. See Fig. 7b) and Table 13b) for detailed relationships in the frame interval.
There are two timing reference codes, one at the beginning of each video data block SAV and the
other at the end of each video data block EAV. These codes are contiguous with the video data, and
continue during the field/frame/segment blanking interval, as shown in Fig. 7.
18 Rec. ITU-R BT.1120-7
TABLE 12
Line interval timing specifications
Each code consists of a four-word sequence. The bit assignment of the word is given in Table 14.
The first three words are fixed preamble and the fourth word carries the information that defines
field identification (F), field/frame blanking period (V), and line blanking period (H). In a 8-bit
implementation bits Nos. 9 to 2 inclusive are used.
The bits F and V change state synchronously with EAV at the beginning of the digital line.
The value of protection bits, P0 to P3, depends on the F, V and H as shown in Table 15. The
arrangement permits one-bit errors to be corrected and two-bit errors to be detected at the receiver,
but only in the 8 MSBs, as shown in Table 16.
TABLE 13
a) Field/segment interval timing specifications for interlace
and segmented frame scanning systems
NOTE 1 – Digital field/segment blanking No. 1 denotes the field/segment blanking period that is prior to the active video of
field/segment No. 1, and digital field/segment blanking No. 2 denotes that prior to the active video of field/segment No. 2.
TABLE 14
Bit assignment for video timing reference codes
Bit number
Word
9 8 7 6 5 4 3 2 1 0
(MSB) (LSB)
First 1 1 1 1 1 1 1 1 1 1
Second 0 0 0 0 0 0 0 0 0 0
Third 0 0 0 0 0 0 0 0 0 0
Fourth 1 F V H P3 P2 P1 P0 0 0
= 0 elsewhere = 0 in SAV
NOTE 1 – P0, P1, P2, P3 in the fourth word are the protection bits (see Table 15).
TABLE 15
Protection bits for SAV and EAV
Bit 9 8 7 6 5 4 3 2 1 0
(fixed) (F) (V) (H) (P3) (P2) (P1) (P0) (fixed) (fixed)
1 0 0 0 0 0 0 0 0 0
1 0 0 1 1 1 0 1 0 0
1 0 1 0 1 0 1 1 0 0
1 0 1 1 0 1 1 0 0 0
1 1 0 0 0 1 1 1 0 0
1 1 0 1 1 0 1 0 0 0
1 1 1 0 1 1 0 0 0 0
1 1 1 1 0 0 0 1 0 0
22 Rec. ITU-R BT.1120-7
TABLE 16
Error corrections using protection bits (P3-P0)
NOTE 1 – The error correction applied provides a DEDSEC (double error detection – single error
correction) function. The received bits denoted by “–” in the table, if detected, indicate that an error has
occurred but cannot be corrected.
− on any line that is outside the vertical extent of the picture as noted above and that is not
employed to convey vertical blanking interval signals that can be represented in the
analogue domain through direct (D/A) conversion (such as digital vertical interval time
code (D-VITC)).
3 Bit-parallel interface
The bits of the digital code words which describe the video signal are transmitted in parallel by
means of 20 or 30 shielded conductor pairs. The 20 conductor pairs are used for the transmission of
the signal set consisting of luminance Y and time-multiplexed colour-difference CB /CR components.
The 30 conductor pairs are used for the transmission of R, G, B signals or Y, CB /CR components
with an additional data stream (auxiliary channel). An additional shielded conductor pair carries the
synchronous clock at 148.5 MHz (148.5/1.001 MHz) for 60/P and 50/P, and 74.25 MHz
(74.25/1.001 MHz) for the other systems.
Data signals are transmitted in NRZ form in real time (unbuffered).
TABLE 17
Clock signal specifications
Value
Parameter
60/P 30/P 30/PsF 60/I 50/P 25/P 25/PsF 50/I 24/P 24/PsF
Sampling frequency for Y, R, G, B signals (MHz) 148.5 74.25 148.5 74.25 74.25
(148.5/1.001) (74.25/1.001) (74.25/1.001)
from the average time of transition over one field/segment in interlace and segmented frame systems, and over
one frame in progressive systems
TABLE 18
Line driver characteristics
TABLE 19
Line receiver characteristics
TABLE 20
Connector contact assignment
Con- Signal Con- Signal Con- Signal Con- Signal Con- Signal Con- Signal
tact line tact line tact line tact line tact line tact line
TABLE 21
Transmission signal set and signal line assignment
G XD 9-XD 0 XD 9-XD 2
R, G, B B YD 9-YD 0 YD 9-YD 2
R ZD 9-ZD 0 ZD 9-ZD 2
Rec. ITU-R BT.1120-7 29
30 Rec. ITU-R BT.1120-7
4 Bit-serial interface
TABLE 22
Bit assignment of the line number data
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Word (MSB) (LSB)
LN0 Not b8 L6 L5 L4 L3 L2 L1 L0 R R
EDC(x) = x18 + x5 + x4 + 1
Initial value of the codes is set to zero. The calculation starts at the first word of the digital active
line and ends at the final word of the line number data. Two error detection codes are calculated,
one for luminance data (YCR) and one for colour-difference data (CCR). The bit assignment of the
error detection codes is shown in Table 23. The error detection codes should be located immediately
after the line number data.
TABLE 23
Bit assignment for error detection codes
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Word (MSB) (LSB)
YCR0 Not b8 CRCC8 CRCC7 CRCC6 CRCC5 CRCC4 CRCC3 CRCC2 CRCC1 CRCC0
YCR1 Not b8 CRCC17 CRCC16 CRCC15 CRCC14 CRCC13 CRCC12 CRCC11 CRCC10 CRCC9
CCR0 Not b8 CRCC8 CRCC7 CRCC6 CRCC5 CRCC4 CRCC3 CRCC2 CRCC1 CRCC0
CCR1 Not b8 CRCC17 CRCC16 CRCC15 CRCC14 CRCC13 CRCC12 CRCC11 CRCC10 CRCC9
G(x) = (x9 + x4 + 1) (x + 1)
The input signal to the scrambler shall be positive logic. (The high voltage represents data 1 and the
lowest voltage represents data 0.)
4.2.4 Serial clock
Table 24 specifies the serial clock frequencies, which are twenty times the frequency of the parallel
clock (see Table 17).
TABLE 24
Serial clock frequency
Value
Parameter
60/P 30/P 30/PsF 60/I 50/P 25/P 25/PsF 50/I 24/P 24/PsF
TABLE 25
Data stream timing specifications (see Fig. 14)
Value
Symbol Parameter
60/P(1) 30/P 30/PsF 60/I 50/P(1) 25/P 25/PsF 50/I 24/P 24/PsF
n Ancillary data or blanking data in parallel data stream 268 708 728
ks Digital line blanking in multiplexed parallel data stream 560 1440 1660
ns Ancillary data or blanking data in multiplexed parallel data 536 1416 1456
stream
TABLE 26
Line driver characteristics
7 Output jitter(6) f1 = 10 Hz
f3 = 100 kHz
f4 = 1/10 of the clock rate
A1 = 1 UI (UI: unit interval)
A2 = 0.2 UI
(1) Defined by mid-amplitude point of the signal.
(2) Measured across a 75 Ω resistive load connected through a 1 m coaxial cable.
(3) In the frequency range of 5 MHz to fc/2. (fc: serial clock frequency)
(4) In the frequency range of fc/2 to fc.
(5) Determined between the 20% and 80% amplitude points and measured across a 75 Ω resistive load. Overshoot of the
rising and falling edges of the waveform shall not exceed 10% of the amplitude.
(6) 1 UI corresponds to 1/fc. Specification of jitter and jitter measurements methods shall comply with Recommendation
ITU-R BT.1363 – Jitter specifications and methods for jitter measurement of bit-serial signals conforming to
Recommendations ITU-R BT.656, ITU-R BT.799 and ITU-R BT.1120.
Output amplitude excursions due to signals with a significant dc component occurring for a horizontal line
(pathological signals) shall not exceed 50 mV above or below the average peak-peak signal envelope. (In effect, this
specification defines a minimum output coupling time constant.)
36 Rec. ITU-R BT.1120-7
TABLE 27
Line receiver characteristics
±2.5 Vmax DC
TABLE 28
Transmission line characteristics
3 Impedance 75 Ω nominal
(1) Loss characteristics of f .
(2) In the frequency range of 5 MHz to fc/2.
(3) In the frequency range of fc/2 to fc.
4.3.4 Connector
The connector should have the mechanical characteristics conforming to the standard BNC type
(IEC 61169-8 (2007-2))* – Part 8: Sectional specification – RF coaxial connectors with inner
* NOTE – IEC 61169-8 (2007-2) is available in electronic version at the following address:
http:/www.itu.int/md/R03-WP6A-C-0145/en.
Rec. ITU-R BT.1120-7 37
diameter of outer conductor 6.5 mm (0.256 in) with bayonet lock-characteristic impedance 50 Ω
(type BNC), Annex A (Normative) Information for interface dimensions of 75 Ω characteristic
impedance, and for a usable frequency range of up to 3.5 GHz.
TABLE 29
Payload identifier definitions for 1920 × 1080 video payloads on
dual link high definition digital interfaces
Bits Byte 1 Byte 2 Byte 3 Byte 4
Interlaced (0) or
Bit 7 1 Progressive (1) Reserved Reserved
transport
Channel assignment
Interlaced (0) or of dual link
Bit 6 0 Reserved
Progressive (1) picture
Ch1 (0) or Ch2 (1)
Bit 5 0 Reserved Reserved Reserved
Bit 4 0 Reserved Reserved Dynamic range
100% (0h), 200%
(1h),
Bit 3 0 400% (2h),
Reserved (3h)
Bit 2 1 Picture rate Sampling structure Reserved
Bit 1 1 Bit depth
8-bit (0h), 10-bit (1h),
Bit 0 1 12-bit (2h),
Reserved (3h)
Appendix 1
to Part 2
The dual-link high-definition serial digital interface can also be used to convey HDTV source signal
formats listed in Table 30.
TABLE 30
HDTV source signal format
Signal format sampling Pixel bit
Frame/field rates
structure depth
4:4:4 (RGB)
10 bit
4:4:4:4 (RGB + A)
30, 30/1.001, 25, 24, and
4:4:4 (RGB) 12 bit 24/1.001 Hz progressive and
4:2:2 (YCBCR) 12 bit segmented frame
1 4:4:4 (RGB) and 4:4:4:4 (RGB + A) 10-bit signals of 30/P, 30/PsF, 60/I, 25/P, 25/PsF,
50/I, 24/P and 24/PsF systems
Pixel bit Total words per Total words of active image Word number
Frame/field rates
depth transmission package data per transmission package a
60 or 60/1.001 fields,
10 bit 2200 1920 2199
30 or 30/1.001 frames
50 fields,
10 bit 2640 1920 2639
25 frames
2 4:4:4 (RGB) 12-bit signals of 30/P, 30/PsF, 60/I, 25/P, 25/PsF, 50/I, 24/P and 24/PsF
systems
60 or 60/1.001 fields,
12 bits 2200 1920 2199
30 or 30/1.001 frames
50 fields,
12 bits 2640 1920 2639
25 frames
TABLE 31
RGB:0-1 onto first channel of link B mapping structure
Bit number
9 8 7 6 5 4 3 2 1 0
Word
(MSB) (LSB)
___
B8 EP G:1 G:0 B:1 B:0 R:1 R:0 Res Res
MSB: most significant bit.
LSB: least significant bit.
Bit 8 is the even parity for Bit 7 through Bit 0.
Bit 9 is the complement of Bit 8.
Bit 0 and Bit 1 are the reserved bits (reserved bits shall be set to 0 until defined).
3 4:2:2 (YCBCR) 12-bit signals of 30/P, 30/PsF, 60/I, 25/P, 25/PsF, 50/I, 24/P and 24/PsF
systems
least significant 2 bits of 12-bit samples are designated by suffixes such as sample Y135:0-1 or
sample CB429:0-1. The least significant 2 bits of the Y, CB and CR signals are mapped to the first
channel of link B, and are designated by suffixes such as YCBCR135:0-1 and Y136:0-1. The n-th bit
of Y, CB and CR signals is designated by a suffix such as Y:n. The YCBCR:0-1 and Y:0-1 data
structure is defined in § 3.3.
3.3 YCBCR:0-1 and Y:0-1 onto first channel of link B data mapping
Mapping of the least significant 2 bits from the even-numbered samples of Y, CB and CR, and the
least significant 2 bits from the odd-numbered samples of Y (only), onto the first channel of link B,
is shown in Tables 32 and 33 and Fig. 22.
TABLE 32
YCBCR:0-1 onto first channel of link B mapping structure
Bit number
9 8 7 6 5 4 3 2 1 0
Word
(MSB) (LSB)
___
Bit8 EP Y:1 Y:0 CB:1 CB:0 CR:1 CR:0 Res Res
MSB: most significant bit.
LSB: least significant bit.
Bit 8 is the even parity for Bit 7 through Bit 0.
Bit 9 is the complement of Bit 8.
Bit 0 and Bit 1 are the reserved bits (reserved bits shall be set to 0 until defined).
TABLE 33
Y:0-1 onto 1st channel of link B mapping structure
Bit number
9 8 7 6 5 4 3 2 1 0
Word
(MSB) (LSB)
___
Bit8 EP Y:1 Y:0 Res Res Res Res Res Res
MSB: most significant bit.
LSB: least significant bit.
Bit 8 is the even parity for Bit 7 through Bit 0.
Bit 9 is the complement of Bit 8.
Bit 0 and Bit 1 are the reserved bits (reserved bits shall be set to 0 until defined).
Rec. ITU-R BT.1120-7 47
Pixel bit Total words per Total words of active image Word number
Frame/field rate
depth transmission package data per transmission package a
60 or 60/1.001 fields,
12 bit 2200 1920 2199
30 or 30/1.001 frames
50 fields,
12 bit 2640 1920 2639
25 frames
4 4:4:4 (YCBCR), 4:4:4:4 (YCBCR + A) 10-bit signals of 30/P, 30/PsF, 60/I, 25/P, 25/PsF,
50/I, 24/P and 24/PsF systems
Pixel bit Total words per Total words of active image Word number
Frame/field rates
depth transmission package data per transmission package a
60 or 60/1.001 fields,
10 bit 2200 1920 2199
30 or 30/1.001 frames
50 fields,
10 bit 2640 1920 2639
25 frames
5 4:4:4 (YCBCR) 12-bit signals of 30/P, 30/PsF, 60/I, 25/P, 25/PsF, 50/I, 24/P and 24/PsF
systems
Pixel bit Total words per Total words of active image Word number
Frame/field rate
depth transmission package data per transmission package a
60 or 60/1.001 fields,
12 bit 2200 1920 2199
30 or 30/1.001 frames
50 fields,
12 bit 2640 1920 2639
25 frames
Appendix 2
to Part 2
The 2.97 Gbit/s (nominal) serial digital interface can also be used to convey HDTV source signal
formats listed in Table 30.
The mappings of the signals defined in Table 30 are to be found in Appendix 1 to Part 2. In order to
use the same mappings for the single-link application the following process is required:
Annex 1
1 Scope
This Annex specifies digital test signals suitable for evaluating the low-frequency response of
equipment handling HDTV serial digital video signals. Although a range of signals will produce the
desired low-frequency effects, two specific signals are defined to test cable equalization and PLL
lock-in, respectively. In the past, these two signals have been colloquially called “pathological
signals.”
2 General considerations
Stressing of the automatic equalizer is accomplished by using a signal with the maximum number
of ones or zeros, with infrequent single clock period pulses to the opposite level. Stressing of
the PLL is accomplished by using a signal with a maximum low-frequency content; that is, with a
maximum time between level transitions.
54 Rec. ITU-R BT.1120-7
2.1 Channel coding of the serial digital signal defined in this Recommendation utilizes
scrambling and encoding into NRZI accomplished by a concatenation of the two following
functions:
G1 (x) = x9 + x4 + 1 G2 (x) = x + 1
As a result of the channel coding, long runs of zeros in the G2 (x) output data can be obtained when
the scrambler, G1 (x), is in a certain state at the time when the specific words arrive. That certain
state will be present on a regular basis; therefore, continuous application of the specific data words
will regularly produce the low-frequency effects.
2.2 Although the longest run of parallel data zeros (40 consecutive zeros) will occur during the
EAV/SAV timing reference sequence (TRS) words, the frequency with which the scrambling of the
TRS words coincide with the required scrambler state to permit either stressing condition is low. In
the instances where this coincidence occurs, the generation of the stressing condition is so time
limited that equalizers and PLLs are not maximally stressed.
2.3 In the data portions of digital video signals (excluding TRS words in EAVs or SAVs, and
ANC data flag words), the sample values are restricted to exclude data levels 0.00 to 0.75 and
255.00 to 255.75 (000h to 003h and 3FCh to 3FFh in 10-bit hexadecimal representation and 00.0h to
00.Ch and FF.0h to FF.Ch, in 8.2 hexadecimal notation) (see Note 1). The result of this restriction is
that the longest run of zeros, at the scrambler input, is 16 (bits), occurring when a sample value of
128.00 (200h or 80.0h) is followed by a value between 1.00 (004h or 01.0h) and 1.75 (007h or 01.Ch).
This situation can produce up to 26 consecutive zeros at the NRZI output, which is (also) not a
maximally stressed case.
NOTE 1 – Within this Annex, the contents of digital word are expressed in both decimal and hexadecimal
form. In decimal form, the eight MSBs are considered to be an integer part while the two additional bits are
considered to be fractional parts. In hexadecimal form, both 10-bit hexadecimal and 8.2 hexadecimal
notation are used. For example, the bit pattern 1001000101 would be expressed as 145.25, 245h or 91.4h.
2.4 Other specific data words in combination with specific scrambler states can produce a
repetitive low-frequency serial output signal until the next EAV or SAV affects the scrambler state.
It is these combinations of data words that form the basis of the test signals defined by this Annex.
2.5 Because of the Y/C interleaved nature of the component digital signal, it is possible to
obtain nearly any permutation of word pair data values over the entire active picture area by
defining a particular flat colour field in a noise-free environment. Certain of these permutations of
word pair data values will produce the desired low-frequency effects.
3 Checkfield data
3.1 Receiver equalizer testing is accomplished by producing a serial digital signal with
maximum d.c. content. Applying the sequence 192.00 (300h or C0.0h), 102.00 (198h or 66.0h)
continuously to the C and Y samples (respectively) during the active line will produce a signal of 19
consecutive high (low) states followed by one low (high) state in a repetitive manner, once the
scrambler attains the required starting condition. Either polarity of the signal can be realized,
indicated by the level of the 19 consecutive states. By producing approximately half of a field of
continuous lines containing this sequence, the required scrambler starting condition will be realized
on several lines, and this will result in the generation of the desired equalizer testing condition.
Rec. ITU-R BT.1120-7 55
3.2 Receiver PLL testing is accomplished by producing a serial digital signal with maximum
low-frequency content and minimum high-frequency content (i.e., lowest frequency of level
transitions). Applying the sequence 128.00 (200h or 80.0h), 68.00 (110h or 44.0h) continuously to the
C and Y samples (respectively) during the active line will produce a signal of 20 consecutive high
(low) states followed by 20 low (high) states in a repetitive manner, once the scrambler attains the
required starting condition. By producing approximately half of a field of continuous lines
containing this sequence, the required scrambler starting condition will be realized on several lines,
and this will result in the generation of the desired PLL testing condition.
3.3 Because the equalizer test works by producing a serial digital signal with a bias, steps must
be taken to ensure that both polarities of bias are realized. To change the polarity of the bias from
one frame to the next, the sum total of all the bits in all the data words in all the lines in a video
field must be odd.
To ensure that the polarity of the bias can change often, a single Y sample data word in the signal is
changed from 120.00 (198h or 66.0h) to 100.00 (190h or 64.0h) (a net change of 1 data bit), once
every other frame. This causes the bias polarity to alternate at a frame rate regardless of whether the
original frame bit sum is even or odd. The data word in which the value substitution is made is the
first Y sample in the first active picture line of every other frame. The specific word and line for
each signal format is listed in Table 34 as the polarity control word.
3.4 The sequence 192.00 (300h or C0.0h), 102.00 (198h or 66.0h) and 128.00 (200h or 80.0h),
68.00 (110h or 44.0h) applied to C and Y samples results in shades of purple and gray, respectively.
Reversing the C and Y ordering for each of these two sequences results in lighter and darker shades
of green, respectively. Table 34 illustrates one ordering of each of the two sequences, but either
ordering of the data values for each sequence is permitted by this Annex.
If the ordering described in § 3.1 is reversed, then the polarity control word described in § 3.3 is
changed to 128.00 (200h or 80.0h). The polarity control word in either case is located at the first Y
sample in the first active picture line in the field(s) specified in § 3.3.
TABLE 34
SDI checkfield sample values
Part 1 Part 2
System 1125/60/2:1 1250/50/2:1 60/I, 30/PsF, 60/P, 30/P,
50/I, 25/PsF, 50/P, 25/P,
24/PsF 24/P
Number of active Y 1920
samples per line
Number of active lines 1035 1152 1080
First line 41 (field 1) 45 (field 1) 21 (field/segment 1) 42
603 (field 2) 670 (field 2) 584 (field/segment 2)
Last line (range) 295-302 329-335 287-293 578-585
(field 1) (field 1) (field/segment 1)
858-865 954-960 850-856
(field 2) (field 2) (field/segment 2)
Equalizer Data values(1) Samples
test signal
192.00 CB 0 ... 3836
102.00 Y 1 ... 3837
192.00 CR 2 ... 3838
102.00 Y 3 ... 3839
Polarity
control word (Every other frame)
Data value(1),(2) Line 41 Line 45 Line 21 Line 42
100.00 Y Sample 1 Sample 1 Sample 1 Sample 1
First line 296-303 330-336 288-294 579-586
(range)(3) (field 1) (field 1) (field/segment 1)
859-866 955-961 851-857
(field 2) (field 2) (field/segment 2)
Last line 557 (field 1) 620 (field 1) 560 (field/segment 1) 1121