Intel Baytrail-M Platform: A B C D E

A B C D E
Intel BayTrail-M Platform
1 1
Date : 2013/05/22
Version 0.1
2 2
3 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom Bay Trail M LA-A821P 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 01, 2013 Sheet 1 of 40
A B C D E
A B C D E
204pin DDR3L-SO-DIMM X1
P.14
Memory BUS
XDP-SFF-26Pin Dual Channel
1
LVDS Conn. LVDS Translator Debug 1.35V DDR3L 1066/1333

1
Conn. P.13 204pin DDR3L-SO-DIMM X1

Colay eDP P.17 RTD2132R-CG
P.16 P.15
DDI Port1
DDI Port0
HDMI Conn. USB2.0 x3 port 0 port 1 port 3
P.18
VALLEYVIEW-M USB3.0 x1
USB 3.0 USB 2.0 USB HUB
RJ45 PCIE x4 port 2 Conn
RTL8106E-CG 10/100M Conn P.23 P.23
FE1.1s(STT)
P.23
P.21
2
RTL8111G-CG 1G 2
P.21 SOC port 1 port 3
SATA II x2 port 2
FCBGA 1170 Pin
port 1 port 0 PCIE x4 port3 PCIeMini Card Int. Camera
Touch Screen
WLAN PCIe port 3
SATA SSD SATA HDD P.17 P.17
page 05~12 P.20
NGFF B P.22
TYPE Conn. P.19
LPC BUS
SPI HD Audio
NGFF E TYPE
3
SPI ROM HDA Codec WLAN PCIe port 4 3
1.8V (8MB) KB9012QF A4 ALC259 P.24 P.22

P.08
P.25
Sub Boards RTC CKT. P.8
CardReader Int.KBD SPK Conn
P.22
GL834L(HUB Port0) P.26
+USB(Port 2)+ DC/DC Interface CKT.
P.26
Audio Combo jack P.22
4 Power Circuit DC/DC 4
Touch pad/LED B P.28~P.36

P.22
2014/01/03 2014/01/03 Title
Issued Date Deciphered Date Block Diagrams
LED/Power On/Off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P.24 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
Bay Trail M LA-A821P 0.1
A B C D E
A B C D E
Voltage Rails Board ID / SKU ID Table for AD channel

Power Plane Description S0 S3 S4/S5 Vcc 3.3V +/- 5%
VIN 19V Adapter power supply ON ON ON Ra/Rc/Re 100K +/- 5%
BATT+ 12V Battery power supply ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON 0 0 0 V 0 V 0 V
1 1
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+RTCVCC RTC Battery Power ON ON ON 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.0VALW +1.0v Always power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+1.8VALW +1.8v Always power rail ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3VALW +3.3v Always power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+5VALW +5.0v Always power rail ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
+1.35V +1.35V power rail for DDR3L ON ON OFF
+SOC_VCC Core voltage for SOC ON OFF OFF BOARD ID Table
+SOC_VNN GFX voltage for SOC ON OFF OFF
Board ID PCB Revision BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
0 Item BOM Structure
+1.0VS +1.0v system power rail ON OFF OFF
2 1 Unpop @ 2
2 Connector CONN@
3 XDP (Debug Port) XDP@
4 EMC requirement EMC@
5 EMC requirement unpop @EMC@
+3VS +3.3v system power rail ON OFF OFF
6 TPM TPM@
+5VS +5.0v system power rail ON OFF OFF
Touch Screen TS@
R short RS@
Test Point TEST@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
3
BOM config 3
EC SM Bus1 address EC SM Bus2 address PCB P/N

EVT BOM config
Device Address Device Address
Smart Battery 0001 011X b
SOC SM Bus address 43 level BOM table

Device Address
SO-DIMM A (JDIMM1) A0h
43 Level Description BOM Structure
SO-DIMM B (JDIMM2) A2h
4 4

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date Notes List
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
0.1
Bay Trail M LA-A821P
A B C D E
5 4 3 2 1
Power ON
+RTCVCC
T0
RTCRST#
D
EC_ON D
+3VALW/+5VALW
+1.0VALW
+1.8VALW
+1.2VALW
ON/OFFBTN#
EC_RSMRST# 100 ms
100 ms
PBTN_OUT# 20 ms 100 ms
PMC_SLP_S4#
SUSPWRDNACK
120 ms
SYSON
+1.35V
DDR_PWROK
C C
PMC_SLP_S3#
VR_ON 20ms
+CORE_VNN
+CORE_VCC
VGET
SUSP# 20ms
+1.0VS
0.446 ms
+1.05VS
0.606 ms
+1.35VS
0.878 ms
+1.5VS
0.973 ms
+1.8VS
1.171 ms
+3VS
1.757 ms
B
+5VS B
2.343 ms
+0.675VS
6.774 ms
50 ms
KBRST#
100 ms
PMC_CORE_PWROK
DDR_CORE_PWROK
PMC_PLTRST#
T0: +RTCVCC stable to RTCRST# high > 9ms

T1: VR ramp up time from 10% to 90% voltage level < 2ms
T2 :Rail to subsequent rail turn on delay < 2ms
T3 :+VALWAS stable to EC_RSMRST# high > 10ms
T4 :+VS rails stable to PMC_CORE_PWROK > TBD
NOTE:
A
1. T1 and T2 are recommended time for all the VR rails A
unless specified otherwise. The VR ramp up time T2 and
subsequent rail delay T3 are put in place to avoid
inrush current which may be caused by multiple loads
turning on simultaneously or fast charging of VR output
decoupling.
2. Platform devices other than SOC sequencing are not Issued Date 2014/01/03 Deciphered Date 2014/01/03 Title
Power Sequence
explicitly shown as they are not limited by the SOC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
sequencing requirement. C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Bay Trail M LA-A821P
5 4 3 2 1
5 4 3 2 1
D D
UC1A UC1B
<14> DDR_A_MA[0..15] K45 M36 DDR_A_D[0..63] <14> <15> DDR_B_MA[0..15] AY45 BG38 DDR_B_D[0..63] <15>
DDR_A_MA0 DDR_A_D0 DDR_B_MA0 DDR_B_D0
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 DDR_B_MA1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40 DDR_B_D1
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 DDR_B_MA2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42 DDR_B_D2
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 DDR_B_MA3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42 DDR_B_D3
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 DDR_B_MA4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 DDR_B_D4
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 DDR_B_MA5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36 DDR_B_D5
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 DDR_B_MA6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42 DDR_B_D6
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 DDR_B_MA7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44 DDR_B_D7
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 DDR_B_MA8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32 DDR_B_D8
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 DDR_B_MA9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32 DDR_B_D9
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 DDR_B_MA10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36 DDR_B_D10
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 DDR_B_MA11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37 DDR_B_D11
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 DDR_B_MA12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33 DDR_B_D12
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 DDR_B_MA13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33 DDR_B_D13
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 DDR_B_MA14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37 DDR_B_D14
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 DDR_B_MA15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38 DDR_B_D15
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36 DDR_B_D16
<14> DDR_A_DM[0..7] G36 DRAM0_DQ_16 G38 <15> DDR_B_DM[0..7] BD38 DRAM1_DQ_16 AT36
DDR_A_DM0 DDR_A_D17 DDR_B_DM0 DDR_B_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 DDR_B_DM1 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40 DDR_B_D18
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 DDR_B_DM2 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40 DDR_B_D19
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 DDR_B_DM3 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36 DDR_B_D20
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 DDR_B_DM4 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36 DDR_B_D21
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 DDR_B_DM5 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42 DDR_B_D22
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 DDR_B_DM6 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40 DDR_B_D23
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 DDR_B_DM7 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41 DDR_B_D24
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41 DDR_B_D25
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45 DDR_B_D26
<14> DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 <15> DDR_B_RAS# AV44 DRAM1_RAS# DRAM1_DQ_26 BH46
DDR_A_D27 DDR_B_D27
<14> DDR_A_CAS# H51 DRAM0_CAS# DRAM0_DQ_27 C40 <15> DDR_B_CAS# BB51 DRAM1_CAS# DRAM1_DQ_27 BG40
DDR_A_D28 DDR_B_D28
<14> DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 <15> DDR_B_WE# DRAM1_WE# DRAM1_DQ_28
B40 DDR_A_D29 BH40 DDR_B_D29
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48 DDR_B_D30
<14> DDR_A_BS0 K44 DRAM0_BS_0 DRAM0_DQ_30 B47 <15> DDR_B_BS0 AY44 DRAM1_BS_0 DRAM1_DQ_30 BH47
DDR_A_D31 DDR_B_D31
<14> DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 <15> DDR_B_BS1 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32 DDR_B_D32
<14> DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 K51 <15> DDR_B_BS2 DRAM1_BS_2 DRAM1_DQ_32 AY51
C DDR_A_D33 DDR_B_D33 C
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52 DDR_B_D34
<14> DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 T51 <15> DDR_B_CS0# DRAM1_CS_0# DRAM1_DQ_34 AP51
DDR_A_D35 DDR_B_D35
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51 DDR_B_D36
<14> DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 <15> DDR_B_CS2# DRAM1_CS_2# DRAM1_DQ_36 AW53
DDR_A_D37 DDR_B_D37
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51 DDR_B_D38
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53 DDR_B_D39
<14> DDR_A_CKE0 D48 DRAM0_CKE_0 DRAM0_DQ_39 T47 <15> DDR_B_CKE0 BE46 DRAM1_CKE_0 DRAM1_DQ_39 AP47
DDR_A_D40 DDR_B_D40
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45 DDR_B_D41
<14> DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 <15> DDR_B_CKE2 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40
DDR_A_D42 DDR_B_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41 DDR_B_D43
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48 DDR_B_D44
<14> DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 T50 <15> DDR_B_ODT0 DRAM1_ODT_0 DRAM1_DQ_44 AP50
DDR_A_D45 DDR_B_D45
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42 DDR_B_D46
<14> DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 <15> DDR_B_ODT2 DRAM1_ODT_2 DRAM1_DQ_46 AH40
DDR_A_D47 DDR_B_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45 DDR_B_D48
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47 DDR_B_D49
<14> DDR_A_CLK0 M48 DRAM0_CKP_0 DRAM0_DQ_49 AD48 <15> DDR_B_CLK0 AV48 DRAM1_CKP_0 DRAM1_DQ_49 AF48
DDR_A_D50 DDR_B_D50
<14> DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 AD50 <15> DDR_B_CLK0# DRAM1_CKN_0 DRAM1_DQ_50 AF50
DDR_A_D51 DDR_B_D51
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48 DDR_B_D52
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50 DDR_B_D53
<14> DDR_A_CLK2 DRAM0_CKP_2 DRAM0_DQ_53 DRAM1_DQ_53
P48 AB44 DDR_A_D54 AT50 AH44 DDR_B_D54
<14> DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 Y45 <15> DDR_B_CLK2 AT48 DRAM1_CKP_2 DRAM1_DQ_54 AK45
DDR_A_D55 DDR_B_D55
DRAM0_DQ_55 V52 <15> DDR_B_CLK2# DRAM1_CKN_2 DRAM1_DQ_55 AM52
DDR_A_D56 DDR_B_D56
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51 DDR_B_D57
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53 DDR_B_D58
<14> DDR_A_RST# DRAM0_DRAMRST# DRAM0_DQ_58 DRAM1_DQ_58
AC51 DDR_A_D59 AT41 AG51 DDR_B_D59
DRAM0_DQ_59 W53 <15> DDR_B_RST# DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DDR_A_D60 DDR_B_D60
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51 DDR_B_D61
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52 DDR_B_D62
+DDR_SOC_VREF DRAM_VREF 0.675V DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51 DDR_B_D63
DRAM0_DQ_63 DRAM1_DQ_63
100K_0402_5% 1 2 RC1 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40 DDR_B_DQS0
100K_0402_5% 1 2 RC2 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40 DDR_B_DQS#0
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35 DDR_B_DQS1
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34 DDR_B_DQS#1
DRAM0_DQSN_1 D40 DDR_A_DQS2 DRAM1_DQSN_1 BA38 DDR_B_DQS2
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38 DDR_B_DQS#2
B <32> DDR_PWROK AB42 DRAM_VDD_S4_PWROK DRAM0_DQSN_2 B44 DRAM1_DQSN_2 BH44 B
DDR_A_DQS3 DDR_B_DQS3
<8> DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 C43 DRAM1_DQSP_3 BG43
DDR_A_DQS#3 DDR_B_DQS#3
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53 DDR_B_DQS4
23.2_0402_1% 1 2 RC3 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52 DDR_B_DQS#4
29.4_0402_1% 1 2 RC4 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42 DDR_B_DQS5
162_0402_1% 1 2 RC5 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44 DDR_B_DQS#5
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47 DDR_B_DQS6
DRAM0_DQSP_6 Y48 DRAM1_DQSP_6 AK48
Follow CRB v1.15 DRAM0_DQSN_6
DDR_A_DQS#6
DRAM1_DQSN_6
DDR_B_DQS#6
AF40 AB52 DDR_A_DQS7 AH52 DDR_B_DQS7
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51 DDR_B_DQS#7
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] <14> DDR_B_DQS[0..7] <15>
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] <14> DDR_B_DQS#[0..7] <15>
VALLEYVIEW-M_FCBGA1170 VALLEYVIEW-M_FCBGA1170
Close To SOC Pin
+1.35V +DDR_SOC_VREF
1 2
RC6 1
4.7K_0402_1%
CC1
1 2 .1U_0402_16V7K
RC7 2
4.7K_0402_1%
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC Memory DDR3L
C 0.1
5 4 3 2 1
5 4 3 2 1
UC1C
AV3 AG3
<18> H_HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 H_EDP_TXP0 <16>
AV2 1.0V 1.0V AG1
<18> H_HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 H_EDP_TXN0 <16>
AT2 AF3
<18> H_HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 H_EDP_TXP1 <16>
AT3 AF2
<18> H_HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 H_EDP_TXN1 <16>
AR3 AD3
<18> H_HDMI_TX0+ DDI0_TXP_2 DDI1_TXP_2
AR1 AD2
D <18> H_HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2 D
AP3 AC3
<18> H_HDMI_TXC+
AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP Panel IEDP@
HDMI <18> H_HDMI_TXC- DDI0_TXN_3 DDI1_TXN_3 EC_ENBKL_R1 2
EC_ENBKL <16,25>
AL3 1.0V AK3 H_EDP_AUXP <16> RC87 0_0402_5%
AL1 DDI0_AUXP DDI1_AUXP AK2
DDI0_AUXN 1.0V DDI1_AUXN H_EDP_AUXN <16>
D27 K30 +1.8VS
<18,7> HDMI_HPD# DDI0_HPD 1.8V 1.8V DDI1_HPD H_EDP_HPD# <17>
C26 1.8V 1.8V P30 DDI1_ENABLE RC8 1 2 2.2K_0402_5% +1.8VS
<18> UMA_HDMI_DATA DDI0_DDCDATA DDI1_DDCDATA
5
C28 1.8V 1.8V G30 UC6
<18> UMA_HDMI_CLK DDI0_DDCCLK DDI1_DDCCLK 1
P
B28 N30 DDI1_ENVDD NC 4
DDI0_VDDEN 1.8V DDI1_VDDEN Y EC_ENBKL_R <17>
C27 1.8V J30 DDI1_ENBKL DDI1_ENBKL 2
DDI0_BKLTEN DDI1_BKLTEN A
G
B26 1.8V M30 DDI1_PWM
DDI0_BKLTCTL DDI1_BKLTCTL NL17SZ07DFT2G_SC70-5
3
AH3 SA00004BV00
1 RC9 2 DDI0_RCOMPP AK12 VSS_AH3 AH2 Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13 DDI0_RCOMP_P VSS_AH2
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13 +1.8VS
AM3 RESERVED_AM13 RESERVED_AH13 AF14
AM2 VSS_AM3 RESERVED_AF14 AF13
Follow CRB v1.15 0ohm till to GND
VSS_AM2 RESERVED_AF13
5
UC7
BA3 1
P
C VGA_RED NC C
AY2 4
VGA_BLUE Y LCD_ENVDD <17>
BA1 DDI1_ENVDD 2
VGA_GREEN A
G
AW1
VGA_IREF AY3 NL17SZ07DFT2G_SC70-5
3
VGA_IRTN SA00004BV00
3.3V BD2
VGA_HSYNC BF2
3.3V VGA_VSYNC
BC1 +1.8VS
3.3V VGA_DDCCLK
3.3V BC2
VGA_DDCDATA 1 LVDS@ 2
SOC_PWM_TL <16>
5
T2 T7 UC8 RC64 0_0402_5%
T3 RESERVED_T2 RESERVED_T7 T9 1
P
AB3 RESERVED_T3 RESERVED_T9 AB13 NC 4 1 IEDP@ 2
RESERVED_AB3 RESERVED_AB13 Y SOC_PWM_EDP <17>
AB2 AB12 DDI1_PWM 2 RC65 0_0402_5%
RESERVED_AB2 RESERVED_AB12 A
G
Y3 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13 NL17SZ07DFT2G_SC70-5
3
W3 RESERVED_Y2 RESERVED_Y13 V10 SA00004BV00
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14 +3VS
R1 RESERVED_R3 RESERVED_V14 V13 RPC1
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14 SOC_PWM_TL 5 4
B B
AD4 RESERVED_AD6 RESERVED_T14 T13 LCD_ENVDD 6 3
AB9 RESERVED_AD4 RESERVED_T13 T6 SOC_PWM_EDP 7 2
RESERVED_AB9 RESERVED_T6
1
AB7 T4 8 1
@ Y4 RESERVED_AB7 RESERVED_T4 P14
RC10 Y6 RESERVED_Y4 RESERVED_P14 4.7K_0804_8P4R_5%
10K_0402_5% V4 RESERVED_Y6 F34
V6 RESERVED_V4 GPIO_S0_NC_15 M32 RPC2
2
GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28 DDI1_ENBKL 8 1

GPIO_NC14 C29 GPIO_S0_NC_13 GPIO_S0_NC_17 J28 DDI1_ENVDD 7 2
T1 GPIO_S0_NC14 GPIO_S0_NC_18
1
AB14 K34 DDI1_PWM 6 3 0504

GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34 5 4
T2 GPIO_S0_NC_12 GPIO_S0_NC_20
RC11 C30 F32
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28 100K_0804_8P4R_5%
GPIO_S0_NC_22 K28
2
GPIO_S0_NC_23 J34
GPIO_S0_NC_24 N32 +3VS
GPIO_S0_NC_25 D32
Follow CRB v1.15 3 OF 10 GPIO_S0_NC_26
EC_ENBKL_R 1 2
VALLEYVIEW-M_FCBGA1170 4.7K_0402_5%
RB24
GPIO_S0_NC[13]:
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC Display
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
0.1
5 4 3 2 1
5 4 3 2 1
NonUltra@
PCIE_PTX_WLANRX_P4 .1U_0402_16V7K 1 2 CC83
PCIE_PTX_C_WLANRX_P4_M <20>
PCIE_PTX_WLANRX_N4 .1U_0402_16V7K 1 2 CC82
PCIE_PTX_C_WLANRX_N4_M <20>
UC1D
NonUltra@
BF6 AY7
<19> SATA_PTX_DRX_P0 BG7 SATA_TXP_0 PCIE_TXP_0 AY6
<19> SATA_PTX_DRX_N0 SATA_TXN_0 PCIE_TXN_0
HDD
AU16 AT14
D <19> SATA_PRX_C_DTX_P0 AV16 SATA_RXP_0 PCIE_RXP_0 AT13 D
<19> SATA_PRX_C_DTX_N0 SATA_RXN_0 PCIE_RXN_0
BD10 AV6
<22> SATA_PTX_DRX_P1 BF10 SATA_TXP_1 PCIE_TXP_1 AV4
<22> SATA_PTX_DRX_N1 SATA_TXN_1 PCIE_TXN_1
SSD
AY16 AT10
<22> SATA_PRX_C_DTX_P1 BA16 SATA_RXP_1 PCIE_RXP_1 AT9
<22> SATA_PRX_C_DTX_N1 SATA_RXN_1 PCIE_RXN_1
BB10 AT7 PCIE_PTX_LANRX_P3 .1U_0402_16V7K 1 2 CC2
BC10 VSS_BB10 PCIE_TXP_2 AT6 PCIE_PTX_LANRX_N3 PCIE_PTX_C_LANRX_P3 <21>
Follow CRB V1.15 0ohm till to GND .1U_0402_16V7K 1 2 CC3
VSS_BC10 PCIE_TXN_2 PCIE_PTX_C_LANRX_N3 <21>
Follow CRB v1.15 LAN
SOC_SCI# BA12 AP12 PCIE_PRX_C_LANTX_P3
<8> SOC_SCI# DEVSLP_SOC AY14 SATA_GP0 / GPIO_S0_SC_0 PCIE_RXP_2 AP10 PCIE_PRX_C_LANTX_N3 PCIE_PRX_C_LANTX_P3 <21>
1 2 T3 SATA_LED#_SOC AY12 SATA_GP1 / SATA_DEVSLP_0 / GPIO_S0_SC_1 PCIE_RXN_2 Ultra@
PCIE_PRX_C_LANTX_N3 <21> +1.8VS
+1.8VS SATA_LED# / GPIO_S0_SC_2
RC18 10K_0402_5% AP6 PCIE_PTX_WLANRX_P4 .1U_0402_16V7K 1 2 CC4 RPC7
1 RC12 2 SATA_RCOMPP AU18 PCIE_TXP_3 AP4 PCIE_PTX_WLANRX_N4 PCIE_PTX_C_WLANRX_P4 <20>
.1U_0402_16V7K 1 2 CC5 PCIE_CLKREQ_0# 1 8
AT18 SATA_RCOMP_P PCIE_TXN_3 PCIE_PTX_C_WLANRX_N4 <20> 2 7
402_0402_1% SATA_RCOMPN WLAN LAN_CLKREQ#
SATA_RCOMP_N AP9 PCIE_PRX_WLANTX_P4 Ultra@ WLAN_CLKREQ# 3 6
PCIE_RXP_3 AP7 PCIE_PRX_WLANTX_N4 PCIE_PRX_WLANTX_P4 <20> PCIE_CLKREQ_1# 4 5
AT22 PCIE_RXN_3 PCIE_PRX_WLANTX_N4 <20>
MMC1_CLK / GPIO_S0_SC_16 BB7 10K_0804_8P4R_5%
AV20 VSS_BB7 BB5
MMC1_D0 / GPIO_S0_SC_17 VSS_BB5
Follow CRB V1.15 0ohm till to GND
AU22 8411 Pin 36 O/D
AV22 MMC1_D1 / GPIO_S0_SC_18 BG3 PCIE_CLKREQ_0#
C
AT20 MMC1_D2 / GPIO_S0_SC_19 PCIE_CLKREQ_0# / GPIO_S0_SC_3 BD7 PCIE_CLKREQ_1# AZ_BITCLK_HD 1 2
For EMI C
AY24 MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 BG5 LAN_CLKREQ# CC6 @EMC@

AU26 MMC1_D4 / GPIO_S0_SC_21 PCIE_CLKREQ_2# / GPIO_S0_SC_5 BE3 WLAN_CLKREQ# LAN_CLKREQ# <21>
22P_0402_50V8J
AT26 MMC1_D5 / GPIO_S0_SC_22 PCIE_CLKREQ_3# / GPIO_S0_SC_6 BD5 WLAN_CLKREQ# <20>
AU20 MMC1_D6 / GPIO_S0_SC_23 SD3_WP / GPIO_S0_SC_7 HDMI_HPD# <18,6>
MMC1_D7 / GPIO_S0_SC_24 AP14 PCIE_RCOMPP 1 RC13 2
AV26 PCIE_RCOMP_P AP13 PCIE_RCOMPN 402_0402_1%
BA24 MMC1_CMD / GPIO_S0_SC_25 PCIE_RCOMP_N
MMC1_RST# / SATA_DEVSLP_0 / GPIO_S0_SC_26 BB4 RPC3
AY18 RESERVED_BB4 BB3 HDA_SDOUT 8 1
MMC1_RCOMP RESERVED_BB3 AZ_SDOUT_HD <24>
HDA_SYNC 7 2
AZ_SYNC_HD <24>
AV10 HDA_BIT_CLK 6 3
RESERVED_AV10 AZ_BITCLK_HD <24>
BA18 AV9 HDA_RST# 5 4
SD2_CLK / GPIO_S0_SC_27 RESERVED_AV9 AZ_RST_HD# <24>
AY20
BD20 SD2_D0 / GPIO_S0_SC_28 BF20 HDA_RCOMP 49.9_0402_1% 1 2 RC14 33_0804_8P4R_5%
BA20 SD2_D1 / GPIO_S0_SC_29 HDA_LPE_RCOMP BG22 HDA_RST# EMC@
BD18 SD2_D2 / GPIO_S0_SC_30 HDA_RST# / LPE_I2S0_CLK / GPIO_S0_SC_8 BH20 HDA_SYNC
BC18 SD2_D3_CD# / GPIO_S0_SC_31 HDA_SYNC / LPE_I2S0_FRM / GPIO_S0_SC_9 BJ21 HDA_BIT_CLK
SD2_CMD / GPIO_S0_SC_32 HDA_CLK / LPE_I2S0_DATAOUT / GPIO_S0_SC_10 BG20 HDA_SDOUT
HDA_SDO / LPE_I2S0_DATAIN / GPIO_S0_SC_11 BG19
HDA_SDI0 / LPE_I2S1_CLK / GPIO_S0_SC_12 BG21 AZ_SDIN0_HD <24>
AY26 HDA_SDI1 / LPE_I2S1_FRM / GPIO_S0_SC_13 BH18 T4
AT28 SD3_CLK / GPIO_S0_SC_33 HDA_DOCKRST# / LPE_I2S1_DATAOUT / GPIO_S0_SC_14 BG18 T5
BD26 SD3_D0 / GPIO_S0_SC_34 HDA_DOCKEN# / LPE_I2S1_DATAIN / GPIO_S0_SC_15 T6
B GPIO_S0_SC_63: GPIO_S0_SC_65: B
AU28 SD3_D1 / GPIO_S0_SC_35 BF28
SD3_D2 / GPIO_S0_SC_36 LPE_I2S2_CLK / SATA_DEVSLP_1 / GPIO_S0_SC_62 DEVSLP1 <22> BIOS/EFI Boot Strap (BBS) Security Flash Descriptors
BA26 BA30 GPIO_S0_SC_63 BIOS Boot Selection 0 = Override
BC24 SD3_D3 / GPIO_S0_SC_37 LPE_I2S2_FRM / GPIO_S0_SC_63 BD28
AV28 SD3_CD# / GPIO_S0_SC_38 LPE_I2S2_DATAIN / GPIO_S0_SC_64 BC30 GPIO_S0_SC_65 0 = LPC 1 = Normal Operation
BF22 SD3_CMD / GPIO_S0_SC_39 LPE_I2S2_DATAOUT / GPIO_S0_SC_65 1 = SPI (Internal PU)
BD22 SD3_1P8EN / GPIO_S0_SC_40 P34 +1.8VS +1.8VS
SD3_PWREN# / GPIO_S0_SC_41 RESERVED_P34 N34 RC17
BF26 RESERVED_N34 33.2_0402_1%
SD3_RCOMP
1
AK9 1 2
RESERVED_AK9 +1.0VS
AK7
RESERVED_AK7 RC15 RC16
C24 10K_0402_5% 10K_0402_5%
PROCHOT# H_PROCHOT# <25>
4 OF 10 Internal PD 2K EC programing :
2
2 GPIO_S0_SC_63 GPIO_S0_SC_65 "High"for Flash BIOS
VALLEYVIEW-M_FCBGA1170 ESD@
1
CC7 D
10P_0402_50V8J 2
1 TXE_DBG <25>
G
S QC1
3
BSS138W-7-F_SOT323-3
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC SATA/PCI-E/HDA
Size
Document Number Rev
B 0.1
5 4 3 2 1
5 4 3 2 1
GCLK@
2 1
<20> XTAL_25M_IN_R
0_0402_5% RCL6
Place near to YC1
XTAL_25M_IN +1.8VS +3VS
+1.8VALW
1
Close To SOC <1000mil
1
+1.8VALW RC20
1
YC1 NOGCLK@ 1M_0402_5%
RC25 1 XDP@ 2 51_0402_5% XDP_H_PRDY# 25MHZ_10PF_7V25000014 NOGCLK@ RC21
5
UC2 4.7K_0402_5% RC22
2
RP52 1 3 XTAL_25M_OUT 1.8V 1 3.3V 2.2K_0402_5%
2
1 8 XDP_H_TDI 1 3 NC 4
1 1 PLT_RST_BUF# <20,21,25>
2
2 7 XDP_H_TMS CC9 GND GND CC10 PMC_PLTRST# 2 Y DC2
A
G
3 6 XDP_H_TCK 18P_0402_50V8J 18P_0402_50V8J PMC_ACIN 2 1
2 4 ACIN <25,30>
4 5 XDP_H_TRST# NOGCLK@ NOGCLK@ NL17SZ07DFT2G_SC70-5
3
D 2 2 D
SA00004BV00 RB751V40_SC76-2
51_0804_8P4R_5%
XDP@
PLT_RST Buffer
UC1E
XTAL_25M_IN AH12 AU34

XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 +1.8VALW
AD9 SIO_UART1_RTS# / GPIO_S0_SC_72 AY34 RPC4
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 PMC_PCIE_WAKE# 1 8
RC23 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34 PMC_BATLOW# 2 7
RC24 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34 GPIO_S5_14 3 6
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 LS_OE 4 5 +1.8VALW +3VL
AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 UC3
AD12 RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77 10K_0804_8P4R_5% 2 19
RESERVED_AD12 VCCA VCCB
AF6 32.768k output PMC_SLP_S3# 1 20
AF4 PCIE_CLKN_0 D26 3 A1 B1 18 EC_SLP_S3# <25>
FOR EMI/ESD Require 01/15 PMC_SLP_S4#
PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 4 A2 B2 17 EC_SLP_S4# <25>
SOC_KBRST#
PMC_SUSCLK_0 / GPIO_S5_12 CLK_EC <20> A3 B3 KB_RST# <25>
AF9 F18 SOC_LID_OUT# 5 16
AF7 PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 F22 A4 B4 EC_LID_OUT# <25>
PMC_SLP_S4# XDP_RSTBTN# 1 2 SOC_SERIRQ 6 15
PCIE_CLKP_1 PMC_SLP_S4# D22 <9> SOC_SERIRQ 7 A5 B5 14 SERIRQ <25>
PMC_SLP_S3# CC11 ESD@ SOC_SMI#
PMC_SLP_S3# J20 8 A6 B6 13 EC_SMI# <25>
GPIO_S5_14 .1U_0402_16V7K SOC_SCI#
AK4 GPIO_S5_14 D20 <7> SOC_SCI# 9 A7 B7 12 EC_SCI# <25>
PMC_ACIN PMC_PWRBTN#
<21> CLK_LAN# PCIE_CLKN_2 PMC_ACPRESENT A8 B8 PBTN_OUT# <25>
LAN AK6 F26 PMC_PCIE_WAKE#
<21> CLK_LAN PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 PMC_BATLOW# PMC_PLTRST# 1 2 LS_OE 10 11
AM4 PMC_BATLOW# J26 PMC_PWRBTN# CC12 ESD@ OE GND
<20> CLK_WLAN# AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9
WLAN 0.01U_0402_16V7K TXB0108PWR_TSSOP20
<20> CLK_WLAN PCIE_CLKP_3 PMC_RSTBTN# F20 XDP_RSTBTN# <13>
PMC_PLTRST# PMC_PLTRST# <13>
AM9 J24 GPIO_S5_17
AM10 RESERVED_AM9 GPIO_S5_17 G18 T15
RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18
C C
C11 RTC_TEST# EC_RSMRST# 1 2
BH7 ILB_RTC_TEST# C12 RTC_TEST# <13> +1.8VS
RTC_RST# RC26 100K_0402_5%
BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST#
BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 GPIO94
BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# PMC_CORE_PWROK 1 2
PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# EC_RSMRST# <13,25> PROJECT_ID
BH6 B7 PMC_CORE_PWROK CC13 ESD@
PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK PMC_CORE_PWROK <13,25>
1
BJ9 .1U_0402_16V7K
PMC_PLT_CLK_5 / GPIO_S0_SC_101
RTC domain +1.0VS RC83
Ultra 0
C9 ILB_RTC_X1
D14 ILB_RTC_X1 A9 ILB_RTC_X2
10K_0402_5% Non-Ultra 1
<13> XDP_H_TCK TAP_TCK ILB_RTC_X2
1
G12 B8 ILB_RTC_EXTPAD 1 2
<13> XDP_H_TRST#
2
F14 TAP_TRST# ILB_RTC_EXTPAD P22 CC14 RC37
<13> XDP_H_TMS TAP_TMS RTC_VCC_P22 +RTCVCC
F12 .1U_0402_16V7K 73.2_0402_1% SSD_DETECT#
<13> XDP_H_TDI G16 TAP_TDI SSD_DETECT# <22>
<13> XDP_H_TDO D18 TAP_TDO
<13> XDP_H_PRDY#
2
TAP_PRDY#
1
F16 B24 VR_SVID_ALERT#_SOC RC38 1 2 20_0402_1%
<13> XDP_H_PREQ_BUF# AT34 TAP_PREQ# SVID_ALERT# A25 VR_SVID_ALRT# <35>
VR_SVID_DATA_SOC RC39 1 2 16.9_0402_1% RC84
RESERVED_AT34 SVID_DATA C25 VR_SVID_DAT <35>
SVID_CLK VR_SVID_CLK <35> 10K_0402_5%
RPC5 SOC_SPI_CS0# C23 @
SPI_CS0# 1 8 SOC_SPI_CS0# T8 C21 PCU_SPI_CS_0#
2
SPI_MISO 2 7 SOC_SPI_MISO SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 SSD_DETECT#
SPI_CLK 3 6 SOC_SPI_CLK SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32
4 5 C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 TP_INTR# <22>
SPI_MOSI SOC_SPI_MOSI SOC_SPI_CLK
PCU_SPI_CLK 1 2
+1.8VS
22_0804_8P4R_5% RC85 10K_0402_5%
EMC@ SOC_KBRST# B18
B16 GPIO_S5_0 K24
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24
A17 GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 M20 XDP_OBSDATA_A0 <13>
C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 XDP_OBSDATA_A1 <13> +3VS +1.35VS
SOC_LID_OUT#
GPIO_S5_4 GPIO_S5_25 XDP_OBSDATA_A2 <13>
C16 M18 GCLK@
B14 GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 K18 XDP_OBSDATA_A3 <13> 2 1
GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 <20> ILB_RTC_X1_R
1
SOC_SMI# C15 K20 0_0402_5% RCL7
GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22 RC27
GPIO_S5_29 Place near to YC2
M24 10K_0402_5%
GPIO_S5_30
5
ILB_RTC_X1 UC4
C13 ILB_RTC_X2 NOGCLK@ VRTC 1 1.35V
2
B A13 GPIO_S5_8 1 2 NC 4 B
C19 GPIO_S5_9 AV32 2 Y DDR_CORE_PWROK <5>
RC28 10M_0402_5% PMC_CORE_PWROK
GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 A
G
BA28
SIO_SPI_MISO / GPIO_S0_SC_67 AY28 NL17SZ07DFT2G_SC70-5
3
1 RC29 2 GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30 NOGCLK@ SA00004BV00
49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69 YC2 1 2
VALLEYVIEW-M_FCBGA1170 1 1
CC15 32.768KHZ_12.5PF_Q13FC135000040
18P_0402_50V8J CC16
NOGCLK@ 18P_0402_50V8J
2 2 NOGCLK@
+BIOS_SPI +1.8VALW
1
+RTCVCC
SPI ROM ( 8MByte ) 1.8V

RC32 1 RS@ 2 0_0402_5% CC17
+BIOS_SPI RC30 1U_0402_6.3V6K
2 +RTCBATT
CC19 1 2 .1U_0402_16V7K 20K_0402_1%
1 2 RTC_TEST#
1
UC5 1 2 RTC_RST#
RC33 1 2 3.3K_0402_5% SPI_CS0# 1 8 RC34 1 2 3.3K_0402_5% RC31 10mil
2 CS# VCC 7
SPI_MISO SPI_HOLD# 20K_0402_1% 1 Check Intel DC1
DO(IO1) HOLD#(IO3)
1
RC35 1 2 3.3K_0402_5% SPI_WP# 3 6 SPI_CLK @ +RTCVCC BAS40-04_SOT23-3

4 WP#(IO2) CLK 5 SPI_MOSI CC18 JCMOS
GND DI(IO0) 1U_0402_6.3V6K SHORT PADS
2
2
W25Q64DWSSIG_SO8 2
Reserve for EMI(Near SPI ROM) +3VL
Clear CMOS 1
RTC_RST CC8
.1U_0402_16V7K
1 2 2 1 SPI_CLK
close to RAM door
CC20 @EMC@ RC36 @EMC@ 2
10P_0402_50V8J 33_0402_5%
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC CLK/PMU/SPI
C 0.1
5 4 3 2 1
5 4 3 2 1
UC1F
D D
PASSWORD_CLEAR# G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
1
@ M3 P6
JPW L1 GPIO_S5_32 RESERVED_P6 P7
SHORT PADS K2 GPIO_S5_33 RESERVED_P7
2
K3 GPIO_S5_34
M2 GPIO_S5_35 M7
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
P2 GPIO_S5_37 USB3_REXT0 RC40
L3 GPIO_S5_38 P10 1.24K_0402_1%
GPIO_S5_39 RESERVED_P10 P12
RESERVED_P12
M4
J3 RESERVED_M4 M6
P3 GPIO_S5_40 RESERVED_M6
LAN_EN H3 GPIO_S5_41 D4
<21> LAN_EN GPIO_S5_42 USB3_RXP0 U3RXDP1 <23>
B12 E3
GPIO_S5_43 USB3_RXN0 U3RXDN1 <23>
K6
RIGHT PORT REAR(3.0)
M16 USB3_TXP0 K7 U3TXDP1 <23>
<23> USB20_P0 K16 USB_DP0 USB3_TXN0 U3TXDN1 <23>
RIGHT PORT REAR(2.0) <23> USB20_N0 USB_DN0
J14
<23> USB20_P1 G14 USB_DP1
RIGHT PORT FRONT(S&C) <23> USB20_N1 USB_DN1
K12
<22> USB20_P2 USB_DP2
LEFT PORT J12
<22> USB20_N2 USB_DN2
K10
<23> USB20_P3 H10 USB_DP3 H8
USB Hub <23> USB20_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
1K_0402_1% 1 2 RC41 ICLK_USB_TERMP D10
1K_0402_1% 1 2 RC42 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS
RESERVED_H5
C C
USB_OC0# C20
USB_OC_0# / GPIO_S5_19
1
USB_OC1# B20
USB_OC_1# / GPIO_S5_20 RC43 @
10K_0402_5%
RC45 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:
2
+1.8VALW 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
RPC8 2 1 BD14 DBG_UART_TXD T13
USB_CHG_OC# <23,25> GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable
1
1 8 USB_OC0# DC3 RB751V40_SC76-2 @ BC14
2 7 USB_OC1# RC47 1 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 RC48 @ 1 = Disable
3 6 LAN_EN 2 1 0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16 Reference EDS Page 216
USB_OC#1 <22,25> GPIO_S0_SC_60 10K_0402_5%
4 5 PASSWORD_CLEAR# DC4 RB751V40_SC76-2 BC16 DBG_UART_RXD T14
GPIO_S0_SC_61 / PCU_UART_RXD
2
10K_0804_8P4R_5% B4
B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <24>
E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE BH22 22_0402_5% 1 @EMC@2 RC79
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23 22_0402_5% 1 @EMC@2 RC80
PM_I2CSDA1 <22>
1 2 A7 SIO_I2C0_CLK / GPIO_S0_SC_79 PM_I2CSCL1 <22>
HSIC_RCOMP
RC49 45.3_0402_1% USB_HSIC_RCOMP
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1%1 2 RC50 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
<25> LPC_AD0 BJ17 ILB_LPC_AD_0 / GPIO_S0_SC_42 BG25
<25> LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25
ILB_LPC_CLK_0 : Output of 25MHz, <25> LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
<25> LPC_AD3 ILB_LPC_AD_3 / GPIO_S0_SC_45
BG17
<25> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
22_0402_5% 1 EMC@ 2 RC51 LPC_CLK_0 BG15 BG26
<25> LPC_CLK_EC BH14 ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84 BH26
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage BG16
BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
<8> SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
B SIO_I2C4_CLK / GPIO_S0_SC_87 B
BH28
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28
PCU_SMB_CLK BH10 PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89
PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
2 1 LPC_CLK_0 PCU_SMB_ALERT# / GPIO_S0_SC_53 BJ29
CC21 @EMC@ SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
10P_0402_50V8J SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
BH30 GPIO_S0_SC_92 T11

GPIO_S0_SC_092 BG30 GPIO_S0_SC_93
GPIO_S0_SC_093
T12 PDA (Platform Debug Assistant) Test Points
6 OF 13
VALLEYVIEW-M_FCBGA1170
+1.8VS +1.8VS
RPC6
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
8 1
Pull High at EC side
4.7K_0804_8P4R_5%
2
G
1 3 PCU_SMB_CLK
<14,15,20,22,25> EC_SMB_CK2
DDR(15,16) QC3
D
S
2
G
Minicard(21)
1 3 PCU_SMB_DATA
A
EC(24) <14,15,20,22,25> EC_SMB_DA2
QC4 A
D

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC USB/LPC/SMBus
C 0.1
5 4 3 2 1
5 4 3 2 1
+1.35V
D
15000mA +SOC_VCC UC1G 20mil D
For EVT measurement PJ1 JP@
AA27 AD38 DRAM_VDD_S4_CLK RC54 1 2 0_0402_5%
AA29 CORE_VCC_S0iX_AA27 DRAM_VDD_S4_AD38 AF38
AA30 CORE_VCC_S0iX_AA29 DRAM_VDD_S4_AF38 JUMP_43X118
AC27 CORE_VCC_S0iX_AA30 A48 CC23 1 2 1U_0402_6.3V6K PJ2 JP@
AC29 CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48 AK38 CC24 1 2 .1U_0402_16V7K
AC30 CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
AD29 CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42 BB46
AD30 CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 BD49
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
AG27 CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53 BF44 +1.35V_SOC
AG29 CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 CC25 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 CC26 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 CC27 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 CC28 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42
C CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 C
Y29 V38
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38
T9 TP2_CORE_VCC_S0iX AA22
TP2_CORE_VCC_S0iX
10000mA +SOC_VNN +1.35VS
1056mA
AM22 AG18
AK32 UNCORE_VNN_S3_AM22 ICLK_V1P35_S3_F2_AG18 AJ19
AK30 UNCORE_VNN_S3_AK32 ICLK_V1P35_S3_F1_AJ19
AK29 UNCORE_VNN_S3_AK30 LC1
AK27 UNCORE_VNN_S3_AK29 BD1 VGA_V1P35_S3_F1 1 2
AK25 UNCORE_VNN_S3_AK27 VGA_V1P35_S3_F1_BD1 BLM18AG601SN1D_2P
AK24 UNCORE_VNN_S3_AK25
AK22 UNCORE_VNN_S3_AK24 1 2
AJ24 UNCORE_VNN_S3_AK22 AD36 CC29 10U_0603_6.3V6M
AJ22 UNCORE_VNN_S3_AJ24 DRAM_V1P35_S0iX_F1_AD36
+SOC_VNN +SOC_VCC AG24 UNCORE_VNN_S3_AJ22 AG32
AG22 UNCORE_VNN_S3_AG24 UNCORE_V1P35_S0iX_F2_AG32 V36
AF24 UNCORE_VNN_S3_AG22 UNCORE_V1P35_S0iX_F3_V36 U36 CC30 1 2 22U_0603_6.3V6M
AF22 UNCORE_VNN_S3_AF24 UNCORE_V1P35_S0iX_F4_U36 CC31 1 2 1U_0402_6.3V6K
UNCORE_VNN_S3_AF22
1
AD22 AA25 CC32 1 2 1U_0402_6.3V6K

AC24 UNCORE_VNN_S3_AD22 UNCORE_V1P35_S0iX_F5_AA25 CC33 1 2 1U_0402_6.3V6K
B B
RC55 RC56 AC22 UNCORE_VNN_S3_AC24 CC34 1 2 1U_0402_6.3V6K
100_0402_1% 100_0402_1% AA24 UNCORE_VNN_S3_AC22 CC35 1 2 1U_0402_6.3V6K
AD24 UNCORE_VNN_S3_AA24 CC36 1 2 1U_0402_6.3V6K
2
UNCORE_VNN_S3_AD24 CC37 1 2 1U_0402_6.3V6K

AF19 CC38 1 2 1U_0402_6.3V6K
BB8 UNCORE_V1P35_S0iX_F6_AF19 AG19 CC39 1 2 1U_0402_6.3V6K
<35> VGFX_VSNS P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19
<35> VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13
<35> VCORE_GSNS CORE_VSS_SENSE_N28
1
RC57
100_0402_1%
2
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC Power
B 0.1
5 4 3 2 1
5 4 3 2 1
D D
Follow CRBv1.15
UC1H +1.05VS
202mA
U22 AC32 +1.05VS_SOC 1 2
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32 RC58 0_0402_5%
CC40 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 CC41 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
CC42 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
CC43 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 CC44 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 CC45 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 CC46 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 CC47 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 CC48 1 2 1U_0402_6.3V6K
5487mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6 720mA
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
CC49 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
CC50 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 CC51 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 1 2 AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
CC52 1U_0402_6.3V6K
DRAM_V1P0_S0iX_AJ36
53mA PMU_V1P8_G3_U25
C CC53 1 2 1U_0402_6.3V6K AK35 AA18 C
AK36 DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
1 2 Y36 DRAM_V1P0_S0iX_Y35
CC54 1U_0402_6.3V6K
DRAM_V1P0_S0iX_Y36
84mA
CC55 1 2 1U_0402_6.3V6K AK19 AM30
DDI_V1P0_S0iX 1uF*4 CC56 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 CC57 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4
CC58 1 2 1U_0402_6.3V6K AJ18 DDI_V1P0_S0iX_AK21 UNCORE_V1P8_S3_AN32 U38 CC59 1 2 1U_0402_6.3V6K
AM16 DDI_V1P0_S0iX_AJ18 UNCORE_V1P8_S3_U38 CC60 1 2 1U_0402_6.3V6K
AN29 DDI_V1P0_S0iX_AM16 CC61 1 2 1U_0402_6.3V6K +1.5VS
AN30 VIS_V1P0_S0iX_AN29
VIS_V1P0_S0iX_AN30
58mA
CC62 1 2 22U_0603_6.3V6M V24 AM32
UNCORE_V1P0_S0iX 22uF*3 CC63 1 2 22U_0603_6.3V6M Y22 VIS_V1P0_S0iX_V24 HDA_V1P5_S3_AM32 CC64 1 2 1U_0402_6.3V6K HDA_LPE_V1P5V1P8_S3 1uF*1
1uF*2 CC65 1 2 22U_0603_6.3V6M Y24 VIS_V1P0_S0iX_Y22 +3VALW
CC66 1 2 1U_0402_6.3V6K AF16 VIS_V1P0_S0iX_Y24
CC67 1 2 1U_0402_6.3V6K AF18 UNCORE_V1P0_S3_AF16 N22 +3VALW_SOC 1 2 For EVT measurement
UNCORE_V1P0_S3_AF18
Y18
UNCORE_V1P0_S3_Y18
10mA PCU_V3P3_G3_N22 RC59 0_0402_5%
PCIE_SATA_V1P0_S3 1uF*1 CC68 1 2 1U_0402_6.3V6K G1 N18 CC69 1 2 .1U_0402_16V7K USB_V3P3_G3 0.1uF*1
UNCORE_V1P0_S3 1uF*1 CC70 1 2 1U_0402_6.3V6K AK18 UNCORE_V1P0_S3_G1 USB_V3P3_G3_N18 P18 CC71 1 2 1U_0402_6.3V6K USB_ULPI_V1P8_S3 1uF*1
PCIE_V1P0_S3 1uF*1 CC72 1 2 1U_0402_6.3V6K AM18 PCIE_V1P0_S3_AK18 USB_V3P3_G3_P18 CC73 1 2 1U_0402_6.3V6K PCU_V3P3_G3 1uF*1
VGA_V1P0_S3 1uF*1 CC74 1 2 1U_0402_6.3V6K AM21 PCIE_V1P0_S3_AM18 +3VS
USB_V1P0_S3 0.1uF*1 1 2 AN21 PCIE_V1P0_S3_AM21
CC75 .1U_0402_16V7K
PCIE_V1P0_S3_AN21
13mA
USB3DEV_V1P0_S3 0.01uF*1 CC76 1 2 0.01U_0402_16V7K AN18 AN24 +3VS_SOC 1 2 For EVT measurement
GPIO_V1P0_S3 1uF*1 CC77 1 2 1U_0402_6.3V6K AN19 PCIE_SATA_V1P0_S3_AN18 VGA_V3P3_S3_AN24 RC60 0_0402_5%
SVID_V1P0_S3 1uF*1 CC78 1 2 1U_0402_6.3V6K AF21 SATA_V1P0_S3_AN19 AN27
AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27
B B
M14 UNCORE_V1P0_S0iX_AG21 AM27 1 2 VGA_V3P3_S3 1uF*1
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 CC79 1U_0402_6.3V6K
U19 USB_V1P0_S3_U18
AN25 USB_V1P0_S3_U19 +1.0VALW
GPIO_V1P0_S3_AN25
35mA
V18 USB_HSIC_V1P2_G3 1uF*1
USB_HSIC_V1P2_G3_V18 CC80 1 2 1U_0402_6.3V6K Disable HSIC
If the USB HSIC is not used, pin V18 can be connected
F1 AD16
RESERVED_F1 VSS_AD16 AD18 to either +V1P2A or +V1P0A.
T10 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
A A

Issued Date 2014/01/03 Deciphered Date 2014/01/03 Title
VLV-M SOC Power
Size
Document Number Rev
B 0.1
5 4 3 2 1
5 4 3 2 1
D D
UC1I UC1J UC1K UC1L UC1M
A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3

A15 VSS_A11 VSS_AC36 AC38 AH4 VSS_AG38 VSS_AH47 AH48 AT27 VSS_AT24 VSS_AY36 AY4 BF36 VSS_BF30 VSS_E8 F19 L13 VSS_K9 VSS_U3 U30
A19 VSS_A15 VSS_AC38 AD19 AH41 VSS_AH4 VSS_AH48 AH50 AT30 VSS_AT27 VSS_AY4 AY50 BF4 VSS_BF36 VSS_F19 F2 L19 VSS_L13 VSS_U30 U32
A23 VSS_A19 VSS_AD19 AD21 AH45 VSS_AH41 VSS_AH50 AH51 AT35 VSS_AT30 VSS_AY50 AY9 BG31 VSS_BF4 VSS_F2 F24 L27 VSS_L19 VSS_U32 U40
A27 VSS_A23 VSS_AD21 AD25 AH7 VSS_AH45 VSS_AH51 AH6 AT38 VSS_AT35 VSS_AY9 BA14 BG34 VSS_BG31 VSS_F24 F27 L35 VSS_L27 VSS_U40 U42
A31 VSS_A27 VSS_AD25 AD32 AH9 VSS_AH7 VSS_AH6 AM44 AT4 VSS_AT38 VSS_BA14 BA19 BG39 VSS_BG34 VSS_F27 F30 M19 VSS_L35 VSS_U42 U43
A35 VSS_A31 VSS_AD32 AD33 AJ1 VSS_AH9 VSS_AM44 AM51 AT47 VSS_AT4 VSS_BA19 BA22 BG42 VSS_BG39 VSS_F30 F35 M26 VSS_M19 VSS_U43 U45
A39 VSS_A35 VSS_AD33 AD47 AJ16 VSS_AJ1 VSS_AM51 AM7 AT52 VSS_AT47 VSS_BA22 BA27 BG45 VSS_BG42 VSS_F35 F5 M27 VSS_M26 VSS_U45 U46
A43 VSS_A39 VSS_AD47 AD7 AJ21 VSS_AJ16 VSS_AM7 AN1 AU1 VSS_AT52 VSS_BA27 BA32 BG49 VSS_BG45 VSS_F5 F7 M34 VSS_M27 VSS_U46 U48
A47 VSS_A43 VSS_AD7 AE1 AJ25 VSS_AJ21 VSS_AN1 AN11 AU24 VSS_AU1 VSS_BA32 BA35 BJ11 VSS_BG49 VSS_F7 G10 M35 VSS_M34 VSS_U48 U49
AA1 VSS_A47 VSS_AE1 AE11 AJ27 VSS_AJ25 VSS_AN11 AN12 AU3 VSS_AU24 VSS_BA35 BA40 BJ15 VSS_BJ11 VSS_G10 G20 M38 VSS_M35 VSS_U49 U5
C VSS_AA1 VSS_AE11 VSS_AJ27 VSS_AN12 VSS_AU3 VSS_BA40 VSS_BJ15 VSS_G20 VSS_M38 VSS_U5 C
AA16 AE12 AJ29 AN14 AU30 BA53 BJ19 G22 M47 U51
AA19 VSS_AA16 VSS_AE12 AE14 AJ3 VSS_AJ29 VSS_AN14 AN22 AU38 VSS_AU30 VSS_BA53 BB19 BJ23 VSS_BJ19 VSS_G22 G26 M51 VSS_M47 VSS_U51 U53
AA21 VSS_AA19 VSS_AE14 AE3 AJ30 VSS_AJ3 VSS_AN22 AN3 AU51 VSS_AU38 VSS_BB19 BB27 BJ27 VSS_BJ23 VSS_G26 G28 N1 VSS_M51 VSS_U53 U6
AA3 VSS_AA21 VSS_AE3 AE4 AJ32 VSS_AJ30 VSS_AN3 AN33 AV12 VSS_AU51 VSS_BB27 BB35 BJ31 VSS_BJ27 VSS_G28 G32 N16 VSS_N1 VSS_U6 U8
AA32 VSS_AA3 VSS_AE4 AE40 AJ33 VSS_AJ32 VSS_AN33 AN35 AV13 VSS_AV12 VSS_BB35 BC20 BJ35 VSS_BJ31 VSS_G32 G34 N38 VSS_N16 VSS_U8 U9
AA35 VSS_AA32 VSS_AE40 AE42 AJ35 VSS_AJ33 VSS_AN35 AN36 AV14 VSS_AV13 VSS_BC20 BC22 BJ39 VSS_BJ35 VSS_G34 G42 N51 VSS_N38 VSS_U9 V12
AA38 VSS_AA35 VSS_AE42 AE43 AJ38 VSS_AJ35 VSS_AN36 AN38 AV18 VSS_AV14 VSS_BC22 BC26 BJ43 VSS_BJ39 VSS_G42 H19 P13 VSS_N51 VSS_V12 V16
AA53 VSS_AA38 VSS_AE43 AE45 AJ53 VSS_AJ38 VSS_AN38 AN40 AV19 VSS_AV18 VSS_BC26 BC28 BJ47 VSS_BJ43 VSS_H19 H27 P16 VSS_P13 VSS_V16 V19
AB10 VSS_AA53 VSS_AE45 AE46 AK10 VSS_AJ53 VSS_AN40 AN42 AV24 VSS_AV19 VSS_BC28 BC32 BJ7 VSS_BJ47 VSS_H27 H35 P19 VSS_P16 VSS_V19 V21
AB4 VSS_AB10 VSS_AE46 AE48 AK14 VSS_AK10 VSS_AN42 AN43 AV27 VSS_AV24 VSS_BC32 BC34 C14 VSS_BJ7 VSS_H35 J1 P20 VSS_P19 VSS_V21 V35
AB41 VSS_AB4 VSS_AE48 AE50 AK16 VSS_AK14 VSS_AN43 AN45 AV30 VSS_AV27 VSS_BC34 BC42 C31 VSS_C14 VSS_J1 J16 P24 VSS_P20 VSS_V35 V40
AB45 VSS_AB41 VSS_AE50 AE51 AK33 VSS_AK16 VSS_AN45 AN46 AV35 VSS_AV30 VSS_BC42 BD19 C34 VSS_C31 VSS_J16 J19 P32 VSS_P24 VSS_V40 V44
AB47 VSS_AB45 VSS_AE51 AE53 AK41 VSS_AK33 VSS_AN46 AN48 AV38 VSS_AV35 VSS_BD19 BD24 C39 VSS_C34 VSS_J19 J22 P35 VSS_P32 VSS_V44 V51
AB48 VSS_AB47 VSS_AE53 AE6 AK44 VSS_AK41 VSS_AN48 AN49 AV47 VSS_AV38 VSS_BD24 BD27 C42 VSS_C39 VSS_J22 J27 P38 VSS_P35 VSS_V51 V7
AB50 VSS_AB48 VSS_AE6 AE8 AM12 VSS_AK44 VSS_AN49 AN5 AV51 VSS_AV47 VSS_BD27 BD30 C45 VSS_C42 VSS_J27 J32 P4 VSS_P38 VSS_V7 Y10
AB51 VSS_AB50 VSS_AE8 AE9 AM19 VSS_AM12 VSS_AN5 AN51 AV7 VSS_AV51 VSS_BD30 BD35 C49 VSS_C45 VSS_J32 J35 P47 VSS_P4 VSS_Y10 Y14
AB6 VSS_AB51 VSS_AE9 AF10 AM24 VSS_AM19 VSS_AN51 AN53 AW13 VSS_AV7 VSS_BD35 BE19 D12 VSS_C49 VSS_J35 J40 P52 VSS_P47 VSS_Y14 Y16
AC16 VSS_AB6 VSS_AF10 AF12 AM25 VSS_AM24 VSS_AN53 AN6 AW19 VSS_AW13 VSS_BE19 BE2 D16 VSS_D12 VSS_J40 J53 P9 VSS_P52 VSS_Y16 Y21
AC18 VSS_AC16 VSS_AF12 AF25 AM29 VSS_AM25 VSS_AN6 AN8 AW27 VSS_AW19 VSS_BE2 BE35 D24 VSS_D16 VSS_J53 K14 T40 VSS_P9 VSS_Y21 Y25
AC19 VSS_AC18 VSS_AF25 AF32 AM33 VSS_AM29 VSS_AN8 AN9 AW3 VSS_AW27 VSS_BE35 BE8 D30 VSS_D24 VSS_K14 K22 U1 VSS_T40 VSS_Y25 Y33
AC21 VSS_AC19 VSS_AF32 AF47 AM35 VSS_AM33 VSS_AN9 AP40 AW35 VSS_AW3 VSS_BE8 BF12 D36 VSS_D30 VSS_K22 K32 U11 VSS_U1 VSS_Y33 Y41
AC25 VSS_AC21 VSS_AF47 AG16 AM36 VSS_AM35 VSS_AP40 AT12 AY10 VSS_AW35 VSS_BF12 BF16 D38 VSS_D36 VSS_K32 K36 U12 VSS_U11 VSS_Y41 Y44
AC33 VSS_AC25 VSS_AG16 AG25 AM40 VSS_AM36 VSS_AT12 AT16 AY22 VSS_AY10 VSS_BF16 BF24 E19 VSS_D38 VSS_K36 K4 U14 VSS_U12 VSS_Y44 Y7
AC35 VSS_AC33 VSS_AG25 AG36 M28 VSS_AM40 VSS_AT16 AT19 AY32 VSS_AY22 VSS_BF24 BF38 E35 VSS_E19 VSS_K4 K50 U21 VSS_U14 VSS_Y7 Y9
B B
B2 VSS_AC35 9 OF 13VSS_AG36 B52 VSS_M28 10 OF 13 VSS_AT19 VSS_AY32 11 OF 13
VSS_BF38 VSS_E35 12 OF 13 VSS_K50 VSS_U21 13 OF 13 VSS_Y9
A6 VSS_B2 VSS_B52 B53
A52 VSS_A6 VSS_B53 BE1 VALLEYVIEW-M_FCBGA1170 VALLEYVIEW-M_FCBGA1170 VALLEYVIEW-M_FCBGA1170 VALLEYVIEW-M_FCBGA1170
A51 VSS_A52 VSS_BE1 BE53
A5 VSS_A51 VSS_BE53 BG1
A49 VSS_A5 VSS_BG1 BJ2
A3 VSS_A49 VSS_BJ2 BJ3
BH53 VSS_A3 VSS_BJ3 BJ5
BH52 VSS_BH53 VSS_BJ5 BJ49
BG53 VSS_BH1 VSS_BJ52 C1
E53 VSS_BG53 VSS_C1 C53
VSS_E53 VSS_C53 E1
VSS_E1
U16
AN16 USB_VSSA_U16
VSSA_AN16
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC GND
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
0.1
5 4 3 2 1
5 4 3 2 1
D D
+1.8VALW
XDP-SFF-26Pin
1
XDP@ CONN@
RC61 JDB1
200_0402_5%
XDP_H_PREQ_BUF#_DB 1
2
XDP_H_PREQ_BUF# XDP_H_PRDY#_DB 2 1
3 2
XDP_OBSDATA_A0_DB 4 3
XDP_OBSDATA_A1_DB 5 4
1 2 XDP_RSTBTN# 6 5
+1.8VS 6
RC86 @ XDP_OBSDATA_A2_DB 7
1
1K_0402_5% 2 1 2 XDP_OBSDATA_A3_DB 8 7
+1.8VALW 8
RC62 @ CC81 XDP@ 9
1K_0402_5% .1U_0402_16V7K EC_RSMRST#_DB 10 9
11 10
PMC_CORE_PWROK_DB 12 11
RTC_TEST#_DB 13 12
C 13 C
+1.8VALW 14
XDP@ 15 14
+1.8VALW 15
RC63 1 2 51_0402_5% XDP_H_TDO 16
PMC_PLTRST#_DB 17 16
XDP_RSTBTN#_DB 18 17
TDO Close To XDP Conn >250 mil 18
19
XDP_H_TDO_DB 20 19
XDP_H_TRST#_DB 21 20
XDP_H_TDI_DB 22 21
XDP_H_TMS_DB 23 22
24 23
25 24 27
XDP_H_TCK_DB 26 25 G1 28
26 G2
MOLEX_52435-2671_26P_P0.5
PCB Footprint = MOLEX_52435-2671_26P-T
RC19 RC46
B 5 4 XDP_H_TCK_DB 5 4 XDP_OBSDATA_A1_DB B
<8> XDP_H_TCK 6 3 <8> XDP_OBSDATA_A1 6 3
XDP_H_TMS_DB XDP_OBSDATA_A0_DB
<8> XDP_H_TMS 7 2 <8> XDP_OBSDATA_A0 7 2
XDP_H_TDI_DB XDP_H_PRDY#_DB
<8> XDP_H_TDI 8 1 XDP_H_TRST#_DB <8> XDP_H_PRDY# 8 1 XDP_H_PREQ_BUF#_DB
<8> XDP_H_TRST# <8> XDP_H_PREQ_BUF#
0_0804_8P4R_5% 0_0804_8P4R_5%
ESD@ ESD@
RC44
5 4 XDP_H_TDO_DB 1 8 PMC_CORE_PWROK_DB
<8> XDP_H_TDO 6 3 <25,8> PMC_CORE_PWROK 2 7
XDP_RSTBTN#_DB EC_RSMRST#_DB
<8> XDP_RSTBTN# 7 2 <25,8> EC_RSMRST# 3 6
PMC_PLTRST#_DB XDP_OBSDATA_A3_DB
<8> PMC_PLTRST# 8 1 RTC_TEST#_DB <8> XDP_OBSDATA_A3 4 5 XDP_OBSDATA_A2_DB
<8> RTC_TEST# <8> XDP_OBSDATA_A2
RC52 0_0804_8P4R_5%
0_0804_8P4R_5% ESD@
ESD@
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date VLV-M SOC Debug
Size
Document Number Rev
B 0.1
5 4 3 2 1
A B C D E
+DDR_A_VREF_DQ +1.35V CONN@ +1.35V Signal voltage level = 0.675 V

JDIMM1 PLACE TWO 4.7K RESISTORS CLOSE TO
1 2
3 VREF_DQ VSS 4 DDR_A_D4
DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
5 VSS DQ4 6 DDR_A_DQS#[0..7] <5> Decoupling caps are needed; one 0.1 µF placed close to VREF pins of each DDR3 SODIMM.
DDR_A_D0 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS[0..7] <5>
DDR_A_DQS#0
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14 DDR_A_D[0..63] <5>
DDR_A_D2 15 VSS VSS 16 DDR_A_D6 +1.35V +DDR_A_VREF_DQ
DQ2 DQ6 DDR_A_MA[0..15] <5>
DDR_A_D3 17 18 DDR_A_D7
19 DQ3 DQ7 20 1 2
21 VSS VSS 22 DDR_A_DM[0..7] <5>
DDR_A_D8 DDR_A_D12 RD5
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 4.7K_0402_1%
DQ9 DQ13 1
25 26 1 2
DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1 RD6 CD34
DDR_A_DQS1 29 DQS1# DM1 30 4.7K_0402_1%
1 DQS1 RESET# DDR_A_RST# <5> .1U_0402_16V7K 1
31 32 2
DDR_A_D10 33 VSS VSS 34 DDR_A_D14
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15 DDR_A_RST# 1 2
37 DQ11 DQ15 38 CD35
DDR_A_D16 39 VSS VSS 40 DDR_A_D20 .1U_0402_16V7K
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 +1.35V +DDR_A_VREF_CA
43 DQ17 DQ21 44 FOR EMI/ESD Require 01/15
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2 1 2
DDR_A_DQS2 47 DQS2# DM2 48 RD7
49 DQS2 VSS 50 DDR_A_D22 4.7K_0402_1%
VSS DQ22 1
DDR_A_D18 51 52 DDR_A_D23 1 2
DDR_A_D19 53 DQ18 DQ23 54 RD8 CD36
55 DQ19 VSS 56 DDR_A_D28 4.7K_0402_1%
All VREF traces should DDR_A_D24 57 VSS DQ28 58 DDR_A_D29 2
.1U_0402_16V7K
Layout Note: have 10 mil trace width DDR_A_D25 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS 62 DDR_A_DQS#3
65 DM3 DQS3 66
+1.35V DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
CD6 1 2 10U_0603_6.3V6M VSS VSS
CD7 1 2 10U_0603_6.3V6M
CD8 1 2 10U_0603_6.3V6M 73 74
<5> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 <5>
CD9 1 2 10U_0603_6.3V6M 75 76
77 VDD VDD 78 DDR_A_MA15
79 NC A15 80 DDR_A_MA14
<5> DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
CD5 1 2 .1U_0402_16V7K 87 A9 A7 88
CD4 1 2 .1U_0402_16V7K DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
CD3 1 2 .1U_0402_16V7K DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
CD2 1 2 .1U_0402_16V7K 93 A5 A4 94
CD10 1 2 .1U_0402_16V7K DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
CD11 1 2 .1U_0402_16V7K DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
CD12 1 2 .1U_0402_16V7K 99 A1 A0 100
CD33 1 2 .1U_0402_16V7K 101 VDD VDD 102
2 <5> DDR_A_CLK0 DDR_A_CLK2 <5> 2
103 CK0 CK1 104
<5> DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# <5>
105 106
1 2 DDR_A_MA10 107 VDD VDD 108
+
A10/AP BA1 DDR_A_BS1 <5>

CD13 330U_2.5V_M 109 110
<5> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <5>
111 112
113 VDD VDD 114
<5> DDR_A_WE# WE# S0# DDR_A_CS0# <5>
115 116
<5> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <5>
117 118
DDR_A_MA13 119 VDD VDD 120
121 A13 ODT1 122 DDR_A_ODT2 <5>
<5> DDR_A_CS2# S1# NC
123 124
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
Part Number Description ESR DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
133 DQ33 DQ37 134
SF000002Z00 S_A-P_CAP 330U 2.5V M 6.3X4.2 R17M VLPS 17mΩ DDR_A_DQS#4 135 VSS VSS 136 DDR_A_DM4
DDR_A_DQS4 137 DQS4# DM4 138
139 DQS4 VSS 140 DDR_A_D38
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_A_D44
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS 152 DDR_A_DQS#5
155 DM5 DQS5 156
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
+0.675VS DDR_A_D48 163 VSS VSS 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
CD15 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6
DDR_A_DQS6 171 DQS6# DM6 172
CD16 1 2 1U_0402_6.3V6K 173 DQS6 VSS 174 DDR_A_D54
CD14 1 2 1U_0402_6.3V6K DDR_A_D50 175 VSS DQ54 176 DDR_A_D55
3
DDR_A_D51 177 DQ50 DQ55 178 3
179 DQ51 VSS 180 DDR_A_D60
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
189 DM7 DQS7 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
Layout Note: 197 VSS VSS 198
Place near JDIMM1.203,204 199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 <15,20,22,25,9>
201 202
SA1 SCL EC_SMB_CK2 <15,20,22,25,9>
203 204
+0.675VS VTT VTT +0.675VS
RS@ RS@ 205 206
GND1 GND2
2
1 RD1 RD2 207 208

BOSS1 BOSS2
Channel A
0_0402_5%
0_0402_5%
CD17
.1U_0402_16V7K TYCO_2-2013022-1
2
Part Number = SP07000JN10
1
PCB Footprint = TYCO_2-2013022-1_204P
<Address: SA1:SA0=00 (A0H)>
DIMM_1 STD H:4mm
4 4

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date DDR3L DIMMA
C 0.1
A B C D E
A B C D E
+DDR_B_VREF_DQ +1.35V CONN@ +1.35V

JDIMM2
1 2
3 VREF_DQ VSS1 4 DDR_B_D4
5 VSS2 DQ4 6 DDR_B_DQS#[0..7] <5>
DDR_B_D0 DDR_B_D5
DDR_B_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_B_DQS[0..7] <5> +1.35V +DDR_B_VREF_DQ
DDR_B_DQS#0
DDR_B_DM0 11 VSS4 DQS#0 12 DDR_B_DQS0
13 DM0 DQS0 14 DDR_B_D[0..63] <5> 1 2
DDR_B_D2 15 VSS5 VSS6 16 DDR_B_D6 RD11
DQ2 DQ6 DDR_B_MA[0..15] <5>
DDR_B_D3 17 18 DDR_B_D7 4.7K_0402_1% 1
19 DQ3 DQ7 20 1 2
21 VSS7 VSS8 22 DDR_B_DM[0..7] <5>
DDR_B_D8 DDR_B_D12 RD9 CD38
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13 4.7K_0402_1%
DQ9 DQ13 .1U_0402_16V7K
25 26 2
DDR_B_DQS#1 27 VSS9 VSS10 28 DDR_B_DM1
DDR_B_DQS1 29 DQS#1 DM1 30
1 DQS1 RESET# DDR_B_RST# <5> 1
31 32
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15 +1.35V +DDR_B_VREF_CA
37 DQ11 DQ15 38 DDR_B_RST# 1 2
DDR_B_D16 39 VSS13 VSS14 40 DDR_B_D20 CD1 1 2
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21 .1U_0402_16V7K RD12
43 DQ17 DQ21 44 4.7K_0402_1%
VSS15 VSS16 1
DDR_B_DQS#2 45 46 DDR_B_DM2 FOR EMI/ESD Require 01/15 1 2
DDR_B_DQS2 47 DQS#2 DM2 48 RD10 CD37
49 DQS2 VSS17 50 DDR_B_D22 4.7K_0402_1%
VSS18 DQ22 .1U_0402_16V7K
DDR_B_D18 51 52 DDR_B_D23 2
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
All VREF traces should DDR_B_D24 57 VSS20 DQ28 58 DDR_B_D29
Layout Note: have 10 mil trace width DDR_B_D25 59 DQ24 DQ29 60
Place near JDIMM2 61 DQ25 VSS21 62 DDR_B_DQS#3
65 DM3 DQS3 66
+1.35V DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31
71 DQ27 DQ31 72
CD22 1 2 10U_0603_6.3V6M VSS25 VSS26
CD23 1 2 10U_0603_6.3V6M
CD24 1 2 10U_0603_6.3V6M
CD25 1 2 10U_0603_6.3V6M 73 74
<5> DDR_B_CKE0 CKE0 CKE1 DDR_B_CKE2 <5>
75 76
77 VDD1 VDD2 78 DDR_B_MA15
79 NC1 A15 80 DDR_B_MA14
<5> DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
CD18 1 2 .1U_0402_16V7K DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
CD19 1 2 .1U_0402_16V7K 87 A9 A7 88
CD20 1 2 .1U_0402_16V7K DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
CD21 1 2 .1U_0402_16V7K DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
CD26 1 2 .1U_0402_16V7K 93 A5 A4 94
CD27 1 2 .1U_0402_16V7K DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
CD28 1 2 .1U_0402_16V7K DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
2 2
101 VDD9 VDD10 102
<5> DDR_B_CLK0 CK0 CK1 DDR_B_CLK2 <5>
103 104
<5> DDR_B_CLK0# CK0# CK1# DDR_B_CLK2# <5>
105 106
DDR_B_MA10 107 VDD11 VDD12 108
A10/AP BA1 DDR_B_BS1 <5>
109 110
<5> DDR_B_BS0 BA0 RAS# DDR_B_RAS# <5>
111 112
113 VDD13 VDD14 114
<5> DDR_B_WE# WE# S0# DDR_B_CS0# <5>
115 116
<5> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <5>
117 118
DDR_B_MA13 119 VDD15 VDD16 120
A13 ODT1 DDR_B_ODT2 <5>
121 122
<5> DDR_B_CS2# S1# NC2
123 124
125 VDD17 VDD18 126
NCTEST VREF_CA +DDR_B_VREF_CA
127 128
DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37
133 DQ33 DQ37 134
139 DQS4 VSS31 140 DDR_B_D38
DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39
DDR_B_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#5
155 DM5 DQS5 156
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
+0.675VS 161 DQ43 DQ47 162
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
CD29 1 2 10U_0603_6.3V6M 167 DQ49 DQ53 168
173 DQS6 VSS43 174 DDR_B_D54
3
CD30 1 2 1U_0402_6.3V6K DDR_B_D50 175 VSS44 DQ54 176 DDR_B_D55 3
CD31 1 2 1U_0402_6.3V6K DDR_B_D51 177 DQ50 DQ55 178
+3VS 179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D57 183 DQ56 DQ61 184
DQ57 VSS47
2
185 186 DDR_B_DQS#7

RD3 DDR_B_DM7 187 VSS48 DQS#7 188 DDR_B_DQS7
10K_0402_5% 189 DM7 DQS7 190
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
Layout Note:
1
195 DQ59 DQ63 196

Place near JDIMM2.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA EC_SMB_DA2 <14,20,22,25,9>
201 202
203 SA1 SCL 204 EC_SMB_CK2 <14,20,22,25,9>
+0.675VS VTT1 VTT2 +0.675VS
205 206
G1 G2
2
1
CD32
.1U_0402_16V7K
RS@
RD4
0_0402_5%
TYCO_2-2013287-1
Part Number = SP07000KW00
Channel B
2 PCB Footprint = TYCO_2-2013287-1_204P
1
SA0/SA1 Follow INTEL demo board <Address: SA0:SA1=10 (A2H)>
DIMM_2 REV H:4mm
4 4

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date DDR3L DIMMB
C 0.1
A B C D E
5 4 3 2 1
Mode Configure
※EPROMmode
Close to LT2 Close to Pin18 Close to LT3
+3VS +3VS_RT
80mil +SWR_VDD +SWR_V12 only mode : PIN 30 4.7k pull low, Pin 31 4.7k pull high.
　EEPROM
100mil 100mil : PIN 30 4.7k pull high, Pin 31 4.7k pull low.
10U_0603_6.3V6M
0.1U_0402_16V4Z
22U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 RS@ 2
RT1 0_0603_5% 1 1 1 1 1 1 1 1 1 : PIN 30 4.7k pull high, Pin 31 4.7k pull high.
〈 ※Default mode 〉
CT4
CT5
CT6
CT7
CT8
CT9
CT10
CT11
CT12
2 2 2 2 2
LVDS@ 2 2 2 2
Close to Pin3
+DP_V33 +3VS_RT +3VS_RT
LVDS@
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D LVDS@ LVDS@ LVDS@ LVDS@ LVDS@ LVDS@ LVDS@ D
2
1 1 1 Close to Pin13 Close to
2
Close to Pin7 RT12
Pin27
CT1
CT2
CT3
RT4 LVDS@ 4.7K_0402_5%
@ 4.7K_0402_5%
2 2 2 +3VS_RT
1
UT1 MIIC_SDA MIIC_SCL
1
LVDS@ 19 LCD_TXCLK+ <17>
LT1 2 1 +DP_V33 TXEC+
LVDS@ LVDS@ LVDS@ 40mil 3 DP_V33 TXEC-
20 LCD_TXCLK- <17>
2
FBMA-L11-201209-221LMA30T_0805
LVDS@ 100mil 13 SWR_VDD TXE2+
21 LCD_TXOUT2+ <17> RT6 RT7
Power
100mil LT2 2 1 +SWR_VDD 40mil 18 22 LVDS@ 4.7K_0402_5% @ 4.7K_0402_5%
LVDS
PVCC TXE2- LCD_TXOUT2- <17>
FBMA-L11-201209-221LMA30T_0805
+SWR_V12 40mil 12 23 LCD_TL_TXOUT1+ PIN30 PIN31
1
SWR_LX TXE1+
40mil 11 24 LCD_TL_TXOUT1-
SWR / LDO Mode select 40mil 27
SWR_VCCK
VCCK
TXE1-
40mil 7 DP_V12 TXE0+
25 LCD_TL_TXOUT0+
※LDO mode is adopted as default power regulator mode.

26 LCD_TL_TXOUT0-
TXE0-
Also can implement SWR mode by add inductor. +3VS_RT

RTD2132S +LCD_VDD
H_EDP_AUXP_C_TL 2 LCD_EDID_DATA_TL RT9 1 LVDS@ 2 4.7K_0402_5%
AUX_P
DP-IN
H_EDP_AUXN_C_TL 1 14 TL_INVT_PWM
GPIO
TL_INVT_PWM <17>
AUX_N GPIO(PWM OUT) 15 80mil LCD_EDID_CLK_TL RT10 1 LVDS@ 2 4.7K_0402_5%
H_EDP_TXP0_C_TL 5 GPIO(Panel_VCC) 16
6 LANE0P GPIO(PWM IN) 17 SOC_PWM_TL <6>
H_EDP_TXN0_C_TL
LANE0N GPIO(BL_EN) EC_ENBKL <25,6>
9 LVDS 29 LCD_EDID_CLK_TL
<25> EC_SMB_CK3 CIICSCL1 MIICSCL1
10 28 LCD_EDID_DATA_TL
<25> EC_SMB_DA3 CIICSDA1 EDID MIICDA1
Other
C C
<17> EDP_HPD 32 ROM 31 MIIC_SCL

HPD MIICSCL0 30 MIIC_SDA
8 MIICSDA0
4 DP_REXT 33
DP_GND GND
2
RT8 RTD2132R-CG QFN32 LVDS@
12K_0402_1%
LVDS@
1
Close to Pin8
+LCD_VDD
+LCD_VDD 80mil
1
2
RT5
IEDP@ CT13 100K_0402_5%
CT16 1 2 0.1U_0402_10V6K H_EDP_AUXP_C_R 4.7U_0603_6.3V6K LVDS@
LVDS@ 1
2
IEDP@ RPT1 LVDS@
CT17 1 2 0.1U_0402_10V6K H_EDP_AUXN_C_R LCD_EDID_CLK_TL 1 8 LCD_EDID_CLK <17>
LCD_EDID_DATA_TL 2 7 LCD_EDID_DATA <17> Close to Panel conn.
LVDS@ LCD_TL_TXOUT0- 3 6 LCD_TXOUT0- <17>
CT18 1 2 0.1U_0402_10V6K H_EDP_AUXP_C_TL LCD_TL_TXOUT0+ 4 5 LCD_TXOUT0+ <17>
<6> H_EDP_AUXP
LVDS@ 0_0804_8P4R_5%
CT19 1 2 0.1U_0402_10V6K H_EDP_AUXN_C_TL
<6> H_EDP_AUXN
LVDS@ RPT2 IEDP@
B CT20 1 2 0.1U_0402_10V6K H_EDP_TXP0_C_TL H_EDP_AUXP_C_R 1 8 B
<6> H_EDP_TXP0
H_EDP_AUXN_C_R 2 7
LVDS@ H_EDP_TXN0_C_R 3 6
CT21 1 2 0.1U_0402_10V6K H_EDP_TXN0_C_TL H_EDP_TXP0_C_R 4 5 PIN15 PIN16 Accept voltage input (high level)
<6> H_EDP_TXN0
IEDP@ 0_0804_8P4R_5%
CT22 1 2 0.1U_0402_10V6K H_EDP_TXP0_C_R 2132S TL_ENVDD 2132S 3.3V
IEDP@
CT23 1 2 0.1U_0402_10V6K H_EDP_TXN0_C_R 2132R +LCD_VDD * 2132R 1.5~3.3V
* Version R internal Power Switch, can * Version R has internal level shifter, remove
Place co-lay Resistor back to back on TOP and BOT output 1A, Rds(on)=0.2 ohm level shifter circuit on AMD platform
Different between 2132S and 2132R
2132S 2132R
IEDP@
CT14 1 2 0.1U_0402_10V7K
<6> H_EDP_TXP1 LCD_TXOUT1+ <17> 1. Support SWR mode 1. Support LDO mode and SWR mode
CT15
IEDP@
1 2 0.1U_0402_10V7K
2. Internal ROM
<6> H_EDP_TXN1 LCD_TXOUT1- <17>
3. Support LCD_VDD(internal Power switch)
LVDS@ 4. Integrates Level shifter
LCD_TL_TXOUT1+ RT2 1 2 0_0402_5%
A A
LVDS@
LCD_TL_TXOUT1- RT3 1 2 0_0402_5%

LVDS Translator - RTD2132S
Custom 0.1
5 4 3 2 1
A B C D E
L1 DLW21HN900SQ2L_4P
USB20_HUB_P2_R 4 3
4 3 USB20_HUB_P2 <23>
BTO : TOUCH_EMI@
USB20_HUB_N2_R 1
1 2
2
USB20_HUB_N2 <23> LCD POWER CIRCUIT (For EDP panel only)
TOUCH_EMI@
1 1
+3VS +LCD_VDD
U2
EMI request - Close to JEDP connector W=80mils 1
5 VOUT
VIN W=80mils
2
+LCD_VDD_SS 4 GND
SS
L2 DLW21HN900SQ2L_4P
1
USB20_HUB_N3_R 4 3 3
4 3 USB20_HUB_N3 <23> EN LCD_ENVDD <6>
C7
1500P_0402_50V7K APL3512ABI-TRG_SOT23-5
2
USB20_HUB_P3_R 1 2 IEDP@ IEDP@
1 2 USB20_HUB_P3 <23>
CAM_EMI@
R11
100K_0402_5%
IEDP@
1
LVDS colay eDP cable
Pin define will be change after ME ready
2 +5VS 2
JLVDS RS@
1 +5VS_LVDS_TOUCH 1 2 20mils Touch
1 2 USB20_HUB_N2_R R12 0_0603_5%
2 3 USB20_HUB_P2_R
3 4 BKOFF#
4 5 INT_MIC_DATA USB20_HUB_P3_R
5 6 INT_MIC_DATA <24>
INT_MIC_CLK USB20_HUB_N3_R
6 7 INT_MIC_CLK <24>
7 +3VS
CK0402101V05_0402-2
8
CK0402101V05_0402-2
USB20_HUB_P3_R
8
2
9 USB20_HUB_N3_R Camera
9
ESD@
ESD@
10 +3VS_LVDS_CAM 1 RS@ 2 20mils D12
10 11 R13 0_0603_5%
11 YSLC05CH_SOT23-3
12 Irush=1.5A +3VS
12 +LCD_VDD 60mils @ESD@
13
13 14 LCD_EDID_CLK
DA8
DA9
LCD_EDID_CLK <16>
1
14 15 LCD_EDID_DATA
15 LCD_EDID_DATA <16>
16
16 LCD_TXOUT0- <16>
17
LCD_TXOUT0+ <16>
1
17 18
18 LCD_TXOUT1- <16>
19 LCD_TXOUT1+ <16>
19 20 +1.8VS
20 LCD_TXOUT2- <16>
21
21 LCD_TXOUT2+ <16>
22
22
1
23
23 LCD_TXCLK- <16>
24
24 LCD_TXCLK+ <16>
25 EDP_HPD R34
25 26 LED_PWM 10K_0402_5%
26 27 BKOFF#_R
2
27 28
28 29 <6> H_EDP_HPD#
29
1
3 30 +LCD_INV Irush=1.5A 60mils 3
30 D
31 Q5 2 EDP_HPD +LCD_VDD
GND EDP_HPD <16>
32 2N7002K_SOT23-3 G
GND
1
33 S
GND
1
34 Irush=1.5A 60mils
3
GND 35 B+ R35 @
GND +LCD_INV 100K_0402_5% R37
L3 100K_0402_5%
2
CONN@ 2 1
2
FBMA-L11-201209-221LMA30T_0805 LCD_EDID_DATA
EMI@ LCD_EDID_CLK
1
@ @
1 2 R36
D13 RB751V40_SC76-2 100K_0402_5%
2
+3VS
Reserve for eDP panel IEDP@
1 2
SOC_PWM_EDP <6>
R32 0_0402_5%
IEDP@ Intel recommends having a pull-up
5
1 2 resistor of 100 kΩ for AUXN and a

R14 0_0402_5% U3 LED_PWM 1 2
VCC
TL_INVT_PWM <16> pull-down resistor of 100 kΩ for AUXP

1 D11 RB751V40_SC76-2
1 2 4 IN1 EC_ENBKL_R <6> between the AC capacitor and the
BKOFF#_R LVDS@
OUT 2
D9 RB751V40_SC76-2 BKOFF# connector, to assist source detection
GND
IN2 BKOFF# <25>

1
LVDS@ by the sink device.

1
R16
R15 47K_0402_5%
3
10K_0402_5% MC74VHC1G08DFT2G_SC70-5
4 LVDS@ 4
2
2
1 2
R17 0_0402_5%
@
Reserve for LVDS panel
LVDS
Custom 0.1
A B C D E
A B C D E
+1.8VS
+HDMI_5V_OUT +1.8VS
1
G
RPY3
+1.8VS 1 8 HDMI_SCLK RY3
2 7 HDMI_SDATA UMA_HDMI_CLK 3 1 HDMI_SCLK 10K_0402_5%
<6> UMA_HDMI_CLK
2
1 3 6 UMA_HDMI_CLK 1
D
4 5 UMA_HDMI_DATA QY1
2
BSH111_SOT23-3 <6,7> HDMI_HPD#
2.2K_0804_8P4R_5% UMA_HDMI_DATA 3 1 HDMI_SDATA
<6> UMA_HDMI_DATA
6
S
D
2
D
QY3B G HDMI_HPD
QY2 DMN66D0LDW-7_SOT363-6 S
1
BSH111_SOT23-3
1
RY4
100K_0402_5%
2
HDMI Connector
DLW21HN900SQ2L_4P JHDMI CONN@
CY2 1 2 0.1U_0402_10V7K H_DVI_TXC- 4 3 HDMI_R_CK- HDMI_HPD 19
<6> H_HDMI_TXC- 4 3 18 HP_DET
+HDMI_5V_OUT +5V
17
CY1 1 2 0.1U_0402_10V7K H_DVI_TXC+ 1 2 HDMI_R_CK+ HDMI_SDATA 16 DDC/CEC_GND
<6> H_HDMI_TXC+ 1 2 15 SDA
HDMI_SCLK
LY1 EMI@ 14 SCL
DLW21HN900SQ2L_4P 13 Utility
2 CY4 1 2 0.1U_0402_10V7K H_DVI_TXD0- 1 2 HDMI_R_D0- HDMI_R_CK- 12 CEC 2
<6> H_HDMI_TX0- 1 2 11 CK-
HDMI_R_CK+ 10 CK_shield
CY3 1 2 0.1U_0402_10V7K H_DVI_TXD0+ 4 3 HDMI_R_D0+ HDMI_R_D0- 9 CK+
<6> H_HDMI_TX0+ 4 3 8 D0-
LY2 EMI@ HDMI_R_D0+ 7 D0_shield
DLW21HN900SQ2L_4P HDMI_R_D1- 6 D0+
CY6 1 2 0.1U_0402_10V7K H_DVI_TXD1- 4 3 HDMI_R_D1- 5 D1-
<6> H_HDMI_TX1- 4 3 4 D1_shield 20
HDMI_R_D1+
HDMI_R_D2- 3 D1+ GND 21
CY5 1 2 0.1U_0402_10V7K H_DVI_TXD1+ 1 2 HDMI_R_D1+ 2 D2- GND 22
<6> H_HDMI_TX1+ 1 2 1 D2_shield GND 23
HDMI_R_D2+
LY3 EMI@ D2+ GND
DLW21HN900SQ2L_4P ACON_HMR2J-AK120C
CY8 1 2 0.1U_0402_10V7K H_DVI_TXD2- 1 2 HDMI_R_D2-
<6> H_HDMI_TX2- 1 2
CY7 1 2 0.1U_0402_10V7K H_DVI_TXD2+ 4 3 HDMI_R_D2+

<6> H_HDMI_TX2+ 4 3
LY4 EMI@
Common CHOKE use 67ohm
HDMI_R_D2- 1 RM7 2 619_0402_1%
3
HDMI_R_D2+
HDMI_R_D1+
1
1
RM8
RM9
2
2
619_0402_1%
619_0402_1%
HDMI POWER CIRCUIT 3
HDMI_R_D1- 1 RM10 2 619_0402_1% VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m
ZZZ1 HDMI45@
HDMI Royalty Current Limit: TYP=0.8A ; MAX=1A
RO0000003HM
HDMI_R_CK+ 1 RM11 2 619_0402_1%
HDMI W/Logo + HDCP HDMI_R_CK- 1 RM12 2 619_0402_1% +HDMI_5V_OUT
HDMI_R_D0- 1 RM13 2 619_0402_1% UY2
HDMI W/O Logo: RO0000001HM HDMI_R_D0+ 1 RM14 2 619_0402_1% 1 5 +5VS
OUT IN
HDMI W/Logo: RO0000002HM 1 2
CY11 GND
HDMI W/Logo + HDCP: RO0000003HM 3 4
0.1U_0402_10V7K FLG EN
please manually load
3
2 AP2151DWG-7_SOT25-5
this virtual material to 45@ BOM 5
D
+5VS
G QY3A SA00006H000
S DMN66D0LDW-7_SOT363-6
4
4 4

HDMI Conn.
0.1
A B C D E
A B C D E
SATA HDD Conn.
ACES_50208-00801-003
10
GND 9
GND
8
8 7
7 +5VS
6
1 6 5 SATA_PTX_C_DRX_P0 C8 1 2 0.01U_0402_25V7K 1
5 SATA_PTX_DRX_P0 <7>
4 SATA_PTX_C_DRX_N0 C9 1 2 0.01U_0402_25V7K
4 SATA_PTX_DRX_N0 <7>
3
3 2 SATA_PRX_DTX_N0 C10 1 2 0.01U_0402_25V7K
2 SATA_PRX_C_DTX_N0 <7>
1 SATA_PRX_DTX_P0 C11 1 2 0.01U_0402_25V7K
1 SATA_PRX_C_DTX_P0 <7>
JHDD
CONN@
Close to JHDD
+5VS
Place closely JHDD SATA CONN.
1.2A
1 1 1
C12 C13 C14
10U_0805_6.3V6M 0.1U_0402_10V7K 0.1U_0402_10V7K
2
2 2
FAN Control Circuit

+5VS
1 2 CONN@
R2 0_0603_5% JFAN
1A FAN@ +FAN1 1
2 1
2 3 2 2
2 3
1
C35 @
C3 4
10U_0805_6.3V6M 1000P_0402_50V7K 5 GND
2
U6 1 GND
1 8 CVILU_CI4403M1HRT-NH
2 EN GND 7
+FAN1 3 VIN GND 6 R1 10K_0402_5%
4 VOUT GND 5 2 1
<25> DFAN1 VSET GND +3VS
10mil FAN@
1
P2793BB0_SO8 FAN_SPEED1
FAN_SPEED1 <25>
C36 FAN@ 1
FAN@ 10U_0805_6.3V6M C1
2
0.01U_0402_25V7K
@
2
SA00002XA00 EOL change use SA00003UO00
2nd source SA00005JO00
3 3
4 4

HDD/FAN
0.1
A B C D E
A B C D E
Slot 1 Half PCIe Mini Card-WLAN NGFF E TYPE for Ultra +3V_WLAN
JWLAN
1 2
RC73 1 Ultra@ 2 0_0402_5% USB20_HUB_P1_R 3 GND 3.3VAUX 4
<23> USB20_HUB_P1 USB_D+ 3.3VAUX
WiMax/ BT RC74 1 2 0_0402_5% USB20_HUB_N1_R 5 6
<23> USB20_HUB_N1 USB_D- LED1#
WLAN&BT Combo module circuits Ultra@ 7 8
9 GND PCM_CLK 10
+3V_WLAN 11 SDIO_CLK PCM_SYNC 12
BT BT
13 SDIO_CMD PCM_IN 14
on module on module SDIO_DAT0 PCM_OUT
0.1U_0402_10V7K 15 16
17 SDIO_DAT1 LED2# 18
1 1 1 Enable Disable SDIO_DAT2 GND
19 20
CM1 CM2 CM3 21 SDIO_DAT3 UART_WAKE# 22
23 SDIO_WAKE# UART_RX
1 2 2 2 BT_ON H L SDIO_RST# 1
0.1U_0402_10V7K 4.7U_0603_6.3V6K 24
25 UART_TX 26
27 GND UART_CTS 28
<7> PCIE_PTX_C_WLANRX_P4 29 PET_P0 UART_RTS 30 E51_TXD
<7> PCIE_PTX_C_WLANRX_N4 31 PET_N0 RSVD 32 E51_TXD <25>
WLAN/ WiFi E51_RXD
1 Ultra@ 2 PCIE_PRX_WLANTX_P4_R 33 GND RSVD 34 E51_RXD <25>
RC75 0_0402_5%
<7> PCIE_PRX_WLANTX_P4 1 2 35 PER_P0 RSVD 36
<7> PCIE_PRX_WLANTX_N4
RC76 0_0402_5% PCIE_PRX_WLANTX_N4_R Debug card using
Ultra@ 37 PER_N0 COEX3 38
RC77 1 Ultra@ 2 0_0402_5% CLK_WLAN_R 39 GND COEX2 40
1 RM6 2 E51_RXD <8> CLK_WLAN 1 2 41 REFCLK_P0 COEX1 42
BT_ON RC78 0_0402_5% CLK_WLAN#_R
From EC <25> BT_ON
1K_0402_5%
<8> CLK_WLAN#
Ultra@ 43 REFCLK_N0 SUSCLK 44 CLK_EC <8>
45 GND PERST0# 46 2 RM5 1 PLT_RST_BUF# <21,25,8>
BT_CTRL_R BT_ON
<7> WLAN_CLKREQ# 1 2 47 CLKREQ0# W_DISABLE2# 48
For isolate BT_CTRL and <25> WLAN_WAKE#
RC66 0_0402_5% WLAN_WAKE#_R 0_0402_5% @
WL_OFF# <25>
49 PEWAKE0# W_DISABLE1# 50
Compal Debug Card. GND I2C_DAT EC_SMB_CK2 <14,15,22,25,9>
51 52 EC_SMB_DA2 <14,15,22,25,9>
53 RSVD/PET_P1 I2C_CLK 54
55 RSVD/PET_N1 ALERT 56 Need Change to use I2C
57 GND RSVD 58
59 RSVD/PER_P1 RSVD 60
61 RSVD/PER_N1 RSVD 62
63 GND RSVD 64
65 RSVD 3.3VAUX 66
67 RSVD 3.3VAUX
GND 69
68 GND2
Mini PCIE type for Non-Ultra GND1
+3V_WLAN LOTES_APCI0019-P002A CONN@
JWLAN1 CONN@
WLAN_WAKE#_R 1 2
3 1 2 4
BT_CTRL_R 5 3 4 6
WLAN_CLKREQ# 7 5 6 8
9 7 8 10
2
CLK_WLAN# NonUltra@ 1 RC67 20_0402_5% CLK_WLAN#_RM 11 9 10 12
2
CLK_WLAN NonUltra@ 1 RC68 20_0402_5% CLK_WLAN_RM 13 11 12 14

15 13 14 16
17 15 16 18
19 17 18 20 WL_OFF#
21 19 20 22 PLT_RST_BUF#
PCIE_PRX_WLANTX_N4 NonUltra@ 1 RC69 20_0402_5% PCIE_PRX_WLANTX_N4_RM 23 21 22 24
PCIE_PRX_WLANTX_P4 NonUltra@ 1 RC70 20_0402_5% PCIE_PRX_WLANTX_P4_RM 25 23 24 26
27 25 26 28
29 27 28 30 EC_SMB_CK2
WLAN/ WiFi 31 29 30 32 EC_SMB_DA2
WLAN/ WiFi
<7> PCIE_PTX_C_WLANRX_N4_M 33 31 32 34
<7> PCIE_PTX_C_WLANRX_P4_M 35 33 34 36 USB20_HUB_N1_RM NonUltra@ 1 RC71 20_0402_5% USB20_HUB_N1 WiMax/ BT
37 35 36 38 USB20_HUB_P1_RM NonUltra@ 1 RC72 20_0402_5% USB20_HUB_P1
39 37 38 40
+3V_WLAN 39 40
41 42
43 41 42 44
45 43 44 46
47 45 46 48
E51_TXD 49 47 48 50
E51_RXD 51 49 50 52
51 52
53 54
Debug card using GND1 GND2
LCN_DAN08-52406-0500
1
CCL6
3
Green Clock For safety request
3
22U_0603_6.3V6M
UCL1 GCLK@ 2 RCL4
120_0603_5%
2 10 +RTCGCLK 1 2
+3VALW VDD VBAT +RTC
15 11 GCLK@
+3VL +V3.3A NC GCLK@
+1.05VS_VTT
8 9
1 2 +3V_LAN_R 3 VDDIO_25M_A 32K 12 ILB_RTC_X1_R <8>
+3V_LAN GCLK@
RCL5 0_0402_5% VDDIO_25M_B NC
CLK_X2 1 5 LAN_X1_R_R
CLK_X1 16 XTAL_IN 25M_B 6 XTAL_25M_IN_R_R
XTAL_OUT 25M_A
4
+3VL +3V_LAN +1.05VS_VTT +3VALW 7 VSS
13 VSS
17 VSS 14
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
Thermal Pad VDD_RTC_OUT

1 1 1 1
2
CCL1 CCL2 CCL3 CCL5 SLG3NB244VTR_TQFN16_2X3 GCLK@
GCLK@ GCLK@ GCLK@ GCLK@ 2.2U_0402_6.3V6M
2 2 2 2 CCL9
GCLK@ 1
YCL1 25MHZ 12PF X3G025000DK1H-X
CLK_X1 1 3 CLK_X2
1 3
GND GND
1 2 4 1
CCL7 CCL8 LAN_X1_R_R 1 @ 2
LAN_X2 <21>
18P_0402_50V8J 18P_0402_50V8J RCL2 0_0402_5%
GCLK@ GCLK@
2 2
4 4
1
XTAL_25M_IN_R_R @ 2
XTAL_25M_IN_R <8>
RCL1 0_0402_5%

PCIe-WLAN/mSATA/GCLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
0.1
A B C D E
A B C D E
SA00005V700
UL1
Power trace VDDREG > 40 mil, REGOUT trace > 60 mil
+LAN_VDD10 CL1, CL2,CL3,CL4 close to pin 3,8,22,30 respectively
CL5 close to pin 22, CL6 close to pin 30 +3V_LAN CL7 close to Pin 11, CL8 close to Pin32
CL 19 close to Pin 24 CL20 close to Pin23
CL18 0.1U_0402_10V7K 1 2 1 2
LAN_MDI0+ 1 17 PCIE_PRX_LANTX_P3 1 2 8111G@ CL1 0.1U_0402_10V7K 8111G@ CL7 0.1U_0402_10V7K
MDIP0 HSOP PCIE_PRX_C_LANTX_P3 <7>
LAN_MDI0- 2 18 PCIE_PRX_LANTX_N3 1 2 1 2 1 2
MDIN0 HSON PCIE_PRX_C_LANTX_N3 <7>
3 19 PLT_RST_BUF# CL21 0.1U_0402_10V7K CL2 0.1U_0402_10V7K CL8 0.1U_0402_10V7K
+LAN_VDD10 AVDD10 PERSTB PLT_RST_BUF# <20,25,8>
LAN_MDI1+ 4 20 ISOLATE# 1 2 1 2
LAN_MDI1- 5 MDIP1 ISOLATEB 21 8111G@ CL3 0.1U_0402_10V7K 8106E@ CL20 0.1U_0402_10V7K
6 MDIN1 LANWAKEB 22 EC_SWI# <25> 1 2
LAN_MDI2+ +LAN_VDD10
1 LAN_MDI2- 7 MDIP2 DVDD10 23 CL4 0.1U_0402_10V7K 1
MDIN2 VDDREG +3V_LAN
8 24 1 2
+LAN_VDD10 AVDD10 REGOUT +LAN_VDD10
LAN_MDI3+ 9 25 PAD TL1 8111G@ CL5 1U_0402_6.3V6K
LAN_MDI3- 10 MDIP3 LED2 26 PAD TL2 1 2
11 MDIN3 LED1/GPIO 27 PAD TL3 8106E@ CL6 1U_0402_6.3V6K
Keep de-coupling capacitors close to
+3V_LAN AVDD33 LED0
LANCLK_REQ# 12
CLKREQB CKXTAL1
28 LAN_X1 1 2 RTL8111G/8106E within 200 mil
13 29 LAN_X2 8111G@ CL19 0.1U_0402_10V7K
<7> PCIE_PTX_C_LANRX_P3 HSIP CKXTAL2 LAN_X2 <20>
14 30
<7> PCIE_PTX_C_LANRX_N3 HSIN AVDD10 +LAN_VDD10
15 31 2 1
<8> CLK_LAN 16 REFCLK_P RSET 32
+3V_LAN RL1 2.49K_0402_1%
<8> CLK_LAN# REFCLK_N AVDD33 33 YL1 25MHZ_20PF_7V25000016
GND
LAN_X1 1 3 LAN_X2
1 3
GND GND
1 NOGCLK@ 1
CL9 2 4 CL10
8111G@ RTL8111G-CG_QFN32_4X4 PJ7 @ 27P_0402_50V8J 27P_0402_50V8J
2 1 NOGCLK@ NOGCLK@
+3VALW 2 1 +3V_LAN 2 2
JUMP_43X39
JRJ45
RJ45_MIDI0+ 1
2 PR1+ 2
SP050006B10
RJ45_MIDI0- 2
UL2 PR1-
RL3 3
DL2 ESD@ 8111G@ RJ45_MIDI1+
LAN_MDI0- 6 3 LAN_MDI1- 1 24 1 2 PR2+
For 10/100 LAN SKU I/O4 I/O2 TCT1 MCT1
LAN_MDI3- 2 23 RJ45_MIDI3- 75_0603_1% RJ45_MIDI2+ 4
LAN_MDI3+ 3 TD1+ MX1+ 22 RJ45_MIDI3+ PR3+
TD1- MX1- RL4 RJ45_MIDI2- 5
8111G@
5 2 4 21 1 2 PR3-
SA000065Y00 +3V_LAN VDD GND TCT2 MCT2
UL1 LAN_MDI2- 5 20 RJ45_MIDI2- 75_0603_1% RJ45_MIDI1- 6
LAN_MDI2+ 6 TD2+ MX2+ 19 RJ45_MIDI2+ PR2-
TD2- MX2- RL5 RJ45_MIDI3+ 7 9
LAN_MDI0+ 4 1 LAN_MDI1+ 7 18 1 2 PR4+ GND 10
I/O3 I/O1 LAN_MDI1- 8 TCT3 MCT3 17 RJ45_MIDI1- 75_0603_1% RJ45_MIDI3- 8 GND
AZC099-04S.R7G_SOT23-6 LAN_MDI1+ 9 TD3+ MX3+ 16 RJ45_MIDI1+ PR4-
TD3- MX3- RL6
8106E 10/100M SANTA_130456-491
8106E@ 10 15 1 2 @
LAN_MDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- 75_0603_1% CL16 1000P_1206_2KV7K
SP050007700 DL3 8111G@ESD@ LAN_MDI0+ 12 TD4+ MX4+ 13 RJ45_MIDI0+ RJ45_GND 1 2 LAN_GND
1 TD4- MX4-
UL2 LAN_MDI2- 6 3 LAN_MDI3- CL15
I/O4 I/O2
1
0.1U_0402_25V6
2
2 SUPERWORLD_SWG150401 CL17
2
5 2 8111G@
2
+3V_LAN
2
VDD GND EMI@ @ESD@ DL5
10/100M transformer DL4 ESD@
8106E@ 220P_0603_50V8J
LAN_MDI2+ 4 1 LAN_MDI3+
I/O3 I/O1
1
AZC099-04S.R7G_SOT23-6
Compal Electronics, Inc.
1
CK0402101V05_0402-2 L03ESDL5V0CG3-2_SOT-523-3
3 3
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

+3VS For ESD, keep close to RJ45 Connector
For LAN function Change back to connect to LANGND only
LAN WOL LAN_EN ISOLATEB on 20130201
1
RL2 2 1 10K_0402_5% LANCLK_REQ#

S0 Sx S0 Sx DL1 ESD@
+1.8VS
1K_0402_5% ---------------------------------------------- LANGND 2
RL8 1
@ 0 0 0 0 1 1 LANGND 3
2
ISOLATE# RL7 1 RS@ 2 0_0402_5% 0 1 0 0 1 1 YSLC05CH_SOT23-3

<9> LAN_EN WOL_EN# <25>
1 0 1 1 1 1
2
G
1 1 1 1 1 0*
1 3 LANCLK_REQ# RL9
<7> LAN_CLKREQ#
15K_0402_5%
D
Sx Enable Sx Disable *
QL1 Wake up Wake up S3: after SUSP# assert low over 100ms
BSS138_NL_SOT23-3
WOL_EN# LOW HIGH
S4/S5: after SYSON assert low over 100ms
4 4

PCIe-LAN-RTL8111
Custom 0.1
A B C D E
5 4 3 2 1
Small board Conn

CONN@
JSB4 CONN@ JSB5
30 32 1
+USB_VCCC 30 GND +USB_VCCC
29 31 2 1
28 29 GND 3 2
27 28 4 3
+5VALW 27 +5VALW
Close to JSB4 26 Close to JSB5 5 4
D +3VL 26 +3VL D
LR5 EMI@ 25 6 5
1 2 +3VS 24 25 +3VS 7 6
USB20_N2 1 2 USB20_N2_L RR13 1 14@ 2 0_0402_5% USB20_N2_L_R 23 24 USB20_N2_L RR17 1 15@ 2 0_0402_5% USB20_N2_L_R5 8 7
<9> USB20_N2 1 2 0_0402_5% USB20_P2_L_R 22 23 9 8
USB20_P2 USB20_P2_L RR14 14@ USB20_P2_L RR18 1 15@ 2 0_0402_5% USB20_P2_L_R5
<9> USB20_P2 4 3 21 22 10 9
4 3 20 21 PL 11 10
<24> PL 20
WCM-2012-900T_0805 <24> PR 19 PR 12 11
18 19 13 12
17 18 EXT_MIC_L 14 13
<24> EXT_MIC_L 17
<24> NBA_PLUG 16 NBA_PLUG 15 14
LR6 EMI@ 15 16 16 15
1 2 14 15 17 16
1 2 USB20_HUB_N0_L RR15 1 14@ 2 0_0402_5% USB20_HUB_N0_L_R 13 14 USB20_HUB_N0_L RR19 1 15@ 2 0_0402_5% USB20_HUB_N0_L_R5 18 17
<23> USB20_HUB_N0 1 2 0_0402_5% 12 13 19 18
USB20_HUB_P0_L RR16 14@ USB20_HUB_P0_L_R USB20_HUB_P0_L RR20 1 15@ 2 0_0402_5% USB20_HUB_P0_L_R5
<23> USB20_HUB_P0 12
4 3 11 LID_SW# 20 19
4 3 <25> LID_SW# 10 11 21 20
BATT_FULL_LED#
<25> BATT_FULL_LED# 10
WCM-2012-900T_0805 9 BATT_CHG_LOW_LED# 22 21
<25> BATT_CHG_LOW_LED# 8 9 23 22
PWR_SUSP_LED#
<25> PWR_SUSP_LED# 7 8 WL_BT_LED# 24 23
<25> WL_BT_LED# 7
6 TP_DATA 25 24
<25> TP_DATA 5 6 TP_CLK 26 25
<25> TP_CLK 4 5 27 26
TP_INTR#
<8> TP_INTR# TP_I2CSDA1 3 4 TP_I2CSDA1 28 27
TP_I2CSCL1 2 3 TP_I2CSCL1 29 28 31
Left USB 2.0 x 1 1 2
1
30 29 GND 32
30 GND
ACES_51522-03001-P01 ACES_51522-03001-P01
C W=80mils C
+5VALW +USB_VCCC
2.0A TP_I2CSDA1 R19 1
1
2 0_0402_5%
2 0_0402_5%
EC_SMB_DA2 <14,15,20,25,9>
UR4 TP_I2CSCL1 R20
2 6 EC_SMB_CK2 <14,15,20,25,9>
3 IN OUT 7
4 IN OUT 8 1
22_0402_5% @ 2 RC81
<25> USB_EN#1 1 EN/ENB OUT 5 1 2 RC82 PM_I2CSDA1 <9>
USB_OC#1 <25,9> 22_0402_5% @
GND OCB PM_I2CSCL1 <9>
G547I2P81U_MSOP8
SA00003TV00 NGFF SSD B Type connector
SA00003XM00
P/N:SP071212280
PJ8 @ +3VS
JNGFF JUMP_43X79
T16 @ 1 2+3VS_NGFF 1 2
3 PRESENCE# 3.3VAUX1 4 1 2
5 GND 3.3VAUX2 6
7 GND FULL_CARD_POWER_OFF# 8
9 USB_D+ W_DISABLE1# 10
+3VS_NGFF 11 USB_D- LED#
GND 12
0.1U_0402_10V7K 13 GPIO_5 14
<8> SSD_DETECT# 15 WWAN_DETECT# GPIO_6 16
1 1 1 WAKE_ON_WWAN# GPIO_7
17 18
C4 C5 C6 19 DPR W_DISABLE2# 20
21 GND UIM_RFU 22
2 2 2 23 USB3.0-TX- UIM-RESET 24
B 0.1U_0402_10V7K 4.7U_0603_6.3V6K 25 USB3.0-TX+ UIM-CLK 26 B
27 GND UIM-DATA 28 R10
Close to JNGFF 29 USB3.0-RX- UIM-PWR 30 1 2
31 USB3.0-RX+ DEVSLP 32 DEVSLP1 <7>
0_0402_5%
C16 1 2 0.01U_0402_25V7K SATA_PRX_DTX_P1 33 GND GPIO_0 34 @
<7> SATA_PRX_C_DTX_P1 1 2 0.01U_0402_25V7K 35 SATA-B+ GPIO_1 36
C18 SATA_PRX_DTX_N1
<7> SATA_PRX_C_DTX_N1 37 SATA-B- GPIO_2 38
C15 1 2 0.01U_0402_25V7K SATA_PTX_C_DRX_N1 39 GND GPIO_3 40
<7> SATA_PTX_DRX_N1 1 2 0.01U_0402_25V7K 41 SATA-A- GPIO_4 42
C17 SATA_PTX_C_DRX_P1
<7> SATA_PTX_DRX_P1 SATA-A+ RESERVED3
43 44
45 GND RESERVED4 46
47 RESERVED1 RESERVED5 48
49 RESERVED2 RESERVED6 50
51 GND RESERVED7 52
53 ANTCTRL0 COEX3 54
59 ANTCTRL3 SIM_DETECT 60
T17 TEST@ 61 RESET# SUSCLK 62
63 PCIE_DETECT 3.3VAUX3 64
65 GND 3.3VAUX4 66
SPK Conn. T18 TEST@ 67 GND
USB3_DETECT
3.3VAUX5
69 68
PEG2 PEG1
JSPK
1 CONCR_213BAAA32FA CONN@
<24> SPK_L1 2 1
<24> SPK_L2 2
3
<24> SPK_R1 4 3
<24> SPK_R2 5 4
A A
6 G1
G2
E&T_3802-F04N-01R
CONN@

NGFF SATA/S_B conn/SPK
Custom 0.1
5 4 3 2 1
5 4 3 2 1
USB Sleep & Charge RIGHT FRONT USB 2.0 W/S&C

State table for TPS2546RTER
UR3 +5VALW
CB0 CB1 CB2 ILIM_SEL Mode STATUS

+USB_VCCA
1
Auto-detection charger mode for Apple device(2A,1A). @ CR14
0 1 1 1 Auto Resistor dividers are connected to DP/DM. Including DCP
TPS2544RTER_QFN16_3X3 0.1U_0402_10V7K
Forced 1A charger mode for Apple devices. Resistor 2544@ 2
W=100mils 2.5A W=100mils
1 0 1 1 Alternate dividers are connected to DP/DM. UR2
D 1 12 D
9 IN OUT 10 USB20_N1_S
13 STATUS# DM_IN 11
1 1 1 0 SDP USB pass-through mode.DP/DM are connected to TDP/TDM PU USB_CHG_OC# FAULT# DP_IN
USB20_P1_S
PU <23,25,9> USB_CHG_OC# ILIM_SEL_R 4 2
<25> ILIM_SEL ILIM_SEL DM_OUT USB20_N1 <9>
USB pass-through mode with CDP emulation. RR11 0_0402_5%<25> USB_CHG_EN USB_CHG_EN 5 3 USB20_P1 <9>
6 EN DP_OUT 15 ILIM_LO 2 1
1 1 1 1 CDP DP/DM are connected to TDP/TDM <25> EC_CB0 CTL1 ILIM_LO
7 16 ILIM_HI RR12 2 1
20K_0402_1%
<25> EC_CB1 CTL2 ILIM_HI
8 14 RR10 20K_0402_1%
<25> EC_CB2 CTL3 GND 17
T-PAD
TPS2546RTER_QFN16_3X3
2546R@
Close to UR2 IN/OUT

+USB_VCCA
W=100mils
1 1 1
CR13 CR12 CR15
@
RIGHT REAR USB3.0 CONN.
47U_0805_6.3V6M
0.1U_0402_10V7K
4.7U_0603_6.3V6K
2 2 2
LR3 EMI@
3 4 USB20_P0_R
<9> USB20_P0 3 4
2 1 USB20_N0_R
C <9> USB20_N0 2 1 C
DLW21HN900SQ2L_4P LR4 EMI@

USB20_N1_S 3 4 USB20_N1_R
3 4 JUSBF CONN@
W=100mils 1
+USB_VCCA 1
USB20_P1_S 2 1 USB20_P1_R USB20_N1_R 2
2 1 USB20_P1_R 3 2
DLW21HN900SQ2L_4P 4 3
LR1 EMI@ 5 4
1 2 U3RXDP1_L 6 GND
<9> U3RXDP1 7 GND
8 GND
4 3 U3RXDN1_L GND
<9> U3RXDN1 SUYIN_020173GR004G43GZL_4P-T
DLW21SN670HQ2L_4P
LR2 EMI@ USB 2.0 HUB

1 2 U3TXDP1_C 1 2 U3TXDP1_C_L
<9> U3TXDP1
CR1 0.1U_0402_10V7K
1 2 U3TXDN1_C 4 3 U3TXDN1_C_L
<9> U3TXDN1
CR2 0.1U_0402_10V7K
DLW21SN670HQ2L_4P
+5VALW +5V_HUB +3V_HUB
+5VALW 1 2 +5V_HUB Vonder suggest Voltage up 10V

RR6 1 1 1
1 0_0603_5%
B CR9 CR8 CR10 B
2.0A W=80mils +USB_VCCB CR7
2
.1U_0402_16V7K
2
.1U_0402_16V7K
2
10U_0603_10V6M
+5V_HUB
W=80mils +3V_HUB 10U_0603_6.3V6M
+USB_VCCB 2
UR1 0.1U_0402_10V7K RR2 1 2 100K_0402_5% HUB_XRSTJ
19
20
25
1
2 6 UR3
3 IN OUT 7 RR3 1 2 100K_0402_5% HUB_BUSJ RR5
1 1
VDD5
VSS
VD33F
IN OUT
1
4 8 CR3 CR4 CR5 10K_0402_5%

<25> USB_EN#0 1 EN/ENB OUT 5 1 2 10K_0402_5% 12
@ RR1 HUB_VBUSM
GND OCB USB_CHG_OC# <23,25,9> <22> USB20_HUB_P0 11 DP1 1 1 2
HUB_OVCJ
2
2
2 2 1 2 <22> USB20_HUB_N0 10 DM1 OVCJ 2
G547I2P81U_MSOP8 CR6 0.01U_0402_16V7K CR11 0.01U_0402_16V7K
<20> USB20_HUB_P1 9 DP2 TESTJ 3
SA00003TV00 HUB_XOUT
<20> USB20_HUB_N1 8 DM2 XOUT 4 HUB_XIN
47U_0805_6.3V6M 4.7U_0603_6.3V6K
SA00003XM00 <17> USB20_HUB_P2 7 DP3 XIN 5
<17> USB20_HUB_N2 18 DM3 DM4 6 USB20_HUB_N3 <17>
HUB_BUSJ
HUB_VBUSM 17 BUSJ DP4 21 USB20_HUB_P3 <17>
HUB_XRSTJ 16 VBUSM DRV 22
15 XRSTJ LED1 23
<9> USB20_P3 14 DPU LED2 24
JUSBR CONN@
1 <9> USB20_N3 13 DMU PWRJ
+USB_VCCB VBUS REXT
USB20_N0_R 2
D-
1
USB20_P0_R 3 FE1.1S-BQFN24B_WQFN24_4X4
4 D+
U3RXDN1_L 5 GND 2.7K_0402_1%
DR1 @ESD@ U3RXDP1_L 6 StdA-SSRX- 10 RR4 SJ10000C200
7 StdA-SSRX+ GND 11 YR1
2
8
U3TXDN1_C_L 8 GND-DRAIN GND 12 HUB_XOUT 3 1 HUB_XIN
3 U3TXDP1_C_L 9 StdA-SSTX- GND 13 4 2
3 StdA-SSTX+ GND 12MHZ_18PF_7V12000001
U3TXDN1_C_L 5 5 6 6 U3TXDN1_C_L SINGA_2UB3914-000101F
U3TXDP1_C_L 4 4 7 7 U3TXDP1_C_L
U3RXDN1_L 2 2 9 8 U3RXDN1_L
A A
U3RXDP1_L 1 1 10 9 U3RXDP1_L
TVWDF1004AD0_SLP2510P8-10-9

USB3.0/S&C/Hub
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
5 4 3 2 1
5 4 3 2 1
20 mil
35mA for 3.3V level 40 mil
650mA for 5V level
UA1 RA22
close to pin 25 close to pin 38 RA18
+DVDD 0_0402_5% +3VS +AVDD 0.1U_0402_10V7K 0.1U_0402_10V7K 1 2 +5VS
MIC1_LINE1_R_R 4.7U_0603_6.3V6K CA23 MIC1_LINE1_R_C_R 22 1 +DVDD 1 2 1 2 1 0_0603_5%
MIC1_LINE1_R_L 4.7U_0603_6.3V6K CA22 MIC1_LINE1_R_C_L 21 MIC1_R DVDD 9 +DVDD_IO CA2
MIC1_L DVDD_IO 1
0.1U_0402_16V4Z CA13 CA15 CA12 CA17
17 25 +AVDD close to pin1 CA1
16 MIC2_R AVDD1 38 +AVDD 2 2.2U_0402_6.3V6M 10U_0603_6.3V6M 1 2 1 2
MIC2_L AVDD2 2 10U_0603_6.3V6M
+MIC1_VREFO_L
31 39 +PVDD
30 MIC1_VREFO_L PVDD1 46 +PVDD
29 MIC1_VREFO_R PVDD2 HDALink is 1.5V
<25> EC_MUTE_INT MIC2_VREFO RA1
60 mil
D 15 45 SPKR+ +DVDD_IO 0_0402_5% +1.5VS RA24 D
14 LINE2_R SPK_OUT_R+ 44 SPKR- +PVDD 1 2
LINE2_L SPK_OUT_R- 1 +5VS
1 2 0_0603_5%
CA14
CA8
20 40 SPKL+ 0.1U_0402_16V4Z 0.1U_0402_10V7K
MONO_OUT SPK_OUT_L+ 41 SPKL- close to pin9
SPK_OUT_L- 2 close to pin39 CA10
@ESD@ MONO_IN 12 2 1 10U_0603_6.3V6M
0.01U_0402_25V7K PCBEEP 75_0402_1%
CA25 1 2 10 33 HPOUT_R RA19 HP_R
<7> AZ_SYNC_HD SYNC HPOUT_R 32 HPOUT_L RA20 HP_L
11 HPOUT_L 75_0402_1%
<7> AZ_RST_HD# RESET# 1
CA7
10 mil 5 AZ_SDOUT_HD <7> 0.1U_0402_10V7K
SDATA_OUT 8 AZ_SDIN0_HD_R 2 1
close to pin19 SDATA_IN AZ_SDIN0_HD <7> close to pin46
close to pin 28 2 1 AC_JDREF 19 RA23 33_0402_5% 2
1 2 RA30 20K_0402_1% LDO_CAP 28 JDREF 6 AZ_BITCLK_HD
27 LDO_CAP BCLK AZ_BITCLK_HD <7>
CA24 10U_0603_6.3V6M AC_VREF
1 2 CPVEE 34 VREF
CA20 2.2U_0402_6.3V6M CBN 35 CPVEE 23
1 CBN LINE1_L
1
1 2 CBP 36 24
CA3 CA21 CA19 2.2U_0402_6.3V6M CBP LINE1_R 48
2.2U_0603_10V6K 0.1U_0402_10V7K NC
2
2 2
<17> INT_MIC_DATA 3 GPIO0/DMIC_DATA 26 1 RS@ 2
INT_MIC_CLK_R
GPIO1/DMIC_CLK AVSS1 37 RA45 0_0603_5%
AVSS2 42 1 RS@ 2
SENSE_A 13 PVSS1 43 RA46 0_0603_5%
2 @ 1 SENSE_B 18 SENSE_A PVSS2 7 1 RS@ 2
RA34 20K_0402_1% SENSE_B DVSS RA43 0_0603_5%
COMBO_GPI 47 AGND 1 2
4 EAPD 49 RA38 @EMI@ 0_0603_5%
<25> EC_MUTE# PD# Thermal Pad 1 2
C RA31 @EMI@ 0_0603_5% C
For EMI reserve ALC259-VC2-CG_MQFN48_6X6 For EMI reserve

259@ 12
close to codec PC605 0.1U_0603_50V7K
RA42 INT_MIC_CLK_R @EMI@
<17> INT_MIC_CLK
FBMA-10-100505-301T DGND CA18 1 2
CAM_EMI@ AZ_BITCLK_HD 2 @EMI@ 1 1 2 @EMI@ PC621 0.1U_0603_50V7K
10_0402_5% RA41 @EMI@
Internal AMP 10P_0402_50V8J
EC_MUTE#
Hight Enable
LOW Disable
SPK Combo Jack

Beep sound Change material
2W 4ohm =40mil For EMI reserve to SM01000GK00
1W 8ohm =20mil RA69 2.2K_0402_5%
close to codec +MIC1_VREFO_L
1 2
SPKL+ 1 Rshort@ 2 SPK_L1 <22>

RA7 0_0603_5% MIC1_LINE1_R_R 1 2 EXT_MIC LA3 EMI@ EXT_MIC_L <22>
RA35 1K_0402_5% 0_0402_5%
SPKL- 1 Rshort@ 2 SPK_L2 <22>
1
RA8 0_0603_5% MIC1_LINE1_R_L
PCI Beep 1 1 1
RA70
CA27 RA71
1 RA52 2 1 2 MONO_IN CA6 CA5 COMBO_GPI 11 2
22K_0402_5%
B<9> SOC_SPKR
CA26
CA16 22K_0402_5% B
100P_0402_50V8J
47K_0402_5% 1000P_0402_50V7K 1000P_0402_50V7K
0.1U_0402_10V7K 2 2 2
@EMI@ @EMI@
2
2
10U_0603_6.3V6M
RA49 CA4 2
4.7K_0402_5% 100P_0402_50V8J
if need EMI material

1
For better sound SPKR+ 1 Rshort@ 2 SPK_R1 <22>

will use SM01000GK00
RA9 0_0603_5%
by customer request
SPKR- 1 Rshort@ 2 SPK_R2 <22> HP_R LA2 1 Rshort@ 2 0_0402_5% PR <22>
RA10 0_0603_5% 1 1
CA9 CA11 HP_L LA1 1 Rshort@ 2 0_0402_5% PL <22>
1000P_0402_50V7K 1000P_0402_50V7K
2 2
@EMI@ @EMI@ 1 1 CA29
CA28
100P_0402_50V8J
100P_0402_50V8J
@EMI@ 2 2 @EMI@
Sense Pin Impedance Codec Signals Function
39.2K PORT-I (PIN 32, 33) Headphone out
20K PORT-B (PIN 21, 22) Ext. MIC

SENSE A
10K PORT-C (PIN 23, 24)
A place close to chip A
5.1K (PIN 48) SENSE_A

<22> NBA_PLUG
RA61 39.2K_0402_1%
39.2K PORT-E (PIN 14, 15)
SENSE B 20K PORT-F (PIN 16, 17) Security Classification Compal Secret Data Compal Electronics, Inc.
10K PORT-H (PIN 20) Cover Sheet
Custom 0.1
5 4 3 2 1
A B C D E
+3VL +3VL
CB3
0.1U_0402_10V7K RB1 1 RS@ 2 0_0402_5% H_PROCHOT# <7>
<35> VR_HOT#
0.1U_0402_10V7K 0.1U_0402_10V7K 1 2
1 1 1 1
1
For EMI CB1 CB2 @ @ CB5 1
0.1U_0402_10V7K D QB1 CB6
111
125
CB4 H_PROCHOT#_EC 2 47P_0402_50V8J
22
33
96
67
9
LPC_CLK_EC 2 2 2 2 UB1 G
0.1U_0402_10V7K S 2N7002K_SOT23-3 2
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
1
3
RB3
10_0402_5%
@EMI@ 1 21
1 GATEA20/GPIO00 GPIO0F WL_BT_LED# <22> 1
2 23 @
<8> KB_RST# USB_EN#0 <23>
2
3 KBRST#/GPIO01 BEEP#/GPIO10 26 BATT_PRES 1 2
1 <8> SERIRQ SERIRQ GPIO12 EC_CB2 <23>
CB9 4 27 CB7 100P_0402_50V8J
<9> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
22P_0402_50V8J 5
<9> LPC_AD3 LPC_AD3
@EMI@ 7 PWM Output ACIN 1 2
2 <9> LPC_AD2 LPC_AD2
8 63 BATT_PRES CB8 100P_0402_50V8J
<9> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_PRES <29>
10 LPC & MISC 64
<9> LPC_AD0 LPC_AD0 AD1/GPIO39 65
ADP_I/AD2/GPIO3A ADP_I <29,30>
LPC_CLK_EC 12 AD Input 66
<9> LPC_CLK_EC CLK_PCI_EC AD3/GPIO3B ADP_V <30> +3VS
PLT_RST_BUF# 13 75 TRANS_SEL
<20,21,8> PLT_RST_BUF# PCIRST#/GPIO05 AD4/GPIO42
EC_RST# 37 76
+3VL 20 EC_RST# IMON/AD5/GPIO43 EC_ENBKL <16,6>
RB2
<8> EC_SCI# EC_SCII#/GPIO0E
47K_0402_5% 38 H_PROCHOT#_EC 1 @ 2
<27> WOWL_EN# GPIO1D
1 2 EC_RST# RB4 10K_0402_5%
68 DFAN1 <19>
1 2 DAC_BRIG/GPIO3C 70
DA Output EN_DFAN1/GPIO3D +3VL
CB10 0.1U_0402_10V7K KSI0 55 71
KSI0/GPIO30 IREF/GPIO3E EC_CB0 <23>
KSI1 56 72
KSI1/GPIO31 CHGVADJ/GPIO3F VGATE <35>
KSI2 57
KSI3 58 KSI2/GPIO32 83 LID_SW# 1 2
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# <24>
ESD@ KSI4 59 84 RB17 47K_0402_5%
KSI4/GPIO34 USB_EN#/GPIO4B EC_SLP_S4# <8>
1 2 PLT_RST_BUF# KSI5 60 85 EC_SMB_CK3
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_SMB_CK3 <16> 1 2
CB11 0.1U_0402_10V7K KSI6 PS2 Interface EC_SMB_DA3 WLAN_WAKE#
KSI6/GPIO36 EAPD/GPIO4D EC_SMB_DA3 <16>
KSI7 62 87 TP_CLK RB19 47K_0402_5%
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <22>
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <22>
KSO1 40
KSO2 41 KSO1/GPIO21
KSI[0..7] KSO3 42 KSO2/GPIO22 97 +3VS
<26> KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 EC_CB1 <23>
KSO4 43 98
KSO[0..17] KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TP_CLK 1 2
<26> KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109
TXE_DBG <7>
VCIN0_PH connect to RB6 4.7K_0402_5%
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH <29>
2 +3VALW KSO7/GPIO27 SPI Device Interface power portion (9012 only)
2
KSO8 47 TP_DATA 1 2
KSO9 48 KSO8/GPIO28 119 RB7 4.7K_0402_5%
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SMB_CK3 1 2
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
1 2 USB_CHG_OC# KSO12 51 128 RB10 2.2K_0402_5%
RB20 10K_0402_5% KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
1 2 USB_OC#1 KSO14 53 KSO13/GPIO2D EC_SMB_DA3 1 2
RB21 10K_0402_5% KSO15 54 KSO14/GPIO2E 73 WLAN_WAKE# RB11 2.2K_0402_5%
KSO15/GPIO2F ENBKL/AD6/GPIO40 WLAN_WAKE# <20>
KSO16 81 74
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 WOL_EN# <21>
KSO17 82 89 ILIM_SEL
KSO17/GPIO49 FSTCHG/GPIO50 ILIM_SEL <23>
90
BATT_CHG_LED#/GPIO52 BATT_FULL_LED# <22>
RPB1 91
CAPS_LED#/GPIO53 CAPS_LED# <26>
+3VL
1 8 EC_SMB_CK1 EC_SMB_CK1 77 GPIO 92
<29,30> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_SUSP_LED# <22>
2 7 EC_SMB_DA1 EC_SMB_DA1 78 93 SYSON 1 2
<29,30> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_CHG_LOW_LED# <22>
+3VS
3 6 EC_SMB_CK2 EC_SMB_CK2 79 SM Bus 95 SYSON RB8 4.7K_0402_5%
4 5 <14,15,20,22,9> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <32>
EC_SMB_DA2 EC_SMB_DA2 80 121
<14,15,20,22,9> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <35>
127 SUSP# 1 2
2.2K_8P4R_5% PM_SLP_S4#/GPIO59 RB12 10K_0402_5%
6 100
<8> EC_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <13,8>
14 101
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <8>
15 102
<8> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 PROCHOT_IN <29>
USB_OC#1 16 103 H_PROCHOT#_EC PROCHOT_IN connect
<22,9> USB_OC#1 GPIO0A H_PROCHOT#_EC/GPXIOA06
1 2 E51_TXD USB_CHG_OC# 17 104 VCOUT0_PH_L to power portion (9012 only)
<23,9> USB_CHG_OC# GPIO0B VCOUT0_PH/GPXIOA07
RB15 100K_0402_5% 18 GPO 105
<23> USB_CHG_EN GPIO0C BKOFF#/GPXIOA08 BKOFF# <17>
19 GPIO 106
<22> USB_EN#1 GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <8>
25 107
<26> KB_LED EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
<19> FAN_SPEED1
28 108
FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 EC_SWI# <21>
29
<20> WL_OFF# EC_PME#/GPIO15
E51_TXD 30 VCOUT0_PH_L 1 RS@ 2
<20> E51_TXD EC_TX/GPIO16 VS_ON <31>
E51_RXD 31 110 ACIN RB16 0_0402_5%
<20> E51_RXD EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN <30,8>
32 112 EC_ON_R VCOUT0_PH connect to power portion (9012 only)
3 <13,8> PMC_CORE_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 3
34 114
<20> BT_ON SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFFBTN# <26>
1 2 EC_MUTE_INT 36 GPI 115 LID_SW#
<26> NUM_LED# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <22>
RB22 4.7K_0402_5% 116 SUSP#
SUSP#/GPXIOD05 SUSP# <27,32,33,34>
117
GPXIOD06 118
PECI_KB9012/GPXIOD07
AGND/AGND
EC_MUTE_INT 122
<24> EC_MUTE_INT XCLKI/GPIO5D +3VL
1 2 123 124
GND/GND
GND/GND
GND/GND
GND/GND
+EC_V18R
<31,33,34> POK XCLKO/GPIO5E V18R
RB5 0_0402_5% 1
GND0
RB23
CB13
4.7U_0805_10V4Z EC_SWI# 2 1
9012@ KB9012QF-A4_LQFP128_14X14 2
11
24
35
94
113
69
100K_0402_5%
Signal pull high is default status (ROM only mode).

If signal pull low, EC will send translator code to chip.(EP mode)
+3VL
For KB9012 EC_ON low pulse work around
2
RB14 EC_ON_R 1 2
EC_ON <31>
LVDS@ 10K_0402_5% RB18 2.2K_0402_5%
2
1
TRANS_SEL CB14
4.7U_0603_6.3V6K Close to EC
2
1
RB13 ESD@
@ 10K_0402_5% SUSP# 1 2
4 CB12 180P_0402_50V8J 4
1
Voltage Comparator Pins FOR 9012 A3
For Translator select EC DEBUG port VCIN0 pin109

CONN@
>1.2V <1.2V
VCIN1 pin102
JDB
1
1
+3VS HIGH
2 E51_TXD VCOUT0 pin104 LOW Issued Date 2014/01/03 2014/01/03 Title
2 3 E51_RXD (default) Deciphered Date
3 4 LOW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LPC-EC-KB9012&930
4 VCOUT1 pin103 Size Document Number Rev
HIGH (default) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
ACES_85205-0400 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D E
Compal Electronics, Inc.

5 4 3 2 1
+5VS
POWER LED
R5 15@
390_0402_5% D6 15@
Battery Reset
Power Button 1 2 2 1
+3VL HT-F196BP5_WHITE
R7 14@
2
390_0402_5% D7 14@
R18 1 2 2 1
15@ SW4
100K_0402_5% HT-F196BP5_WHITE TJG-533-V-T/R_6P
TJG-533-V-T/R_6P 3 1
1
3 1 ON/OFFBTN# ON/OFFBTN# <25>
<31> ENLDO 4 2
4 2 R9
2
390_0402_5% D8
5
6
3
2
D SW2 1 2 2 1 D
ESD@
0.1U_0402_10V7K
2
5
6
2 D232 DL6
YSOT24C_SOT23-3 HT-F196BP5_WHITE ESD@
ESD@
14@
C34
1
2
TJG-533-V-T/R_6P
1
3 1
1
DL7 L03ESDL5V0CC3-2_SOT23-3
4 2 ESD@
SW3
5
6
1
1
L03ESDL5V0CC3-2_SOT23-3
Keyboard LED Screw Hole

Q6 KBL@ CONN@ JBLG
+5VS AO3413_SOT23 1
1 2
2
D
3 1 +5VS_LED 3
3 4
4 +5VS_LED
1
5 WLAN standoff
R21 GND 6 SOC standoff
G
2
10K_0402_5% GND H29 H30
KBL@ ACES_50578-0040N-001 H31 H32 H_3P3 H_3P2
H_3P2 H_3P2 @ @
2
@ @
1
C C
1
1
D
2 Q7
<25> KB_LED G 2N7002KW_SOT323-3
KBL@
S
3
PTH NPTH
H6 H8 H9 H10 H11 H17 H18

H_3P0 H_5P2 H_4P1 H_6P5 H_6P5 H_2P5N H_3P0x2P5N
14 " KEYBOARD CONN. 15" KEYBOARD CONN. @ @ @ @ @ @ @
1
JKB4 JKB5 H19 H20
1 1 H_3P5x3P0N H_2P8N
1 <25> NUM_LED# 1
2 2 H13 H7 @ @
3 2 CAPS_LED# 3 2 H_3P5 H_3P0
<25> CAPS_LED#
1
2 1 +3VS_KB 4 3 +3VS_KB 4 3 @ @
+3VS 4 4
R22 300_0402_5% KSI1 5 KSI1 5
1
KSI6 6 5 KSI6 6 5
KSI5 7 6 KSI5 7 6
KSI0 8 7 KSI0 8 7
KSI4 9 8 KSI4 9 8
KSI3 10 9 KSI3 10 9
KSI2 11 10 KSI2 11 10
KSI7 12 11 KSI7 12 11
KSO15 13 12 KSO15 13 12
KSO12
KSO11
14
15
13
14
15
KSO12
KSO11
14
15
13
14
15
PCB Fedical Mark PAD
KSO10 16 KSO10 16
KSO9 17 16 KSO9 17 16
KSO8 18 17 KSO8 18 17 FD1 FD2 FD3 FD4
KSO13 19 18 KSO13 19 18
KSO7 20 19 KSO7 20 19 @ @ @ @
B 20 20 B
KSO6 21 KSO6 21
1
KSO14 22 21 KSO14 22 21
KSO5 23 22 KSO5 23 22
KSO3 24 23 KSO3 24 23
KSO4 25 24 KSO4 25 24
KSO0 26 25 KSO0 26 25
KSO1
KSO2
27
28
29
30
26
27
28
29
KSO1
KSO2
27
28
29
30
26
27
28
29
ISPD
31 30 KSO17 31 30
32 31 32 31
33 32 KSO16 33 32 ZZZ
34 33 34 33
34 35 34 35
GND1 36 KSI[0..7] GND1 36
GND2 KSI[0..7] <25> GND2
CVILU_CF17341U0R0-NH KSO[0..17] CVILU_CF17341U0R0-NH
KSO[0..17] <25>
CONN@ CONN@ PCB LA-A821P
A A

2014/01/03 2014/01/03 Title
Issued Date Deciphered Date
TP/ISPD/KB/Screw
0.1
5 4 3 2 1
A B C D E
Normall Platform (Not support M-STATE and Deep Sleep)
U1 PJ3 @
1 14 +3VS_OUT
+3VALW VIN1 VOUT1 +3VS
2 13
VIN1 VOUT1 C20 JUMP_43X118
SUSP# R24 2 1 47K_0402_5% 3VS_ON 3 12 2 1 330P_0402_50V7K
1 ON1 CT1 C32 2 1 4.7U_0603_6.3V6K 1
C22 2 1 .1U_0402_16V7K 4 11
+5VALW VBIAS GND C33 2 1 4.7U_0603_6.3V6K
R23 1 2 0_0402_5% 5VS_ON 5 10 2 1
ON2 CT2 330P_0402_50V7K
6 9 C19 PJ4 @
+5VALW VIN2 VOUT2
C21 1 2 .1U_0402_16V7K 7 8 +5VS_OUT
VIN2 VOUT2 +5VS
@ 15 JUMP_43X118
GPAD
TPS22966DPUR_SON14_2X3
+3VALW +3VALW TO +3V_WLAN
+3VALW
for WOWL
1
2 WOWL@
RM4 CM4 Vgs=-4.5V,Id=3A,Rds<97mohm
WOWL@ 10K_0402_5% 0.1U_0402_10V7K
U4 PJ5 @
1 14 +1.8VS_OUT 1 Need mount RM1 if system
+1.8VALW +1.8VS
2
VIN1 VOUT1
3
S
2 13 don't support WOWL
VIN1 VOUT1 C23 JUMP_43X118 1 RM3 2 2
G
AO3413_SOT23
2 1 47K_0402_5% 3 12 2 1 330P_0402_50V7K <25> WOWL_EN#
2
SUSP# R27 1.8VS_ON 47K_0402_5% QM1 2
ON1 CT1 C24 2 1 4.7U_0603_6.3V6K WOWL@ D +3V_WLAN
2
1
1
C25 1 2 .1U_0402_16V7K 4 11 WOWL@ WOWL@
+5VALW VBIAS GND C26 2 1 4.7U_0603_6.3V6K RM2 CM5
R28 2 1 0_0402_5% 1.35VS_ON 5 10 2 1 100K_0402_5% 0.01U_0402_25V7K RM1
ON2 CT2 330P_0402_50V7K 1 1 2
+3VS
6 9 C27 PJ6 @ 0_0603_5%
+1.35V
2
C28 1 2 .1U_0402_16V7K 7 VIN2 VOUT2 8 +1.35VS_OUT NOWOWL@
VIN2 VOUT2 +1.35VS
@ 15 JUMP_43X118
GPAD
TPS22966DPUR_SON14_2X3
+1.0VALW TO +1.0VS +5VALW

+0.675VS
+1.0VALW
2
U5 +1.0VS
1
3 AO4304L_SO8 R29 3
8 1 100K_0402_5%
2 7 2 2 R26
C29 6 3 C30 22_0603_5%
1
4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K SUSP
SUSP
2
1 1 +0.675VS_R
4
1
D
R25 2 D
<25,32,33,34> SUSP# 2
470_0603_5% G Q1 SUSP
1
+5VALW S 2N7002K_SOT23-3 G
1
R30 Q4 S
3
2 1 1.0VS_GATE +1.0VS_R 10K_0402_5% 2N7002K_SOT23-3
3
1
R31
47K_0402_5% 1 D
2
1
C31 2 SUSP
D .1U_0402_16V7K G
SUSP 2 S Q3
G 2 2N7002K_SOT23-3
3
Q2 S
2N7002K_SOT23-3
3
4 4

DC INTERFACE
B 0.1
A B C D E
A B C D
Other component (37.1) VIN

CONN@ A51 need add fuse
EMI Part (47.1)
1 1
PJP1 EMI@ PL101

ACES_50299-00401-001 PF1 FBMA-L11-201209-121LMA50T_0805
1 DC_IN 1 2 DC_IN_S1 1 2
1 2
2 3 7A_32V_S1206-H-7.0A
3 4 1 2
4 EMI@ PL102
FBMA-L11-201209-121LMA50T_0805
1
EMI@ PC102 EMI@ PC103 EMI@ PC101 EMI@ PC104
1000P_0603_50V7K 100P_0603_50V8 100P_0603_50V8 1000P_0603_50V7K
2
2
For ML1220 RTC (38.2) 2
PR101 PR102
560_0603_5% 560_0603_5%
1 2 +RTC_R 1 2
+RTCBATT
1
PBJ101
+ ML1220T13RE
@
+RTC
-
2
3 3
4 4

Issued Date Title
Deciphered Date
DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS ZRMAA 0.1
Date: Sheet 28 of 40
A B C D
A B C D
Other component (37.1)

CONN@
EMI Part (47.1) OTP (39.7)
1
PJP2 VMB 1
10 PF2 EMI@ PL2

GND
GND
9
8 BATT_S1
10A_125V_TR2/6125FF10-R
1 2
FBMA-L11-201209-121LMA50T_0805
1 2
+3VL
8 7 BATT+
7 6 <25,30> ADP_I
6 5 BATT_P5
12.1K_0402_1%
5
1
4 EC_SMDA 1 2
4
2
3
PR4
EC_SMCA EMI@ PL3
3
1
2 FBMA-L11-201209-121LMA50T_0805 PR1
2 1 PR14 1K_0402_1%
1
1
1K_0402_1% EMI@ PC8
2
ACES_50458-00801-001 EMI@ PC7 0.01U_0402_25V7K RS@ PR2 RS@ PR5
1
1000P_0402_50V7K 0_0402_5% 0_0402_5%
100K_0402_1%_TSM0B104F4251RZ
1 2 1 2
<25> PROCHOT_IN <25> VCIN0_PH
+3VL
1
PR3
1
20K_0402_1% @ PC11
PH1
0.1U_0402_10V7K
PR16
2
6.49K_0402_1%
2
2
1 PR19
2 2
1K_0402_1%
2
1
PR20 PR21 BATT_PRES <25>

100_0402_1% 100_0402_1% Initial Recovery
2
EC_SMB_DA1 <25,30>
45W 0.55V 0.43V

EC_SMB_CK1 <25,30> UMA
75W 0.90V 0.72V

N14P-GV2
Initial Recovery
CPU
OTP 90 C 70 C
3 3
4 4

Issued Date Title
Deciphered Date
BATTERY CONN / OTP
0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. ZRMAA
A B C D
A B C D
for reverse input protection
Charger controller (40.1), Support component (40.2)
1
D
2 PQ209
G SSM3K7002FU_SC70-3
S
3
PR225 PR226
1 2 1 2
1
1M_0402_5% 3M_0402_5% 1
EMI Part (47.1)

VIN P1 P2 B+
PQ203 PQ205 PR211 EMI@ PL201 PQ207
TPCA8057-H_PPAK56-8-5 SI7716ADN-T1-GE3_POWERPAK8-5 0.01_1206_1% 1UH_NRS4018T1R0NDGJ_3.2A_30% SI7716ADN-T1-GE3_POWERPAK8-5
1 1 1 4 1 2 1
2 2 2
5 3 3 5 2 3 5 3
PC214
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
1
PC211
PC213
2200P_0402_50V7K
0.01U_0402_50V7K
1
VIN
PC231
4
1
@EMI@
PC234
2
2
1 2
PC230
2
1
2
3
2
PC236
0.1U_0402_25V6
2
BQ24735_ACDRV_1 PD230
BAS40CW_SOT323-3 BQ24735_BATDRV 1 2BQ24735_BATDRV_1
0.1U_0402_25V6
0.047U_0402_25V7K PR233
0.1U_0603_25V7K
1 1
10_1206_1%
4.12K_0603_1%
PC237
1
PC238
PR228
PC235
1 2
5
2
1
2.2_0603_5%
PD231
PR229
BQ24735_VCC2
RB751V-40_SOD323-2 PR210 PQ201
0_0603_5% AON7408L
DH_CHG 1 2 4
BQ24735_BST 2
BQ24735_REGN 2
2
PC239 2
BQ24735_LX
4.12K_0603_1%
4.12K_0603_1%
1
1 2 BATT+
PR234
PR235
DH_CHG
PL202
3
2
1
1U_0603_25V6K PC205 4.7UH_ETQP3W4R7WFN_5.5A_20% PR227
BQ24735_ACP
BQ24735_ACN
1 2 0.01_1206_1%
BQ24735_LX 1 2 CHG 1 4
2
1U_0603_25V6K
5
2 3
20
19
18
17
16
@EMI@ PR206
PU200
CSON1
CSOP1
1
4.7_1206_5%
VCC
REGN
BTST
PHASE
HIDRV
21
10U_0805_25V6K
10U_0805_25V6K
PQ202
PAD
0.1U_0402_25V6
0.1U_0402_25V6
1
PC222
PC223
1 15 DL_CHG 4 AON7406L
ACN LODRV
PC240
PC241
2
2
2 14
ACP GND PR236
680P_0603_50V8J
3
2
1
2
1
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
@EMI@ PC206
BQ24735_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP
1
PR237
2
6.8_0603_5%
BQ24735_ACDRV 4 12 SRN 1 2 CSON1
2
ACDRV SRN
5 11 BQ24735_BATDRV PC242
ACOK BATDRV 0.1U_0603_16V7K EMI Part (47.1)
ACDET
BQ24735_ACOK
IOUT
SDA
SCL
ILIM
1 2 +3VALW
+3VL
10
PR239 10K_0402_1%
3 3
BQ24735_ILIM 1 2
PR241
VIN
0.01U_0402_25V7K
<25,8> ACIN
100K_0402_1%
357K_0402_1%
PC243
PR242
1
BQ24735_ACDET
VIN
1
422K_0402_1%
2
1
PR247
PR244
309K_0402_1%
2
2
ADP_V <25>
Vin Dectector
1
0.1U_0402_25V6
66.5K_0402_1%
EC_SMB_CK1 <25,29>
1
1
@ PC247
Min. Typ Max. PR249
1
0.1U_0402_10V7K
PR245
PC244
47K_0402_1%
H-->L 17.23V
2
EC_SMB_DA1 <25,29>
2
2
L-->H 17.63V
2
RS@ PR246
PC245 0_0402_5%
2 1 1 2
ILIM and external DPM ADP_I <25,29>
100P_0402_50V8J For A51 ADP_V function
3.61A
1
@ PC246
0.1U_0402_10V7K
2
4
Please locate the RC 4
Near EC chip

Issued Date Title
Deciphered Date
CHARGER
0.1
A B C D
A B C D
3/5VALW controller (35.1), Support component (35.2)
1 1
@ PC345
100P_0402_50V8J PR350
1 2 30K_0402_1%
56K_0402_1%
143K_0402_1%
160K_0402_1%
1
1
1 2
B+ 3/5V_B+
PR330
PR337
PR342
PR357
EMI Part (47.1) 14K_0402_1%
3/5V_B+
1 2
TON_35V 2
ENTRIP_5V 2
1 2 PR331
ENTRIP_3V
EMI@ PL331 20K_0402_1%
HCB2012KF-121T50_0805 1 2 FB_3V PR351
19.1K_0402_1%
10U_0603_25V6M
PR335 VFB=2V FB_5V 1 2
10U_0603_25V6M
2200P_0402_50V7K
1
100K_0402_1%
@EMI@ PC339
PC361
1
1 2 VFB=2V
PC340
+3VL
5
AON7408L
2
1
PQ331
<25,33,34> POK
4 PQ351
FB2
ENTRIP2
ENTRIP1
FB1
TON
21 AON7408L_DFN8-5
6 PAD
PC335 PR333 PGOOD 20 4
0.1U_0402_10V7K 0_0402_5% BYP1 PR355 PC355
1
2
3
1 2 BST1_3V 1 2 BST_3V 7 0_0402_5% 0.1U_0402_10V7K
BOOT2 19 BST_5V 1 2 BST1_5V 1 2
2 BOOT1 2
3
2
1
UG_3V 8
PL332 UGATE2 18 UG_5V
2.2UH_ETQP3W2R2WFN_8.5A_20% UGATE1 PL352
1 2 LX_3V 9 2.2UH_ETQP3W2R2WFN_8.5A_20%
+3VALWP PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP
5
LG_3V 10
LGATE2
1
16 LG_5V
@EMI@ PR336
ENLDO
4.7_1206_5%
SECFB
100U_D_6.3VM_R15M
LGATE1
1
LDO5
LDO3
1
VIN
@EMI@ PR356
3VALW
4.7_1206_5%
150U_D_6.3VM_R18M
+
PC331
1
Ipeak : 9 A 4 PU330
1 SNUB_3V 2
11
12
13
14
15
RT8243AZQW_WQFN20_3X3 +
PC351
SNUB_5V 2
Imax : 6.3 A 2
+3VLP
4
Iocp : 10.5 A FDMC7692S_MLP8-5 PR334 PQ352 2
680P_0603_50V8J
1
2
3
499K_0402_1% FDMC7692S_MLP8-5
@EMI@ PC336
FSW : 455 kHz PQ332
1
1 2 PC344 PC341
680P_0603_50V8J
3/5V_B+
3
2
1
4.7U_0603_10V6K 4.7U_0603_10V6K
@EMI@ PC356
Rds=10.8mΩ(Typ) Rds=10.8mΩ(Typ)
1
100K_0402_1%
1U_0603_10V6K
0.1U_0603_25V7K
13.6mΩ(Max) 13.6mΩ(Max)
2
1
2
1
PC360
PR338
PC342
2
2
2
5VALW
2
EMI Part (47.1) ENLDO <26> Ipeak : 9.8 A
PR340 EMI Part (47.1) Imax : 6.8 A
2.2K_0402_1%
3
1 2 Iocp : 11.8 A 3
<25> EC_ON FSW : 390 kHz

RS@ PR341
0_0402_5%
1 2
<25> VS_ON
4.7U_0603_6.3V6K
100K_0402_5%
1
PC343
@ PR332
2
2
@ PJ332 @ PJ331
+3VLP
1 2 +3VL
1 2
1 2 +3VALWP 1 2 +3VALW
JUMP_43X39 JUMP_43X118
@ PJ351
1 2
+5VALWP 1 2 +5VALW
JUMP_43X118
4 4

Issued Date Title
Deciphered Date
3VALW/5VALW
0.1
A B C D
A
DDR controller (35.3), Support component (35.4)

EMI Part (47.1)
EMI@ PL151
HCB1608KF-121T30_0603
B+ 1 2 1.35V_B+ PR155
0_0603_5%
BST_1.35V-1 1 2 BST_1.35V +1.35V
10U_0603_25V6M
2200P_0402_50V7K
DH_1.35V +0.675VSP
PC152
1
0.1U_0603_25V7K
PC154
1
SW_1.35V
PC155
10U_0805_6.3V6K
10U_0805_6.3V6K
2
2
@EMI@
1
PC159
PC160
2
5
16
17
18
19
20
PU150
2
VLDOIN
BOOT
VTT
PHASE
UGATE
21
AON7408L
PAD
PQ151
4 DL_1.35V 15 1
LGATE VTTGND
14 2
PL152 PR158 PGND VTTSNS
1
2
3
1UH_PCMB063T-1R0MS_12A_20% 15K_0402_1%
2 1 1 2CS_1.35V 13 3
+1.35VP PC162 CS RT8207MZQW_WQFN20_3X3 GND
5
1U_0603_10V6K
1 2 12 4 VTTREF_1.35V
FDMC7692S_MLP8-5
PR159 VDDP VTTREF
DDR 1.35 V 1 5.1_0603_5%
1
220U_D2_2V_17m
Ipeak : 8.9 A 1 2 VDD_1.35V 11 5 +1.35VP
PQ152
+ VDD VDDQ
PGOOD
@EMI@ PR156 4
PC157
Imax : 6.3 A
1
4.7_1206_5%
TON
+5VALW +5VALW PC163
FB
S5
S3
Iocp : 11 A
SNUB_+1.35VP 2
1
2 0.033U_0402_16V7K
2
PC164
FSW : 306 kHz
1
2
3
10
6
Rds=10.8mΩ(Typ) 1U_0603_10V6K
+1.35VP
2
13.6mΩ(Max) +1.35VP
1
PR1056
TON_1.35V
1
10K_0402_1% PR162 PR160

@EMI@ PC156 10K_0402_1% 8.06K_0402_1%
680P_0402_50V7K
2
2
<5> DDR_PWROK
2
PR161 FB_1.35V
EMI Part (47.1) 825K_0402_1% VFB=0.75V
RS@ PR163 1.35V_B+ 1 2
0_0402_5%
1 1
1 2 EN_1.35V
<25> SYSON
EN_0.675VSP
@ PJ675
1
1 2 @ PC166 PR164
+0.675VSP 1 2 +0.675VS 0.1U_0402_10V7K 0_0402_5%
JUMP_43X39 1 2
2
<25,27,33,34> SUSP#
@ PJ1351
1 2 +1.35V
+1.35VP 1 2
1
JUMP_43X118 PC167
0.1U_0402_10V7K
2
STATE S3 S5 1.5VP VTT_REFP 0.75VSP
S0 Hi Hi On On On
Off
S3 Lo Hi On On (Hi-Z)
S4/S5 Lo Lo Off Off Off

(Discharge) (Discharge) (Discharge) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date Title
Deciphered Date
Note: S3 - sleep ; S5 - power off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.35VP/0.675VSP
Custom 0.1
A
5 4 3 2 1
PR601
10K_0402_5%
1 2
POK <25,31,34>
1
@ PC601 JP@ PJ601
D PR602 0.1U_0402_16V7K +1.0VALWP 1 2 +1.0VALW D
1M_0402_1% 1 2
2
JUMP_43X118
2
@EMC@ PR603 @EMC@ PC602
4.7_1206_5% 680P_0603_50V7K
EMC@ PL601 1 2SNB_1.0V 1 2
HCB2012KF-121T50_0805 PU601
1 2 8 1
B+ B+_1.0V
IN EN
PR604 PC603
10U_0603_25V6M
10U_0603_25V6M
0_0603_5% 0.1U_0603_25V7K
2200P_0402_50V7K
EMC@ PC604
6 BST_1.0V 1 2 1 2 PL602
BS
1
PC606
PC607
1UH_PCMB063T-1R0MS_12A_20%
9
GND LX
10 LX_1.0V 1 2
+1.0VALWP
22U_0603_6.3V6M
22U_0603_6.3V6M
13.7K_0402_1%
1
330P_0402_50V7K
47U_0805_2.5V7
47U_0603_2.5V7
1
1
PR606
4
FB
PC608
PC609
PC610
PC611
PC612
ILMT_1.0V 3 7 FB = 0.6V
Rup
+3VALW
2
ILMT BYP
4.7U_0603_6.3V6K
2
4.7U_0603_6.3V6K
1 2 2 5
+3VALW +1.0V_PGOOD
PG LDO
LDO_3V
PC614
PR607
PC613
10K_0402_5% SY8206DQNC_QFN10_3X3
1
2
PR609
Pin3 I-LIMIT state Current Limit 20K_0402_1%
C LDO_3V Rdown C
2
Pin 7 BYP is for CS.
1
Low 6A Common NB can delete +3VALW and PC15
@ PR605
0_0402_5%
Floating 8A VFB=0.6V
2
ILMT_1.0V
Vout=0.6V* (1+Rup/Rdown)
1
High 12A PR608
Vout=1.05V
0_0402_5% +3VS
1
@PC615
@ PC615
1U_0402_6.3V6K
2
Note:Iload(max)=3A
PU602
APL5930KAI-TRG_SO8
6
VCNTL
0.022U_0402_16V7K
5 3
B 9 VIN VOUT 4 +1.5VSP B
VIN VOUT
1
1
PC616 8
EN
1
PC617
4.7U_0603_6.3V6K 7 2 PR610
GND
POK FB
22U_0603_6.3V6M
22U_0603_6.3V6M
20K_0402_1%
2
1 1
2
FB=0.8V
PC618
PC619
RS@ PR611 FB_1.5VSP
0_0402_5% @
1 2 +1.5VSP_ON 2 2
<25,27,32,34> SUSP#
1
1
PR612
1
@ PR613
@PR613 22.6K_0402_1%
@ PC620 22K_0402_5%
2
2 0.1U_0402_16V7K
2
Ien=10uA, Vth=0.3V, notice
the res. and pull high
A
@ PJ602 voltage from HW A
1 2
+1.5VSP 1 2 +1.5VS
JUMP_43X39

+1.5VSP
Custom 0.1
V5WE2 M/B LA-9531P Schematic
5 4 3 2 1
5 4 3 2 1
D D
PU105
PL1051 SY8032ABC_SOT23-6 PL1052
HCB1608KF-121T30_0603 1UH_NRS4018T1R0NDGJ_3.2A_30%
+5VALW 1 2 1.05_B+ 4 3 LX_1.05V 1 2
+1.05VSP
IN LX
5 2
68P_0402_50V8J
PG GND
1
4.7_0402_1%
1
1
6 1
PC1056
PC1053 FB EN PR1053
PR1055
22U_0805_6.3VAM
7.5K_0402_1%
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
PC1052
PC1051
1
RS@ FB_1.05V
PR1051
680P_0402_50V7K
2
1 2 EN_1.05V
<25,27,32,33> SUSP#
1
PC1055
0_0402_5% PR1054
2
10K_0402_1%
1
@ PR1052 PC1054
2
499K_0402_1% @ 0.1U_0402_10V7K
2
C C
2
@ PJ105
1 2
+1.05VSP 1 2 +1.05VS
JUMP_43X79
1.8VS controller (35.15), Support component (35.16) +1.8VALWP 1

@ PJ180
2 +1.8VALW
1 2
B JUMP_43X79 B
PU180
PL181 SY8032ABC_SOT23-6 PL182
HCB1608KF-121T30_0603 1UH_NRS4018T1R0NDGJ_3.2A_30%
+5VALW 1 2 4 3 LX_1.8V 1 2
+1.8VALWP
IN LX
5 2
68P_0402_50V8J
PG GND
1
4.7_0402_1%
1
1
6 1
PC187
PC184 FB EN PR183
PR186
22U_0603_6.3V6M
20K_0402_1%
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
PC183
PC182
1
RS@ FB_1.8V
PR181
2
680P_0402_50V7K
1 2 EN_1.8V
<25,31,33> POK
1
PC186
0_0402_5% PR184
1
2
10K_0402_1%
1
@ PR182 PC185
2
499K_0402_1% @ 0.1U_0402_10V7K
2
2
A A

+1.05VSP/1.8VSP
Custom 0.1
5 4 3 2 1
5 4 3 2 1
1
@ PC802
1000P_0402_50V7K
2
<10> VGFX_VSNS
1
LGATEG
PC803
<10,35> VCORE_GSNS
0.01UF_0402_25V7K
2
PHASEG
PR813 PC816 PQ801

D PC804 PC805 2.2_0603_5% 0.1U_0402_25V7K 6 D
68P_0402_50V8J
470P_0402_50V7K BOOTG 1 2 1 2 7 G2
PC806 1 2 1 2 1 2 RS@ PR809 0_0603_5% S1/D2 5
6800P_0402_25V7K PR802 CPU_B+ UGATEG1 1 2 UGATEG1-1 1 S2
PC807 499_0402_1% G1 4
1 2 150P_0402_50V8J 2 S2
D1
1
1 2 1 2 1 2 3
649 +-1% 0402
10U_0805_25V6K
10U_0805_25V6K
PR804 PR805 S2
PR803
2200P_0402_50V7K
1
Close GFX choke 137K_0402_1% 1.47K_0402_1%
1
AON6932A_DFN5X6-8-7
PC808
PC809
PC810
PH801 PR807 PR806
33.2K_0402_1%
2
1
10K_0402_1%_ERTJ0EG103FA 158_0402_1% 2K_0402_1% 0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A
PR808
2
VSUMG- 1 2
1 2
1
@EMC@
PL803
@ 0.22UH_FDUE0640J-H-R22M-P3_25A_20% +SOC_VNN
.1U_0402_16V7K
PC812
+3VALWP
2
1 4
@ PC813
330P_0402_50V7K
0.047U_0603_25V7K
2
1
11K_0402_1%
1 2
0.1U_0402_25V7K
2 3
2.61K_0402_1%
1.91K_0402_1%
1
1
PC815
PR811
PC814
2
1
PR810
BOOTG
1
PR814 @EMC@
2
UGATEG1 4.7_1206_5% PR816
2
3.65K_0402_1% 0_0402_5%
1 2
VSUMG+ PHASEG PR815
PR812
2
PC817 @EMC@
LGATEG +5VALW 680P_0402_50V7K
VSUMG+
PR817 PU801
33
32
31
30
29
28
27
26
25
VSUMG-
27.4K_0402_1%
1 2
PAD
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
C C
1U_0402_6.3V6K
PH802 PR818
Close GFX L/S MOS
1
470K +-5% ERTJ0EV474J 0402 3.83K_0402_1%
1
1 2 NTCG_1 1 2 NTCG 1 24
PC818
NTCG PHASEG RS@ PR819 PR820 LGATE1
1 2 2 23 0_0603_5% 1_0603_5%
<25> VR_ON
2
RS@ PR821 0_0402_5% VR_ON LGATEG
2
2
1 PR843 2 VR_SVID_CLK_R 3 22 PHASE1
<8> VR_SVID_CLK SCLK VCCP
20_0402_1% PR830 PC827 PQ803
PR844 VR_SVID_ALERT# 4 ISL95833HRTZ-T_TQFN32_4X4 21 2.2_0603_5% 0.1U_0402_25V7K 6
<8> VR_SVID_ALRT# ALERT# VDD G2
16.9_0402_1% @ PR801 1.91K_0402_1% BOOT1 1 2 1 2 7
1 2 VR_SVID_DATA_R 5 20 1 2 RS@ PR827 0_0603_5% S1/D2 5
PC801
1U_0402_6.3V6K
<8> VR_SVID_DAT SDA PWM2 S2
1
UGATE1 1 2 UGATE1-1 1
6 19 LGATE1 G1 4
<25> VR_HOT# VR_HOT# LGATE1 S2
2
2
NTC 7 18 PHASE1 D1 3
NTC PHASE1 S2
For VR_HOT#, already
PGOOD
1 2 8 17
BOOT1
ISUMN
pull high at power side.
ISUMP
COMP
ISEN2 UGATE1
ISEN1
AON6932A_DFN5X6-8-7
3.83K_0402_1%
RTN
1
@ PC825 PR822
FB
73.2_0402_1%
499_0402_1%
73.2_0402_1%
1
47P_0402_50V8J 0_0402_5%
PR829
UGATE1 B+ CPU_B+
PR823
PR824
PR825
+5VALW
2
10
11
12
13
14
15
16
EMC@ PL802
BOOT1 HCB2012KF-121T50_0805
2
1 2
2
470K +-5% ERTJ0EV474J 0402
@ NTC_1
VGATE <25>
0.1U_0402_25V6
27.4K_0402_1%
1 1
10U_0805_25V6K
10U_0805_25V6K
1
+1.0VS 1 2 +3VALWP + +
PH803
PR826
33U_25V_M
33U_25V_M
1
1
PC822
PC823
PC819
PC820
0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A
PC824
1
B PR828 1.91K_0402_1% B
@ PC826 2 2 PL805
2
2
0.1U_0402_16V7K 0.22UH_FDUE0640J-H-R22M-P3_25A_20% +SOC_VCC
Close CPU L/S MOS
2
@
1 4
1
2 3
680P_0402_50V7K 4.7_1206_5%
@EMC@
PR831
PC828 PR832 @ PR833
470P_0402_50V7K 2K_0402_1% 42.2K_0402_1% VSUM+
2
1 2 1 2 1 2
2.61K_0402_1%
1
1
PR834
@EMC@
PR835 PR836
11K_0402_1%
PC830 PC831 3.65K_0402_1%
PC829
0_0402_5%
649 +-1% 0402
0.033U_0402_16V7K
1
470P_0402_50V7K 68P_0402_50V8J
PR838
2
1
0.1U_0402_25V7K
1 2 1 2 1 2
PC832
2
1
PR837
240_0402_1%
PC833
499_0402_1%
PR839
1
2
PR840 PH804
Close CPU choke
2
PR841 PC834 VSUM+

6800P_0603_50V7K
2
1
2.21K_0402_1% 150P_0402_50V8J 10K_0402_1%_ERTJ0EG103FA

PC835
1 2 1 2 1 2 2
PR842
2
137K_0402_1% VSUM-
VSUM-
@ PC836
0.1U_0402_16V7K
330P_0402_50V7K
1
1 2
@ PC837
A A
2
<10> VCORE_VSNS
1 2
PC838
0.01UF_0402_25V7K
<10,35> VCORE_GSNS Security Classification Compal Secret Data Compal Electronics, Inc.
CPU_CORE/VGFX_CORE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom Bay Trail M LA-A821P 0.1
5 4 3 2 1
5 4 3 2 1
D D
+SOC_VNN
PC913 1 2 22U_0603_6.3V6M
+SOC_VCC PC914 1 2 22U_0603_6.3V6M
PC915 1 2 22U_0603_6.3V6M
CC9011 2 22U_0603_6.3V6M PC916 1 2 22U_0603_6.3V6M
CC9031 2 22U_0603_6.3V6M
CC9051 2 22U_0603_6.3V6M
CC9071 2 22U_0603_6.3V6M PC917 2 1 330U_D2_2.5VY_R9M
Output Cap
+
PC918 2 1 560U_D2_2VM_R4.5M
Output Cap 2 1
+
C C
+
PC909 560U_D2_2VM_R4.5M
+SOC_VCC +SOC_VNN
Package Edge Cap PC929 1 2 22U_0603_6.3V6M
PC920 1 2 10U_0603_6.3V6M
PC921 1 2 10U_0603_6.3V6M
PC922 1 2 10U_0603_6.3V6M Package Edge Cap
PC930 1 2 10U_0603_6.3V6M
PC931 1 2 4.7U_0603_10V6K
Back Side Cap PC932 1 2 4.7U_0603_10V6K
PC923 1 2 1U_0402_6.3V6K
PC933 1 2 2.2U_0402_6.3V6M PC924 1 2 1U_0402_6.3V6K
PC934 1 2 2.2U_0402_6.3V6M PC925 1 2 1U_0402_6.3V6K Back Side Cap
B @ PC926 1 2 0.1U_0402_16V7K B
@ PC927 1 2 0.1U_0402_16V7K
@ PC928 1 2 0.1U_0402_16V7K
A A

CPU_CORE_CAP
B Bay Trail M LA-A821P 0.1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Issued Date Deciphered Date Title
PIR (PWR)
Bay Trail M LA-A821P 0.4
5 4 3 2 1
A B C D E
HW PIR (Product Improve Record)
1 1
2 2
3 3
4 4

HW-PIR
A B C D E
A B C D E
1 1
2 2
3 3
4 4

HW-PIR
A B C D E
A B C D E
1 1
2 2
3 3
4 4

HW-PIR
A B C D E
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Intel Baytrail-M Platform: A B C D E

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A B C D E

Intel BayTrail-M Platform

Security Classification Compal Secret Data Compal Electronics, Inc.

LVDS Conn. LVDS Translator Debug 1.35V DDR3L 1066/1333

Conn. P.13 204pin DDR3L-SO-DIMM X1

P.21 SOC port 1 port 3

1.8V (8MB) KB9012QF A4 ALC259 P.24 P.22

Touch pad/LED B P.28~P.36

Voltage Rails Board ID / SKU ID Table for AD channel

EC SM Bus1 address EC SM Bus2 address PCB P/N

SOC SM Bus address 43 level BOM table

Security Classification Compal Secret Data Compal Electronics, Inc.

T0: +RTCVCC stable to RTCRST# high > 9ms

Security Classification Compal Secret Data Compal Electronics, Inc.

GPIO_NC13 A29 RESERVED_V6 GPIO_S0_NC_16 D28 DDI1_ENBKL 8 1

AB14 K34 DDI1_PWM 6 3 0504

Security Classification Compal Secret Data Compal Electronics, Inc.

AY24 MMC1_D3 / GPIO_S0_SC_20 PCIE_CLKREQ_1# / GPIO_S0_SC_4 BG5 LAN_CLKREQ# CC6 @EMC@

Security Classification Compal Secret Data Compal Electronics, Inc.

XTAL_25M_IN AH12 AU34

SPI ROM ( 8MByte ) 1.8V

RC35 1 2 3.3K_0402_5% SPI_WP# 3 6 SPI_CLK @ +RTCVCC BAS40-04_SOT23-3

Security Classification Compal Secret Data Compal Electronics, Inc.

RC45 1 2 USB_RCOMP D6 BD12 GPIO_S0_SC_56:

BH30 GPIO_S0_SC_92 T11

Security Classification Compal Secret Data Compal Electronics, Inc.

AD22 AA25 CC32 1 2 1U_0402_6.3V6K

UNCORE_VNN_S3_AD24 CC37 1 2 1U_0402_6.3V6K

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

UC1I UC1J UC1K UC1L UC1M

A11 AC36 AG38 AH47 AT24 AY36 BF30 E8 K9 U3

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

+DDR_A_VREF_DQ +1.35V CONN@ +1.35V Signal voltage level = 0.675 V

A10/AP BA1 DDR_A_BS1 <5>

1 RD1 RD2 207 208

PCB Footprint = TYCO_2-2013022-1_204P

<Address: SA1:SA0=00 (A0H)>

DIMM_1 STD H:4mm

Security Classification Compal Secret Data Compal Electronics, Inc.

+DDR_B_VREF_DQ +1.35V CONN@ +1.35V

185 186 DDR_B_DQS#7

195 DQ59 DQ63 196

SA0/SA1 Follow INTEL demo board <Address: SA0:SA1=10 (A2H)>

DIMM_2 REV H:4mm

Security Classification Compal Secret Data Compal Electronics, Inc.

※LDO mode is adopted as default power regulator mode.

Also can implement SWR mode by add inductor. +3VS_RT

<17> EDP_HPD 32 ROM 31 MIIC_SCL

Different between 2132S and 2132R

Security Classification Compal Secret Data Compal Electronics, Inc.

1 2 resistor of 100 kΩ for AUXN and a

TL_INVT_PWM <16> pull-down resistor of 100 kΩ for AUXP

IN2 BKOFF# <25>

LVDS@ by the sink device.

CY7 1 2 0.1U_0402_10V7K H_DVI_TXD2+ 4 3 HDMI_R_D2+

HDMI_R_D2- 1 RM7 2 619_0402_1%

Security Classification Compal Secret Data Compal Electronics, Inc.