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System Design Using FPGAs - Google Forms

This document contains 20 multiple choice questions about system design using FPGAs. It asks about topics like the basic unit of an FPGA, clock buffer properties, clock skew calculation, differences between brownouts and blackouts, clock synchronization methods, clock dividers, clock gating uses, rise time definition, logic gate families, FPGA uses, design synthesis processes, netlist connectivity, PCB nets, SPICE netlists, layout types, layout principles, DMA register counts, fastest DMA modes, and interrupt types. The questions are part of a quiz to test knowledge of FPGA and system design concepts.

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59 views

System Design Using FPGAs - Google Forms

This document contains 20 multiple choice questions about system design using FPGAs. It asks about topics like the basic unit of an FPGA, clock buffer properties, clock skew calculation, differences between brownouts and blackouts, clock synchronization methods, clock dividers, clock gating uses, rise time definition, logic gate families, FPGA uses, design synthesis processes, netlist connectivity, PCB nets, SPICE netlists, layout types, layout principles, DMA register counts, fastest DMA modes, and interrupt types. The questions are part of a quiz to test knowledge of FPGA and system design concepts.

Uploaded by

appuamreddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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9/16/2020 System Design Using FPGAs

System Design Using FPGAs


* Required

1. Email address *

2. H.T.No:

3. STUDENT NAME :

4. 1) What is the basic unit of an FPGA

5. 2) Clock buffers are designed with ___________ special property

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9/16/2020 System Design Using FPGAs

6. 3) How is Clock skew calculated

7. 4) What is the difference between brownout and a blackout ?

8. 5) How many methods are there for synchronizing data between clock domains ?

9. 6) Clock divider is also called as_______

10. 7) Clock gating is used for ______

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9/16/2020 System Design Using FPGAs

11. 8) Define rise time

12. 9) ________is simplest family of logic gates using bipolar transistor.

13. 10) To implement relatively large logic circuits __________Kind of programmable


logic device is used.

14. 11) Design synthesis is a________

15. 12) Design synthesis is also known as

16. 13) Netlist generation is a description of the connectivity of______________

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9/16/2020 System Design Using FPGAs

17. 14) net PCB means__________

18. 15) SPICE net list is a___________

19. 16) What are the four basic layout types

20. 17) Main principle of layout is

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9/16/2020 System Design Using FPGAs

21. 18) DMA usually has _____number of registers

22. 19) The fastest DMA mode is

23. 20) Name the Interrupt types

This content is neither created nor endorsed by Google.

 Forms

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