Reference Guide: Bridgeless PFC Power Supply Basic Simulation Circuit
Reference Guide: Bridgeless PFC Power Supply Basic Simulation Circuit
Reference Guide
RD033-RGUIDE-02
© 2019
1 / 18 2019-04-02
Toshiba Electronic Devices & Storage Corporation
Rev. 2
RD033-RGUIDE-02
Table of Contents
1. INTRODUCTION ...................................................................................... 3
© 2019
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Rev. 2
RD033-RGUIDE-02
1. Introduction
Ideally, the voltage and current waveforms of alternating power are completely sinusoidal and in
phase with each other. However, when an AC power supply is connected to a system, its voltage and
current waveforms may go out of phase or become non-sinusoidal. A power factor represents the
offset in time between the voltage and the current and is defined by following equations:
Active power is the actual power consumed by the load and can be calculated as an integral of
instantaneous power (i.e., instantaneous voltage times instantaneous current) over an AC cycle.
Apparent power is the product of the rms values of the input voltage and current.
The power factor takes a value between 0 and 1. A power factor of 1 represents the ideal situation
where apparent power is equal to active power. A power factor of 0 indicates that apparent power
is equal to reactive power. A load with a low power factor draws more apparent power than a load
with a high power factor for the same amount of active power transferred. A load with a low power
factor is undesirable because it affects other systems and transmission and distribution equipment.
Conventional AC-DC power supplies use a diode bridge and a capacitor. In these power supplies, an
AC input is rectified to a varying DC voltage, which in turn is converted to a desired voltage. AC-DC
power supplies have a pulsed input current since the capacitor is charged only when the capacitor
output voltage falls below the output voltage of the diode bridge. Therefore, AC-DC power supplies
have a low power factor. Figure 1.1 shows an example of a diode bridge rectifier with a capacitor
filter. Figure 1.2 and Figure 1.3 show its waveforms.
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The aim of a power factor correction (PFC) circuit is to improve the power factor for AC-DC
converters. At present, commonly used AC-DC power supplies incorporate a PFC circuit to improve
their power factor. Typically, the PFC circuit in an AC-DC power supply is a boost converter in which
an AC input is placed after a diode bridge. Figure 1.4 shows a diode bridge rectifier with a capacitor
filter whereas Figure 1.5 shows a boost PFC converter.
Figure 1.4 Diode bridge rectifier Figure 1.5 Boost PFC converter
with a capacitor filter
A video describing the power factor of an AC-DC power supply and a PFC circuit is on Toshiba’s
website.
In typical PFC circuits, a diode bridge is followed by a switching device. Since current flows through
the diode bridge, power loss occurs continuously owing to the diode forward voltage. To reduce
diode loss, server power supply and other applications that require high efficiency sometimes use a
bridgeless PFC power supply that directly switches AC voltage without using a diode bridge. The
bridgeless PFC power supply uses different current flow paths in positive and negative AC half cycles
instead of rectifying AC power with a diode bridge. Since the current flows through two paths, a
bridgeless PFC power supply can use devices with smaller power ratings than a single-phase PFC
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power supply with an equal output power. For this reason, bridgeless PFC is commonly used for AC-
DC power supplies with relatively high output power that require high efficiency. A basic simulation
circuit of a bridgeless PFC power supply (RD033-SPICE-01) is available on Toshiba’s website, which
will help you understand its operation.
This Reference Guide provides an overview of this simulation circuit and describes its usage.
OrCAD® Capture and PSpice® A/D from Cadence are necessary to simulate this circuit. Both the
simulation circuit and the Reference Guide are based on OrCAD® 17.2.
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2.1. Specifications
The specifications of the interleaved PFC power supply are as follows:
・ Input voltage: 90 to 264 Vrms
・ Output voltage: 400 V
・ Output current: 0 to 4.0 A
・ Operating frequency: 65 kHz
・ Allowable peak-to-peak ripple current: 40 % of the peak input current
・ Inductance setting: 130 μH
where, the maximum output power (Pout) is 1600W, the minimum AC line input voltage (Vin_min) is
90V, the PFC output voltage is 400V, and the switching frequency (Fc) is 65kHz. Suppose that the
PFC power conversion efficiency (η) is 94%. Then, inductance (L) is calculated to be 124μH.
Therefore, inductance is set to 130μH in the simulation circuit.
In practice, the value of the inductor varies because of DC bias characteristics. Select an inductor
that exhibits an inductance greater than the result of the above equation even when the inductance
decreases because of DC bias characteristics.
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3. Simulation results
This section describes the results of the operation of each section of the simulation circuit. The
following shows the waveforms of “input voltage and current”, “inductor current”, “output voltage
and current”, “MOSFET gate voltage”, and “MOSFET drain-source voltage and current” highlighted in
Figure 3.1 The simulation circuit model also allows you to view other waveforms. See Section 5 for
how to view waveforms.
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Input voltage and current, output voltage and current, and inductor current waveforms
Figure 3.2 and Figure 3.3 show the waveforms of the AC input voltage and current, the PFC output
voltage and current, and the inductor current. The output voltage waveform (at the top of Figure
3.2 and Figure 3.3) shows that the PFC output is regulated at 400V as required by the power supply
specification. The AC input current waveform (at the middle of Figure 3.2 and Figure 3.3) shows it
is sinusoidal, increasing the power factor.
Figure 3.2 Input voltage and current, output voltage and current,
and inductor current waveforms
Figure 3.3 Input voltage and current, output voltage and current,
and inductor current waveforms (enlarged view)
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Input voltage and MOSFET gate voltage waveforms
Figure 3.4 shows the waveforms of the AC input voltage and each MOSFET gate voltage. Figure
3.4 shows that a running MOSFET is switched at half AC cycle to half AC cycle as bridgeless PFC
operation. Inductor current waveforms of Figure 3.2 and Figure 3.3 also show that a boost inductor
is switched at half AC cycle to half AC cycle.
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MOSFET gate voltage and MOSFET drain-source voltage and current waveforms
Figure 3.5 shows the waveforms of the gate voltage of the TK31N60X, which is used as a switching
MOSFET in the simulation circuit. Figure 3.6 shows the waveforms of the drain-source voltage (VDS)
and current (ID). The MOSFET is PWM-controlled to generate a half-sinusoidal inductor current.
Figure 3.5 and Figure 3.6 show the MOSFET waveforms at the point in time when the inductor
current has reached the peak value.
In the simulation circuit, parameters Rg_on and Rg_off are used to specify the parameters of an
external resistor connected to the MOSFET gate. You can verify the effect of the gate resistance on
the behavior of the MOSFET by changing these parameters.
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4. Product overview
This section provides an overview of Toshiba’s devices used as PSpice® models in the simulation
circuit.
4.1. TK31N60X
Features
Low drain-source on-resistance due to a super-junction DTMOS process: RDS(ON) = 73mΩ (Typ)
Optimized gate switching speed
Easy-to-use enhanced-mode MOSFET: Vth = 2.7 to 3.7V (VDS = 10V, ID = 1.5mA)
4.2. TRS8E65F
Features
High surge current capability: IFSM = 69A (Max)
Low junction capacitance: Cj = 28pF (Typ.)
Low leakage current: IR = 0.4μA (Typ.)
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5. Simulation circuit
You can freely change various parameters with OrCAD® Capture to verify the circuit operation
according to the actual power supply specifications and evaluate how these parameters affect the
circuit operation. This section describes how to set parameters and verify the circuit operation. This
simulation circuit appears, when the OPJ file (.opj) inside the folder of RD033-SPICE-01 is opened.
Parameter Settings
Table 5.1 lists the adjustable parameters which is possible to you can set for the simulation circuit.
Double-click a parameter name in the PARAMETERS section. Then, the Display Properties dialog box
appears as shown in Figure 5.1. Change the value in the Value field.
1. From the menu bar of OrCAD® Capture, select PSpice - New Simulation Profile. Then, the New
Simulation dialog box shown in Figure 5.2 appears. Enter an arbitrary profile name and click
Create.
2. Then, the Simulation Settings dialog box shown in Figure 5.3 appears. In this dialog box, you
can set parameters for various types of analysis. First, click the Analysis tab. Select Time
Domain (Transient) from the Analysis Type drop-down list. Enter the simulation end time in
the Run To Time field and the maximum step size in the Maximum Step Size field.
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3. Click the Options tab to choose analysis options. For the simulation of our model, it is
recommended to check Analog Simulation - Auto Converge - AutoConverge as shown in
Figure 5.4 to enable the automatic convergence feature.
5. To run a simulation, select PSpice - Run from the menu bar of OrCAD Capture. Then, PSpice
A/D starts automatically and runs a simulation.
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Rev. 2
RD033-RGUIDE-02
Viewing simulation results
The following describes how to view the simulation results. You can display the waveforms of the
simulation results in two ways.
Figure 5.5 Graph window Figure 5.6 Add Traces dialog box
Figure 5.7 Simulation waveform view (Example: PFC output voltage waveform)
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Method 2 Adding markers
1. From the menu bar of OrCAD® Capture, select PSpice - Markers and then a type of marker
as shown in Figure 5.8.
2. Place the selected marker on the desired node in the simulation circuit as shown in Figure 5.9.
3. Then, its waveform appears in the graph window of PSpice® A/D as shown in Figure 5.10.
Place a Marker
Figure 5.8 Selecting a marker type Figure 5.9 Placing a marker in the circuit
Figure 5.10 Simulation waveform view (Example: PFC output voltage waveform)
※Cadence, Cadence logo, OrCAD, PSpice and OrCAD logo are trademarks or registered trademarks
of Cadence Design Systems, Inc. in the U.S. and other countries.
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Rev. 2
RD033-RGUIDE-02
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