ISSN (Print) : 0974-6846

Indian Journal of Science and Technology, Vol 12(1), DOI: 10.17485/ijst/2019/v12i1/139860, January 2019 ISSN (Online) : 0974-5645

Modeling and Closed Loop Votlage

Mode Control of a Forward Converter
Khandaker Sultan Mahmood1*, Iftekhar Hasan2 and Mirza Mursalin Iqbal1
1
Department of Electrical and Electronic Engineering, University of Asia Pacific, Dhaka, Bangladesh;
khandaker.eee@uap-bd.edu, mursalin.iqbal@uap-bd.edu
2
Department of Electrical and Electronic Engineering, Islamic University of Technology, Gazipur,
Bangladesh; ifteheee@iut-dhaka.edu

Abstract
Objectives: This study is to introduce the design and development of a closed loop voltage-controlled forward converter
operating in continuous conduction mode. Methods: The open and closed loop simulation was done in PSIM and the
four different compensators were designed. Experimental work was carried out for both open and closed loop converter
incorporating a type-2 PI compensator. Findings: A PI compensated forward converterwas capable of stepping down
voltage with low ripple content and improved steady state performance. Application: The forward converter was designed
in a laboratory prototype to study its operation for open loop and closed loop feedback. PI compensated forward converter
was found to reduce the steady state error of the converter.

Keywords: Closed Loop, Forward Converter, Voltage Mode Control, PWM

1. Introduction kept the power factor near to unity, brought down the
input current THD and lowered output voltage ripples.
The forward converter is a magnetically coupled DC-DC In4 proposed suggested that the forward converter could
converter. Forward converters with only one transistor be efficiently used to increase the DC voltage for DC
are generally used for off-line supplies with power ratings microgrids based on various forward converter configu-
under 200W1. It is often a fitting substitute for Flyback rations. In5 proposed examined the EMI of the forward
converters which require circuits to be galvanically iso- converter with symmetric topology through extraction of
lated and/or voltages step-down is necessary due to its the EMI model considering the parasitic components of
simple structure and a smaller number of components. the circuits and verified the exactness of the forecasted
Forward converters are an ideal candidate for applica- EMI levels of forward converters with a single switch and
tions requiring high current continuous operation. In2 symmetric topologies.
the authors proposed a novel for high power applications In6 proposed suggested the concept of a single stage
using two forward converters with series input and par- forward-flyback converter combining the individual
allel output configuration. An intelligent PWM scheme topologies of forward and flyback converters and gained
along with a current doubler rectifier restricts the out- high power factor with reduced core losses of the trans-
put current ripples whereas the energy of the leakage former resulting in higher efficiency. In7 proposed
inductor is used to suppress the switching device voltage designed a forward which possessed the characteristics of
spikes using the active clamp circuit. In3 proposed pre- a buck type dc-dc converter and to keep the output volt-
sented a research work on enhanced power quality in age fixed with the changes in load a sliding mode con-
multiple output SMPS forward boost converter which troller was introduced which made the control method

*Author for correspondence

 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

of the converter simpler and also produced satisfactory and his colleagues offered a novel closed loop control
results. In8 proposed constructed and investigated the technique of buck-boost converter utilizing proportion-
small signal model of a double-ended forward converter integral-derivative (PID) controller in 2017. Their anal-
and compared the roles of the circuit specifications on the yses and comparisons were able to corroborate that the
small signal characteristics. The small signal performance proposed control design was indeed simpler in design
of the converter acting as a DC-DC converter and as a and assembly and provided better gain in voltage for tra-
PFC converter was also analyzed. In9 proposed designed ditional step-up and step-down converter applications.
and assembled a compact DC-DC converter for military In15 proposed and his colleagues simulated and analyzed
applications. At 150 kHz switching frequency, residual the performance of a forward converter with the tertiary
current device (RCD) reset of forward converter main- winding. Using a VSC, a 12V-12W forward converter was
tained a duty cycle of 55% at the low input end. Abrupt designed and was able to demonstrate that effectiveness
voltage changes across the switch were minimized achiev- of the tertiary winding in de-magnetizing the core of the
ing an efficiency of over 75% and line and load voltage transformer and showed an improvement of 6% efficiency
regulated within ±1%. In10 proposed studied the effects over other related converters. In16 proposed devised a fly-
due to non-idealities in a boost converter such as the back-forward converter where the leakage energy of the
effect of equivalent series resistance (ESR) of a capacitor inductor is returned back to the source or clamped capac-
and found that the zeros in the right half plane must be itor in both step-up and step-down operation. In addition
translated in the frequency domain to minimize its effect to the simple circuit structure of the flyback converter, the
on the dominant poles of the system. Limiting the fre- recycling of energy through the interleaved connection
quency between its line and the cutoff value was adopted reduces the current ripple and conduction losses, thereby
as a simple yet effective control methodology. Voltage increasing the overall conversion efficiency upto 95.5% in
peaks of the output were reduced by selecting a convenient step-up and 92.3% in step-down converters. The findings
sampling time. In11 proposed forward and fly-back con- were validated using laboratory circuit model with 500 W
verter in terms of efficiency and power factor and thereby power output.
proposed a flyback-forward converter with power factor In17 proposed and his fellow researchers introduced
improvement strategy. The proposed converter was able step down forward converter which is made up a pair of
to achieve decreased core loss due to a reduced magnetiz- double high switch forward cells. It was shown that under
ing current and was able to scale down the transformer zero-voltage switching (ZVS), the said converter provides
altogether. In12 developed a fast responding Proportional high efficiency up to 95.6% and is suited for high input
Integral (PI) controller to compensate for the right half voltage and output current operations. The proposed
plane zero of the boost converter as well as the LLC con- design was tested and validated using a prototype con-
verter’s beat frequency aspect. Utilizing the small sig- verter with 100 kHz switching, 400 V at the input and 200
nal analysis, the authors were able to derive a simplified to 1000 W power at the output.
transfer function with the ability to forecast the nature A18 two-transistor forward converter has been exam-
of the beat frequency. Moreover, a lead compensator was ined and put forward to obtain high voltage input for
incorporated with the PI controller to widen the band- several output operations. Here, the primary winding
width. In13 proposed studied the strain on computation of the forward transformer is able to accomplish input
during simulation of closed loop control of voltage source voltage sharing (IVS) naturally and promptly by using
converter (VSC) by using a three phase control system synchronously operated switches with reduced leakage
with sinusoidal pulse width modulation (SPWM) switch- inductance. The design was proven to be feasible in a 96
ing techniques. A simulation system model was built with W laboratory setup. The increase in difference of input
FPGA+DSP+PC structure where the VSC model was voltage of different series modules could be augmented
subdivided into the continuous and discontinuous mode by increasing the value of filter capacitance at the input
of operations. Results were obtained to show that such and resultant value of the excitation inductance. In19 pro-
structure was able to accomplish simulations with mul- posed inspected and compared an active clamp forward
tiple rates in converter with high frequency. In14 proposed converter (ACFC) c­ ontrolled in current mode isolating it

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 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

using opto-coupler and Op-amp with PSPICE simulation. 2.  Materials and Methods
It was found that the system’s operating point is affected
by the pole of the opto-coupler which is produced due 2.1  Statistical Analysis of the Forward
to output capacitance of the transistor. Moreover, it was Converter
established from the results, that ACFC controlled in peak
The mode of operations and the design equations
current mode had faster response compared to feedback
required for a conventional off-line supply is elaborated.
with Op-Amp isolation. In20 proposed put forward a bat-
The forward converter is shown in Figure 11. For continu-
tery charger with a 40V forward converter for Switching
ous conduction mode, the circuit operation can be sepa-
Mode Power Supply (SMPS) application. With the help of
rated into two stages. At Stage 1, the switch SW is turned
the closed-loop model, the authors were able to obtain a
on at t = tON shown in Figure 21. At Stage 2, the switch
steady state voltage during the disturbance in the forward
is turned off at t = tOFF shown in Figure 31. When the
converter. With a minimized steady-state error and low
switch is closed, energy transfer occurs from the source
noise content, the proposed circuit was simulated using
to the load through the transformer. The secondary of the
Simulink blocks and was deemed suitable for SMPS appli-
transformer produces a pulse waveform, and the output
cation.
is evaluated similarly to that of the buck dc-dc converter.
In this study, a closed loop voltage mode control of
When the switch is open, the energy stored in the mag-
forward converter was developed for SMPS application.
netizing inductance during on-time of the switch can be
The subsequent sections describe the operating principle
returned to the input by means of the tertiary transformer
of the forward converter. The converter model and the
winding. Therefore the output voltage Vo remains below
closed-loop control developed for the forward converter
the input voltage Vs, and is expressed as,
has been presented. Thereafter, an analytical insight into
the selection criteria for the converter components has N 
been provided. In the results section, the simulation and Vo = Vs D  2  (1)
experimental results have been presented for the forward  N1 
converter. Finally, the paper concludes by providing the Where D is the duty cycle, N2 and N1 is the number of
summary of the findings obtained through this research. turns in the primary and secondary winding. To maintain

Figure 1.  Schematic of a forward converter.

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 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

Figure 2.  Circuit diagram during ton.

Figure 3.  Circuit diagram during toff.

continuous conduction mode and to allow the magnetiz- 2.2  Large Signal Model
ing inductance to reset, the duty ratio should be deter-
Assuming CCM operation, the state space average represen-
mined by,
tation is acquired by writing the state equations during inter-
 N  val DTs and D’Ts then averaging over one switching period.
D 1 + 3  < 1 (2)
 N1  dx ( t )
= Ax ( t ) + Bu ( t ) (3)
dt
Where N3 is the number of turns on the tertiary winding
of the transformer. y ( t ) Cx ( t ) + Eu ( t ) (4)
=

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 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

 dil  2.4  Open Loop Transfer Functions

dx ( t )  dt   il ( t )  The input voltage to output voltage transfer function,
Where
= =  , x (t )  
dt  dvc  v c ( t )  Gvo
 dt  Gv ( s ) = 2
(8)
s  s 
1+ +
Using steady-state averaged model Qwo  Qwo 
VO The duty ratio to output voltage transfer function,
= CA−1 B (5)
Vi
Gdo
Gd ( s ) = (9)
 D .N 2  s  s 
2
 Lx.N  , C  R.rc R  1+ +
=
Where B = 1  R + rc R + rc 
, Qwo  Qwo 
 0  
Where,
 −Lx ( rc + R ) −R.C ( R + rc ) 
 2  N 2 .Vi N 2 .D 1 C
(
 R + R.rc + R.rlx + rc.rlx ) ( R + R.rc + R.rlx + rc.rlx
2
)  Gd ( s )
= = , Gvo = , wo = ,Q R (10)
A−1 =   N1 N1 √ LC L
 −R.Lx ( R + rc ) −C ( rc + R )( R.rc + R.rlx + rc.rlx ) 

 (
 R 2 + R.rc + R.rlx + rc.rlx ) (
R 2 + R.rc + R.rlx + rc.rlx ) 
 For the purpose of this study, is considered as the control
input while is a source of disturbance. For the control
2.3  Small Signal Model loop shown in Figure 4, the loop gain is,

From the large-signal model, the following AC linearized Gc ( s ) Gd ( s ) H ( s )

model is obtained, T (s) = (11)
Vm
dxˆ ( t )
= A.xˆ ( t ) + B.uˆ ( t ) + ( A1 − A2 ) . X + ( B1 − B2 ) .U  dˆ ( t )  (6) Where Gc ( s ) is the transfer function of the compensator,
dt
H ( s ) is the gain of the output sensor and the (1 / Vm ) fac-
( )
t ) CT .xˆ ( t ) + C1T − C2T . Xdˆ ( t ) (7)
yˆ (= tor is the transfer function of the PWM used to drive the
MOSFET. For this system, H ( s ) = 0.25 and Vm = 2.7 V.
Where A1, B1 and C1 and A2, B2 and C2 are the A, B and C
15
matrices for the state-space representations during DTs Gd ( s ) = −6 2
(12)
and D’Ts respectively. 1.2e s + 0.00025s + 1

Figure 4.  Forward converter control loop.

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 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

The Bode plot in Figure 5 shows an infinite gain mar-

loop transfer function Gd ( s ) shows that there are two
gin and a phase margin (PM) of 3.49°. The step response
complex poles with constant damping ratio as shown in
in Figure 6 shows 60.9% overshoot, a rise time of 0.00125
Figure 7. The PM of Gd ( s ) is very low and needs to be
seconds and a settling time of 0.0355 seconds. The open

Figure 5.  Bode plot of the uncompensated system Gd(s)

Figure 6.  Step response of the uncompensated system Gd(s).

6 Vol 12 (1) | January 2019 | www.indjst.org Indian Journal of Science and Technology
 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

Figure 7.  Root locus of the uncompensated system Gd(s).

improved to get a better transient response and reduce For the PI design, fz (zero frequency) was set at fo/10 and
the overshoot. The steady state error also needs to be cor- f=
o ( )
1 / √ ( LC ) , is the crossover frequency. By doing that
rected by using a PI compensator where placing a pole at the zero is located close to the pole at the origin giving a
the origin compensated system will drive down the steady small lag angle and it doesn’t affect the phase at higher
state error to zero. frequencies.
The transfer function for the Lead compensator is
2.5  Closed Loop Control given by,
2.5.1  Voltage Mode Control s 

Gco 1 + 
Using the open-loop transfer functions, the control block  wz  , wherewz < wp (14)
diagram for the closed-loop model is constructed. The = G c PD ( s )
 s 
PWM control used in this project is the voltage mode 1 + 
control. The voltage mode control eliminates the instabil-  wp 
ity due to D ≥ 50% in the forward converter topology.
For the Lead design, the phase margin of 45o is required
for which the crossover frequency fc is set at 500 Hz.
2.5.2  Compensator Design
Four different compensators are designed and analyzed fp
based on phase and gain margins. Op-amp implementa- =fc =
f z f p and 10 (15)
fz
tion of the compensators was done in PSIM. The transfer
function for the PI compensator is given by, The pole of the lead compensator if placed 10 times apart
from the location of the lead zero to ensure proper lead
 s  angle to get the required increase in phase margin at the
Gco 1 + 
 wz  (13) high-frequency end of the bode plot.
Gc PI ( s ) =
s

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 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

The transfers function for the PID compensator: Table 1.  Design Specifications
Mode Continuous conduction mode
 s  s  15V ≤ Vin ≤ 35V
Gco 1 + 1 + wz 2  Input Voltage (Vin )
 wz 1   , where wz1 < wz 2  (16)
Gc PID ( s )
 s  Output Voltage (Vout ) 10V
s 1 + 
 wp  Switching Frequency 20 kHz

Output Power 50W

The PID compensator was designed by cascading the PI
and PD compensators. The PID compensator incorpo- Output Voltage Ripple ≤ 0.1
rates both the advantages of the PI and Lead compensa-
Inductor Current Ripple ≤ 0.1
tor by improving both the steady state error and transient
response of the response of the system while maintain- Inductor: To guarantee CCM, the inductor at the out-
ing good stability margins. The compensator applied in put must be sufficiently large. Although the value of the
the project was PI using a transconductance amplifier inductance has no defined upper limit, however, a large
which came with the PWM chip SG1524. The location value signifies bulkier part and more number of turns
of the compensator pole and zero was determined by which in turn increases the DCR and copper losses. The
Fpo < Fzo < Fo < f s / 2 where fs is the switching frequency inductor selected is of a higher value than the calculated
and fo is the crossover frequency. The low frequency gain using equation (17)21 to avoid the problem of core satura-
and the high frequency phase margin improve as required tion.
for the uncompensated forward converter.
 1 n1  1 1
LO > 1 − .VO  (17)
2.6  Converter Component Selection  Vi n2  ∆iL 0 f s
In this study, a forward converter operated in continuous
mode is designed to step down a constant dc input volt- Ferrite core inductor is used here.
age to a lower constant dc output voltage. The switching
frequency is set at 40 kHz. The design specifications are Diode: The major concern for the selection of diode is its
given Table 1. reverse voltage rating. Another important consideration
is the peak and average current handling capability, fast
2.7  Selection of Components switching characteristics, low reverse-recovery, and low
forward voltage drop.
Transformer Consideration: A convenient winding ratio
between the primary (N1) and the reset winding (N3) is Output Capacitor: Equation (18)21 is used to determine
usually chosen as 1. However, in this paper, the ratio has the minimum value of capacitor required to meet the rip-
been set to 3 so that the time required for the magnetising ple voltage consideration.
inductance current to return to zero is less. The winding
ratio between primary winding (N1) and the secondary ∆VO 1− D
= (18)
winding (N2) is set as 1. VO 8Lx Cf 2

Electronic Switch: The electronic switch has been cho-

sen based on its voltage and current rating which must However, the capacitor value selected is much higher to
be higher than its maximum input voltage and current. A obtain a nearly constant DC value.
power MOSFET IRF150N is chosen as the switch to han-
The component specifications have been summarized in
dle the 50W converter with an input dc voltage of 15-30V.
Table 2.

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 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

Table 2.  Component Specifications 2.8  Regulated Pulse Width Modulator

Electronic Switch IRF530N The PWM chip selected for this project is SG1524. The
Inductor 1mH entire control for a regulating power supply inverter or
switching regulator is carried out by the circuit contained
Diode MUR1560
within this monolithic integrated circuit. The 16-pin
Output Capacitor 1.2 mF dual-in-line package further includes the voltage refer-
ence, error amplifier, oscillator, pulse width modulator,
Load 4Ω
pulse steering flip-flop, dual alternating output switches,
Transformer = =
N1 60 =
, N 2 60, N 3 20 and current limiting and shut-down circuitry. Frequency
of the oscillator =1.3 / ( RT CT ) .

Figure 8.  Open loop forward converter.

Figure 9.  PID compensated-Output voltage response for input voltage step change.

Vol 12 (1) | January 2019 | www.indjst.org Indian Journal of Science and Technology 9
 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

3.  Results and Discussion input and resulting inductor current has been recorded as
depicted in Figure 9 and Figure 10 respectively.
Simulations for the forward converter were done on PSIM
and the results were used to identify which component 3.2  Closed Loop Simulations
rating will give a better performance thus selecting it for
A closed loop forward converter with voltage mode control
practical implementation. The output voltage and induc-
is illustrated in Figure 11 has and its output inductor current
tor current and the step response of the open and closed
and PID-compensated output voltage for step input has been
loop system were done.
recorded as shown in Figure 12 and 13 respectively.
3.1  Open Loop Simulations
3.3  Experimental Setup
An open loop forward converter was designed as shown on
Using the setup shown in Figure 14, experimental mea-
Figure 8 and its PID-compensated output voltage for step
surements were recorded in order to corroborate the

Figure 10.  Output inductor current.

Figure 11.  Closed loop voltage mode controlled PID compensated Forward Converter.

10 Vol 12 (1) | January 2019 | www.indjst.org Indian Journal of Science and Technology
 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

­ erformance of the designed forward converter. Figures

p experiment was that as the input voltage is decreased, the
15 and 16 shows the open loop response of the system for duty ratio increases for the system. So the rising induc-
inductor current, gate pulse and output voltage. Figures tor current slope saturates the transformer core. So the
17 and 18 show the closed loop response of the system for input voltage cannot be decreased beyond 15V. However,
20V and 30V input voltage respectively. Finally Figure 19, the closed-loop feedback by voltage mode control allowed
shows the response of the output inductor current due to the converter to hold the output voltage constant when
step change in load. The experimental analysis revealed subjected to fluctuations in the input voltage. The losses
that the forward converter operated successfully in pro- in the forward converter are switching loss, conduction
viding a step-down the output of the input voltage as loss, inductor’s eddy current and hysteresis loss, ESR and
indicated in Table 3. The limitation observed during the electromagnetic interference.

Figure 12.  Output inductor current (closed loop) with a step change in input voltage.

Figure 13.  Output voltage (closed loop) with a step change in input voltage.

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 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

Figure 14.  Gate Drive and Experimental Setup.

Figure 15.  Output inductor current.

12 Vol 12 (1) | January 2019 | www.indjst.org Indian Journal of Science and Technology
 Khandaker Sultan Mahmood, Iftekhar Hasan and Mirza Mursalin Iqbal

Table 3.  Experimental results of the forward converter 4. Conclusion

Input Voltage 30V
From the proposed design, it is understood that the for-
Duty Cycle 0.40
ward converter was capable of stepping down the voltage
Frequency 39.69 kHz at the output while maintaining low output voltage rip-
Output Voltage 10.5V ple. The output voltage was held constant by the voltage
Inductor current (average) 2.718A mode control and provided feedback and Tran’s conduc-
Output voltage Ripple <0.01 tance amplifier based PI compensation. The experimen-

Figure 16.  A combined graph showing gate pulse, inductor current, and the output voltage.

Figure 17.  Closed loop response showing output voltage, diode voltage, gate pulse and inductor current for an input voltage
of 30V.

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 Modeling and Closed Loop Votlage Mode Control of a Forward Converter

Figure 18.  Closed loop response showing output voltage, diode voltage, gate pulse and inductor current for an input voltage
of 20V.

Figure 19.  Effect of a step change in input voltage on inductor current and output voltage.

tal results were similar to the simulation results. The 5. References

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