Physical Limitations of Op Amps

Physical Limitations of Op Amps
• The IC Op-Amp comes so close to ideal performance

that it is useful to state the characteristics of an ideal
amplifier without regard to what is inside the package.
– Infinite voltage gain

– Infinite input impedance
– Zero output impedance
– Infinite bandwidth
– Zero input offset voltage (exactly zero output voltage
if input voltage is zero).
DC Imperfections
Three DC Imperfections of Real Op-Amps
Input Bias Current; Input Offset Current; and Input Offset Voltage
(output voltage may not be zero for zero input voltage)
Bias Current: All Op-Amps draw a small constant DC bias currents at their inputs.
Typical value for a 741 is around 100 nA. This is only notable when very high
impedance sources are used. In such cases, an alternative op-amp with lower bias
current should be used.
Bias Current
Offset Current
ELG4139 2
Offset Voltage
• When both input voltages are equal, the output
should be zero. Actually it probably won’t be due to
an offset voltage between the inputs. Typically, this is
around 2 mV.
• Offset voltage is automatically compensated by a

negative feedback network. It can be a problem for
precision comparator applications.
• Both the offset voltage and bias current are DC. A.C.
operation is not affected by them (they just add an
offset) Negative feedback reduces the effect of both.
Steps can be taken to reduce them (further reading)
3
Observation
• Build any Op Amp circuit, apply zero voltage to its input,

and what do you expect at the output?
• Although you would expect zero voltage, there is actually
an error voltage present at its output.
• What causes this error? You can trace the error back to
a number of unbalances in the Op Amp's internal
transistors and resistors. To account for this in a circuit
design, the net error is modeled as an offset voltage,
VOS, in series with Op Amp's input terminals.
• How will it affect the circuit? That depends on the Op
Amp itself and the circuit design.
• The input offset voltage can range from µV to mV and
can be either polarity.
• Bipolar op amps have lower offset voltages than JFET or

CMOS types.
• The offset voltage is modeled in series with one of the op

amp input terminals. Which one?
• Although the net effect is the same at either input, it is

much easier to analyze VOS in series with the non-
inverting input. Why? The resulting circuit with VOS at V+
looks just like the non-inverting amplifier configuration.
R2
R1 -
VOS + Vo
The input voltage signal is short circuited
R2
Vo  VOS (1  )
R1
Actual op amp
+
-+ Offset free op amp
VOS
Example: Find the worst-case DC output voltage of an
inverting amplifier assuming vin = 0. The maximum bias
current of the Op-Amp is 100 nA. The maximum offset
current is 40 nA, and the maximum offset voltage is 2 mV.
7
First, Offset Voltage
8
Second, Bias Current Sources
ELG4139
9
Third, Offset Current Source
ELG4139
10
Input Bias Current Compensation
• One of the practical op amp limitations is that the input
bias currents for the two inputs may be slightly different.
• Even though the inputs are designed to be symmetrical,

slight differences which occur in the manufacturing
process may give slightly different bias currents.
• This offset current is typically on the order of a tenth of

the input bias current, with 10 nA being a representative
offset current for a 741 op amp.
• Even with identical source impedances, this offset

current will produce a slight voltage between the input
terminals, contrary to the ideal op amp.
R2
IB1- IB2R3/R1
IB2R3/R1
-
R1
0V
IB1
IB2 + Vo
R3
IB2
I B1  I B 2
IB 
2
A resistor may be added in series with the I OS  I B1  I B 2
Non-inverting input lead to reduce the value of
The output dc voltage due to input bias currents Vo  I B1 R2  I B R2 (no R3 )
R3 
R1 R2 Vo  I OS R2 (with R3 )
R1  R2
• To minimize the effect of the input bias currents one
should place in the positive lead a resistance equal to
the DC resistance seen by the inverting terminal.
• If the amplifier is AC coupled, we should select R3 = R2.
• We must always provide a DC path between each of the

input terminals of the op amp and ground. If we couple
both input of the amplifier then the circuit will not operate
without the resistance R3 to ground.
Example: Consider an inverting circuit designed using an
op amp and two resistors, R1 = 10 k and R2 = 1 M. If the
op amp is specified to have an input bias current of 100 nA
and an input offset current of 10 nA, find the output DC
offset voltage resulting and the value of resistor R3 to be
placed in series with the positive input lead in order to
minimize the output offset voltage. What is the new value of
Vo.
Vo  I B R2  100 nA 1 MΩ  0.1V
R1R2
R3   9.9 kΩ  10 k
R1  R2
Vo  I OS R2  10 nA  9.9 kA  0.01 V
Offset Voltage Compensation
• In many applications, especially those for which the input
signal is large compared to the offset voltage VOS, the
effect of the offset voltage is negligible.
• However, there are situations in which it is necessary to

compensate for or null out the offset voltage.
• Two such methods are:

– Offset null terminals: Some op amp are provided with two
additional terminals to which a specified circuit can be connected
to trim to zero the output DC voltage due to VOS.
– Offset compensation circuit through two terminals.
– Capacitively coupling the amplifier.
V+
Offset nulling Potentiometer

terminals
V-
The output DC offset voltage of an op amp can be trimmed
to zero by Connecting a potentiometer to the two offset-
nulling terminals. The wiper Of the potentiometer is
connected to the negative supply of the op am.
R2
R1 -
VOS +
Capacitively coupled inverting amplifier.

Exercise: Consider an inverting amplifier with a nominal gain of 1000
constructed from an op amp with an input offset voltage of 3 mV and with output
saturation levels of 10 V. (a) What is the peak sine-wave input signal that can
be applied without output clipping? (b) If the effect of VOS is nulled at room
temperature (25 oC) how large an input can now one apply if: (i) the circuit is to
operate at a constant temperature? (ii) the circuit is to operate at a temperature
in the range 0oC to 75 oC and the temperature coefficient of VOS is 10 V/oC?
R
Vo  VOS (1  2 ); Vo  3mV(1  1000)  3 V
R1
Maximum amplitude of a sine wave at the op amp output is 10 - 3  7V.
(b) For part (i)  10 mV
(b) For part (ii) : Temperature range of 0 o C to 75o C correspond s to input offset
voltage range of (0 - 25)  10V  -250 V to ((75 - 25)  10V  500V.
This input offset range correspond s to output DC levels of
- 250V(1  1000)  -0.25 V to 500 V (1  1000)  0.5 V.

Physical Limitations of Op Amps

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Physical Limitations of Op Amps

• The IC Op-Amp comes so close to ideal performance

– Infinite voltage gain

• Offset voltage is automatically compensated by a

• Build any Op Amp circuit, apply zero voltage to its input,

• Bipolar op amps have lower offset voltages than JFET or

• The offset voltage is modeled in series with one of the op

• Although the net effect is the same at either input, it is

• Even though the inputs are designed to be symmetrical,

• This offset current is typically on the order of a tenth of

• Even with identical source impedances, this offset

• If the amplifier is AC coupled, we should select R3 = R2.

• We must always provide a DC path between each of the

• However, there are situations in which it is necessary to

• Two such methods are:

Offset nulling Potentiometer

Capacitively coupled inverting amplifier.

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