tnfinite voltage gain

a voltage ditference at the hwo inputs s magnified wthnitely

in truth, very high 250000
means difference between inverting terminal and nom-terminal is amplified by 250,000.
Indinite input impedance +V.=+5V
no curvent flows into inputs
i ntruth, about 10 () for Eftect Transistor input op-amps
Zero output impedanc 0
of load
ock-solid independent
True up to current masimum (usualy 5-25 mA)

Infinitely fast (pinfinite bandwidth) -V=-5V

Practicaly limited to tew MH range
slew rate limited to 0.5-20 V/us The output votage never ercess the oC voltage suppy of the
Op-Amp
OrAGetden Rnles
When an opamp ls confgured in any negative-feedbeck arrangement, It will obey the follwirg two rules

The inputs to the op-amp daw na cutent (true whether negative teedbackor not)

The op-amp output will do whatever it can (within its limitations) to make the voltage ditterence between the two inputs
Feur stags an be identifled from the intemal bloch diagram of op-amg
1. Inpt stage or dilerential amplifler stage can amplity difference between two input signals, Input resistance is veny high
Draws ero curent from the input sourtes
2. Intermediate stage ior stages| use direct coupling provide very high gain
3. Level shiter stage shifts the de level of output voltage to rero (can be adjusted manuay using two additional termnals)

4.theOutput stage in a power amplifier

stge, has very umall
output
value of load resistance connected to the output terminal
resistance, o output voltage n the ame, no matter what is

Diffeentua Intermediate
Level
Output
Ater Shte
Stage Stage
Stage Sage

The essential buikdeng block of modern IC op-amp is a differential amplier

ampien the difference between the two input signas and has eacelent stability, high versatility, immune to noise and
terference signah and hence used inmout of the analog crcuits, ranginrg from DC to high frequency applications
Va .

Cmby de r c o d
V,+2
2

A,v, + A2Va

2VV,+ :V,-V
2+ 2V
 tnpt z comcelttd

(my o del Jit td an

V,+
Ve
.A,v, +A, V2
han
Vs aegiftdA, d vin d A
Ah 2V,+ V:V-V
2 V 2V

VV,-V
D e Operatil Aaphie veras petaal Operatiel Aplhe

Parameter ldeal Op-Amp Real Op-Amp

Differential Voltage Gain 105-10
Gain Bandwidth Product (Hz) 1-20 MHz

Input Resistance (R) 10-1012 0o

Output Resistance (R) 100-1000
deal op-amp Practical op-aup
Common mode rejecetion ratio CMRR
of a amplifier to reject cormmon
The abiity
called CMRR
with differential mode signal is expressed by a ratio

CMBR AJA
ldeally the cormmon mode voltage gain in aero, hence the ideal vahue of CMRR is
infinite
For practical differential amplifer Ad is large and ACM is amall hence the value of CMRR is also very
Large.
Many a times. CMRR is aao expressed in dB. a

CMBR 20A,/A

V.A,V,A. V
A,V11 A.V. IA,V
A,V,I1 1/A,/A v/V)
This equation explains that as CMRR is practically very large. though both V, and V, components
are present., the output is mostly proportional to the difference signal anly. The common mode
componernt is greatty rejected.
 Thus we can uay that under linear range of operat ion there n wrtually shot
circuit betwren the two irput terminahs, in the sense tht their voltages are
ww ame. No current flows from the input terminals to the ground.

The double arrowed ine indicated virtual short circuit between the input
Virtual shot terminals.

Now if the non-inverting terminal s grounded. ty the concept of vittual short,

the inverting terminal is aho at ground potential, though there no physical
C4 D q Tconnection between the merting and te ground Ths s the princsple o
virtual ground.
Thus we can realisticaly assume that the voltage at the non-inverting terminal of the op-amp in equal to inverting terminat

Virtual ground R Virtual ground

R
V V.
V
R
 INPUT OFFSET VOLTAGE:
When both the input terminals are grounded, ideally, the output voltage should be zero.
However, in case of the practical op-amp, a non-zero output voltage is present.

To make output voltage zero, a small voltage in mV is required to be applied to one of the
V
input terminals. This d.c. voltage is called as input offset voltage denoted as
A C ReatiuStg
The current drawn ty esther of the imput terminals (inverting or nonwwerting) n wra. In reality, the current drawn by the input
terminals is very small, of the order of A or nA. Hence the assumption of zero input current s realistic.

De
This means the difterential input voltage V, between the non-inverting and invertirg input terminals is essentaly zero. This s
obwious because even f ingput voltage in few volts, due to large open loop gain of op-amp, the ditference voltage V, at the input
terminals is almost zero

Example: It o/p voltage s 10V and the ALe. the open loop gain is 10 then
,-VA
VVJA
V,10/ 10 1 mV

Hence V,svery small. As A , the aiference voltage V, 0 and realstaly assumed to be zero for analyzing the
circuits

V1=V2
 V V2,V. o
Pchudiy, the Sind commn . ho Inpt A ComcdlL
ovl enury 2r VoloyR
Cmy fr ided Jiecntid am)
 V, A,, AV2
A,()A-(%
:(A.+4)V (A) v,
A+A
CMat The veldiot sensish of s9-et 4 evmte sm
as
cn- to
cwan
na (tmp
CMER
 INPUT BIAS CURENT:
For ideal op-amp, no current flows into the input terminals.
For the practical op-aps the input currents are very small, of the order of 10 A to 104 A.
Most of the op-amps use d1fferential amplifier as the input voltage. The two transistors of the
differential amplifier must be biased correctly. But, practicaly, it is not possible to get exact
matching of the two transistors.
Thus, the input terminals which are the base terminals of the two transistors, do conduct the
smal dc. current. These small base currents of the transistors are nothing but bias currents
denoted as and

Thus, input bias current can be defined as the current flowing into each of the two input
terminals when they are biased to the same voltage level i.e. when the op-amp is balanced.
The two bias currents are never same hence the manufacturers specify the average input bias
current which found by adding the magnitudes of h, and h and dividing the sum by 2.
 INPUT BIAS CURENT
For ideal op-amp, no current flows into the input terminals.
For the practical op-aps the input currents are very small, of the order of 1o A to 10A
Most of the op-amps use differential ampifier as the input voltage. The two transistors of the
differential amplifier must be biased correctly. But, practically, it is not possible to get exact
matching of the two transistors
Thus, the input terminals which are the base terminals of the two transistors, do conduct the
small d.c. current. These small base currents of the transistors are nothing but bias currents
denoted as and

Thus, input bias current can be defined as the current flowing into each of the two input
terminals when they are biased to the same voltage level i.e. when the op-amp is balanced.
The two bias currents are never same hence the manufacturers specify the average input bias
current which found by adding the magnitudes of k, and Ih and dividing the sum by 2.
 INPUT OFFSET CURENT:
The difference in magnitudes of and Iis called as input offset current and is denoted as
anThus, Input offset current |b al. The magnitude of this current is very small, of
the order of 20 to 60 nA It is measured under the condition that input voltage to op-amp is
zero.

f we apply equal d.c. currents to the two inputs, output voltage must be zero. But practically,
there exists some voltage at the output. To make it zero, the two input currents are made to
differ by small amount. This difference is nothing but the input offset current.
Both input bias and offset current depend on the temperature.
 V A,, +A2V2
A,(%) a.(%-
(A.+A) Ve + (A-Ae) v,

AcVe+ +AaV
CMRR The
Yelative semsivy of a 6p-of adiffemte sn
as
CoPoT to acemmm -m d0 Siym mswn o w on- mele

Tyfchm r c i t (cmRE)

CMRP
V A,,+A2 V2
A,( ). A-
(A,+A) V (A-e) v

vAcV + Aa V
OFFSET VOLTAGE ADJUSTMENT:

VoV
 INPUT OFFSET CURENT:
The difference in magnitudes of and i s called as input offset current and is denoted as
Thus, Input offset current l-The magnitude of this current is very small, of
1
the order of 20 to 60 nA. It is measured under the condition that input voltage to op-amp is
zero
if we apply equal d.c. currents to the two inputs, output voltage must be zero. But practicall
there exists some voltage at the output. To make it zero, the two input currents are made to
differ by small amount. This difference is nothing but the input offset current.
Both input hias and offset current depend on the temperature.
 V, A,, iAV2
A,().(%-
(A.+A) V .(-)v
. A +n
CmaL The velin sensib of a
s-? fevnte s

vgechm vad (cms

CR
 INPUT OFFSET VOLTAGE:
When both the input terminals are grounded, ideally, the output voltage should be zero
However, in case of the practical op-amp, a non-zero output voltage is present.
To make output voltage zero, a small voltage in mV is required to be applied to one of the
input terminals. This d.c. voltage is called as input offset voltage denoteed as V