An Investigation of THD of A BTL Class D: Amplifier

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An Investigation of THD of a BTL Class D Amplifier

Tong Ge, Huiqiao He, Jia Zhou, Yang Kang and Joseph S. Chang
School of Electrical and Electronic Engineering
Nanyang Technological University, Singapore

Abstract—Class D amplifiers are routinely employed as audio analytical expression, we show that unlike the single-ended PWM
amplifiers due to their high power efficiency. Total Harmonic Class D amplifier, the THD of the BTL Class D amplifier is
Distortion (THD) is one of the most important parameters to qualify almost independent of the integrator gain. This is highly
and quantify their performance. In this paper, THD of a commonly unexpected as the integrator contributes a major portion of the
used Bridge-Tied-Load (BTL) Class D amplifier is investigated, loop gain. Instead, the THD of the BTL Class D amplifier is
including the derivation of the analytical expression for the THD of largely determined by the feedback amplifier therein. Further,
the BTL Class D amplifier. We show that in some cases, the THD of unlike the single-ended Class D amplifier, whose THD increases
the BTL Class D amplifier is independent of the integrator gain of when the modulation index (signal swing), M, increases, the THD
the amplifier – this is unlike other Class D amplifiers and linear
of the BTL Class D amplifier is maximum at M = 0.5. Although
amplifiers whose THD is largely determined by their integrator gain.
Instead, the THD of the BTL Class D amplifier is largely determined
these results are unexpected, it can be explained by our
by the feedback amplifier. Further, unlike the single-ended Class D investigations; see later in Section III. Our investigations here are
amplifier whose THD increases as the modulation index increases, significant as they provide good insight to Class D amplifier
the THD of the BTL Class D amplifier is maximum at the modulation designers on the mechanisms of the THD of the BTL Class D
index = 0.5. The analysis herein provide good insight to the design amplifiers and delineate the parameters available may be varied
of BTL Class D amplifiers, including how various parameters may and/or compromised to meet a given THD specification. The
be varied/optimized to meet a given THD specification. derived THD expression is verified by comparing against
HSPICE simulations.
Keywords—Class D amplifier; THD; Bridge-Tied-Load (BTL);
non-linearity The paper is organized as follows. In Section II, the operation
of the BTL Class D amplifier is reviewed, which serves as a
preamble for the analysis. In Section III, the analytical expression
for THD of the Class D amplifier is first derived, followed by the
I. INTRODUCTION design and optimization of THD based on the derived expression.
Class D amplifiers [1-3] are routinely employed as audio In Section IV, the analytical derivation is verified by simulations.
amplifiers due to their significantly higher power efficiency Finally, conclusions are drawn in Section V.
compared to their linear counterparts. In various applications,
the Class D amplifiers are configured with a Bridge-Tied-Load II. REVIEW OF THE OPERATION OF THE BTL CLASS D
(BTL) output instead of a single-ended output because for a given AMPLIFIER
power supply voltage, the output power of the BTL Class D Fig. 1(a) depicts the schematic of a commonly used single-
amplifiers is 4 times higher than the single-ended counterparts. input BTL-output Class D amplifier, comprising an integrator, a
feedback amplifier, a PWM modulator and Class D output stages.
The linearity of the Class D amplifiers, qualified and
The integrator provides a high loop gain, hence attenuating the
quantified by Total Harmonic Distortion (THD), is well
errors of the Class D amplifier. The feedback amplifier feeds
recognized [1-3] to be one of the major drawbacks of the Class D
back the output signal to the integrator. The PWM modulator
amplifiers. Interestingly, reported investigations into THD have
modulates the analog signal to the digital-like PWM signal. The
been largely limited to the single-ended Class D amplifiers. For
output stages serve as buffer circuits to drive the loudspeaker load.
example, we [4] have previously investigated the THD of the
The output stages are usually the most power dissipative block
single-ended Pulse Width Modulation (PWM) Class D amplifiers
and typically dissipate >80% of the total power. To reduce the
and show that the integrator gain is one of the most important
power dissipation of the output stages, our low power output stage
parameters that determines the THD. Specifically, to achieve low
design [5] is employed. The schematic of the output stage is
THD, the integrator gain in the audio range should be high and
depicted in Fig. 1(b).
the integrator gain at the carrier frequency should be low. Other
important parameters include a high PWM stage gain, a high To eliminate the output filer, a 3-State PWM modulator is
carrier frequency and a low deadtime in the output stage. employed, i.e. the high switching frequency components of the
Although the BTL Class D amplifiers are equally prevalent as the two output signals of the PWM modulator are in phase. As a
single-ended Class D amplifiers, their THD mechanisms remain result, the output signal of the Class D amplifier, VM2-VM1,
uninvestigated. changes between VDD and 0 when the input signal Vin > 0, and
changes between 0 to –VDD when the input signal Vin > 0. The
In this paper, the THD mechanisms of a commonly used BTL
input signal Vin and the output signal VM2-VM1 are depicted in Fig.
PWM Class D amplifier are investigated, and the analytical
2. To assist the analysis in Section III, we denote the period when
expression is derived. Based on the investigation and the derived

978-1-4799-5341-7/16/$31.00 ©2016 IEEE 470


Fig. 3. Feedback path of the BTL Class D amplifier

The latter THD mechanism is inherent in the closed-loop Class D


amplifier and cannot be eliminated by the feedback. If the Class
D amplifier is designed properly, its THD is usually dominated
by the latter mechanism. The THD due to the latter mechanism
(a) will now be derived.

Derivation of the THD of the feedback path


The feedback loop of the BTL Class D amplifier is opened at
the integrator output (Vint), and the schematic of the feedback path
is depicted in Fig. 3. To derive the THD of the feedback path, the
time domain expression of the integrator output, VDist, is first
derived. The THD of the feedback path can then be derived from
the Fourier Series expression of VDist.
Based on Fig. 3, when the input is Vin, the audio component
of the integrator output Vint(in) can be derived as

(b) =− (1)
( )
2
Fig. 1. (a) Schematic of the BTL Class D amplifier and (b) its output stage
In our analysis here, we assume that the input signal of the
feedback path is the audio component of the integrator. Hence,
the difference between the output signal, Vint, and its audio
component Vint(in) is the distortion of the feedback path. When Vin >
0, t1 and t2 can be expressed as eqns. (2) and (3) below. As
depicted in the shaded area in Fig. 2, t1 and t2 are the time duration
when VM2-VM1 is VDD and when VM2-VM1 is 0 respectively.

= (2)
2

= − (3)
2 2
Fig. 4 depicts the equivalent circuit of the feedback amplifier.
Specifically, the output signal of the feedback amplifier Vfb can
Fig. 2. Block diagram of the BTL Class D amplifier be expressed as the sum of the output of an inverting amplifier,
Vfb_a, and the output of a lossy integrator, Vfb_b.
VM2-VM1=VDD and Vin > 0 as t1, the period when VM2-VM1=0 and Based on Fig. 4, the output of the feedback amplifier Vfb(t)
Vin > 0 as t2, the period when VM2-VM1=-VDD and Vin < 0 as t3, and during t1 and t2 can be expressed as eqns. (4) and (5), respectively:
the period when VM2-VM1=0 and Vin < 0 as t4.
III. ANALYSIS OF THD OF THE BTL CLASS D AMPLIFIER During t1: ( ) =− 1− + (4)
A. Derivation of the mathematical expression for THD
The THD of a Class D amplifier is due to 2 mechanisms: first, During t2: ( ) = (5)
the THD of the open-loop Class D amplifier, which are mainly where
due to the non-linearity of the PWM carrier and the deadtime of
the Class D output stage; second, the non-linearity introduced by −
the feedback of the Class D amplifier, which is due to the (6)
=−
combination of the linear and digital-like PWM operation. The
1−
former THD mechanism is well established and it can be
significantly affected by the loop gain of the Class D amplifier.

471
where

2− 4 7
= − −
48 15 2 240
1−
(17)
2
+
384(1 − )
Substituting eqns. (8), (9) and (13) into eqn. (16), we can obtain
that

( ) = (18)
16( + )
Fig. 4. Equivalent circuit of the feedback amplifier
Derivation of the THD of BTL Class D amplifier
Fig. 5 depicts the block diagram of the BTL Class D amplifier,
(7) where G1 is the transfer function from the input to the integrator
=− input, Gint is the integrator gain, GPWM is the PWM modulator gain,
1− HFB1 and HFB2 are the feedback amplifier gain, and H1 is the
(8) transfer function from the feedback amplifier output to the
= integrator input. For simplicity, in the analysis herein, we assume
2( + )
that the components are well matched, i.e. R3=R4, R5=R7, R6=R8,
= ( + ) (9) and C2=C3. We will show later in section IV that the components
mismatch has little effect on the THD.
The integrator output can be obtained by integrating Vfb (eqns. (4)
and (5)) and Vin.
During t1:
− +
( )= − 1−

+ ( ) (10)
During t2:

( )= − 1− + ( ) (11)

where Fig. 5. Block diagram of the BTL Class D amplifier

= (12) The expressions for G1, Gint, HFB1, HFB2 and H1 are:

= (13) = /( + ) (19)
The RMS value Vint is: = −( + )/( ) (20)
= /( + ) (21)
1
, ( )= ( ) + ( ) + (22)
(14) = =
( )+ ( ) + ( + )
= −
2 +
= = (23)
where ( )+ ( ) ⁄2 = ( ) is the audio component, + ( + )
and VDist is the distortion component of the feedback path. VDist is The THD of the BTL Class D amplifier can be obtained by
dividing the THD of the feedback path by the loop gain of the
( − ) ( − ) Class D amplifier. The THD of the Class D amplifier is:
= − (15)
2 (1 − )
( )
Based on eqn. (15) and the method delineated in [6], the = (24)
(1 + + )
magnitude of the third order harmonic of the feedback path can
Substituting eqns. (18) and (23) into eqn. (24), the THD of the
be derived as eqn. (16). Note that the third order harmonic is the
dominant harmonic component and is significantly larger than BTL Class D amplifier can be derived as:
other harmonics.
16( + )
= (25)
2( + )
= (16) ( )
( )
8 + +

472
B. Interpertation of the THD of the BTL Class D amplifier
From eqn. (25), the following observations are made:
(1) A higher carrier frequency (smaller T) results in a lower THD.
This is as expected and similar to the Bang-Bang control Class
D amplifiers and the single-ended Class D amplifiers. In this
case, the THD is inversely proportional to the square of the
switching frequency. In other words, doubling the switching
frequency (e.g. from 200kHz to 400kHz) results in 4 times
reduction in the THD but at the cost of increased power
dissipation [1].
(2) The THD increases when the input frequency increases – this
is also as expected and similar to other Class D amplifiers and
linear amplifiers.
(3) Unlike the single-ended PWM Class D amplifier, the THD of Fig. 6. THD of the BTL Class D amplifier
the BTL Class D amplifier is almost independent of the
verifying the derived analytical expression in eqn. (25).
integrator gain. This is highly unexpected as the integrator
(2) As mentioned earlier in Section III, the THD increases when
gain contributes a major portion of the loop gain.
the input frequency increases. Specifically, the
Nevertheless, the integrator gain should be sufficiently large
THD@fin=6kHz is approximately 6 times higher than
as it attenuates the distortion due to the open loop Class D
THD@fin=1kHz.
amplifier. Note that a larger integrator gain results in a larger
(3) The THD of the BTL Class D amplifier is maximum at M=0.5.
IC area (hence higher cost) and/or a higher output noise as it
This is probably because the carrier component in the output
request a larger capacitor and/or larger resistor.
signal is maximum at M=0.5.
(4) The THD of the BTL Class D amplifier is largely determined
(4) A comparison between the case where the components are
by the feedback amplifier – the relationship between the
perfectly matched and the case where the mismatch is 5%
feedback amplifier and the THD is depicted in eqn. (25).
shows that the component mismatch has little effect on the
Specifically, a smaller R6 (i.e. a smaller feedback amplifier
THD of the BTL Class D amplifier. Note that this is not the
gain) and a larger C2 (i.e. a larger attenuation of the carrier)
case for the PSRR of the BTL Class D amplifier. The PSRR
result in a smaller THD.
of the BTL Class D amplifier is largely determined by the
(5) Unlike the single-ended PWM Class D amplifier whose THD
matching accuracy of the components.
increases when M increases, the THD of the BTL Class D
amplifier is maximum at M=0.5. This is probably because for V. CONCLUSIONS
3-State output signal, the carrier component is maximum at
Analytical expression for the THD of the BTL Class D
M=0.5.
amplifier has been derived and verified against HSPICE
IV. SIMULATION RESULTS simulations. On the basis of the derived expression, the primary
parameters that affect the THD of the BTL Class D amplifier have
In this section, the analytical derivations of the THD of the
been identified and delineated. The analyses provide an
BTL Class D amplifier are verified by comparing the derived
expressions (eqn. (25)) against HSPICE simulations. The circuit analytical means to qualify and quantify the THD and provide
parameters of the BTL Class D amplifier are tabulated in Table I valuable insight to the mechanisms and pertinent parameters
below. For completeness, two cases are listed, one is perfectly therein, including how these parameters may be varied/optimized
matched, and the other is with 5% mismatch. to meet a given THD specification.

TABLE I. CIRCUIT PARAMETERS OF THE BTL CLASS D AMPS


REFERENCES
[1] L. Guo, T. Ge and J. S. Chang, “A 101dB PSRR, 0.0027% THD+N and
Parameter Perfectly Matched 5% Mismatch 94% Power-Efficiency Filterless Class D Amplifier”, IEEE Journal of
R1, R2 3kΩ, 9kΩ 3kΩ, 9kΩ Solid State Circuits, Vol. 49, No. 11, Nov 2014.
R3, R4 40kΩ, 40kΩ 39kΩ, 41kΩ [2] A. Bandyopadhyay, M. Determan, K. Sejun, and N. Khiem, "A 120dB-SNR
R5, R7 4.5kΩ, 4.5kΩ 4.5kΩ, 4.5kΩ 100dB-THD+N 21.5mW/channel multibit CT sigma-delta DAC," in ISSCC
R6, R8 20kΩ, 20kΩ 19.5kΩ, 20.5kΩ Dig. Tech. Papers, 2011, pp. 482-483.
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Radio," IEEE Journal of Solid-State Circuits, vol. 48, pp. 1771-1782, 2013.
GPWM 5 5 [4] W. Shu and J. S. Chang, "THD of Closed-Loop Analog PWM Class-D
Carrier Frequency 150kHz 150kHz Amplifiers," IEEE Transactions on Circuits and Systems I: Regular Papers,
vol. 55, pp. 1769-1777, 2008.
Fig. 6 depicts the THD of the BTL Class D amplifier obtained [5] L. Guo, T. Ge and J. S. Chang, “A Ultra-low-power Overcurrent Protection
from analytical expression (eqn. (25)) and obtained from HSPICE Circuit for Micropower Class D Amplifiers”, IEEE Trans. Circuits Syst. II,
simulations. The following observations are made: Exp. Briefs, Vol. 62, No. 10, pp. 942-946, 2015
[6] T. Ge and J. S. Chang, "Bang-Bang Control Class D Amplifiers: Total
(1) It is apparent from Fig. 6 that the derived analytical Harmonic Distortion and Supply Noise," IEEE Trans. Circuits Syst. I, Reg.
Papers, vol. 56, pp. 2353-2361, 2009
expression agrees well with the HSPICE simulations, hence

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