TC4051,4052,4053BP/BF/BFT

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC4051BP, TC4051BF, TC4051BFT

TC4052BP, TC4052BF, TC4052BFT
TC4053BP, TC4053BF, TC4053BFT
TC4051B
Single 8-Channel Multiplexer/Demultiplexer TC4051BP, TC4052BP, TC4053BP

TC4052B
Differential 4-Channel
Multiplexer/Demultiplexer
TC4053B
Triple 2-Channel Multiplexer/Demultiplexer

TC4051BF, TC4052BF, TC4053BF

TC4051B, TC4052B and TC4053B are multiplexers with
capabilities of selection and mixture of analog signal and digital
signal. TC4051B has 8 channels configuration. TC4052B has 4
channel × 2 configuration and TC4053B has 2 channel × 3
configuration. The digital signal to the control terminal turns
“ON” the corresponding switch of each channel, with large
amplitude (VDD − VEE) can be switched by the control signal
with small logical amplitude (VDD − VSS). For example, in the
case of VDD = 5 V VSS = 0 V and VEE = −5 V, signals between −5
V and +5 V can be switched from the logical circuit with single TC4051BFT, TC4052BFT, TC4053BFT
power supply of 5 volts. As the ON-resistance of each switch is
low, these can be connected to the circuits with low input
impedance.

Weight
DIP16-P-300-2.54A : 1.00 g (typ.)
SOP16-P-300-1.27A : 0.18 g (typ.)
TSSOP16-P-0044-0.65A : 0.06 g (typ.)

Start of commercial production

1978-04
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Pin Assignment (top view)

TC4051B TC4052B

4 1 16 VDD 0Y 1 16 VDD

6 2 15 2 2Y 2 15 2X

COM 3 14 1 Y-COM 3 14 1X

7 4 13 0 3Y 4 13 X-COM

5 5 12 3 1Y 5 12 0X

INH 6 11 A INH 6 11 3X

VEE 7 10 B VEE 7 10 A

VSS 8 9 C VSS 8 9 B

TC4053B

1Y 1 16 VDD

0Y 2 15 Y-COM

1Z 3 14 X-COM

Z-COM 4 13 1X

0Z 5 12 0X

INH 6 11 A

VEE 7 10 B

VSS 8 9 C

Truth Table
Control Inputs “ON” Channel
Inhibit C∆ B A TC4051B TC4052B TC4053B
L L L L 0 0X, 0Y 0X, 0Y, 0Z
L L L H 1 1X, 1Y 1X, 0Y, 0Z
L L H L 2 2X, 2Y 0X, 1Y, 0Z
L L H H 3 3X, 3Y 1X, 1Y, 0Z
L H L L 4 ― 0X, 0Y, 1Z
L H L H 5 ― 1X, 0Y, 1Z
L H H L 6 ― 0X, 1Y, 1Z
L H H H 7 ― 1X, 1Y, 1Z
H X X X None None None

X: Don’t care

Δ: Except TC4052B

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Logic Diagram
TC4051B

VDD
16

OUT c IN 0
13
A OUT c IN 1
11 14
Logic Level Converter

OUT c IN 2
15
B OUT c IN 3
10 12
OUT c IN 4
1
C OUT c IN 5
9 5
OUT c IN 6
2
INH OUT c IN 7
6 4
COMMON
3
8 7
VSS VEE

TC4052B

VDD
16 X-COMMON
13
OUT c IN 0X
12
OUT c IN 1X
14
Logic Level Converter

A
10 OUT c IN 2X
15
OUT c IN 3X
11
B
9 OUT c IN 0Y
1
OUT c IN 1Y
5
INH
6 OUT c IN 2Y
2
OUT c IN 3Y
8 7 4
Y-COMMON
VSS VEE 3

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TC4053B

VDD

16

X-COMMON
14
A OUT c IN 0X
11 12
Logic Level Converter OUT c IN 1X
13
OUT c IN 0Y
B 2
10
OUT c IN 1Y
1
C OUT c IN 0Z
5
9
OUT c IN 1Z
3
INH Z-COMMON
6 4
Y-COMMON
15
8 7
VSS VEE

Truth Table
Control Impedance between
C IN-OUT (Note)
H 0.5 to 5 × 102 Ω
L >109 Ω

Note: See electrical characteristics

OUT c IN

Absolute Maximum Ratings (Note)

Characteristics Symbol Rating Unit

DC supply voltage VDD-VSS −0.5 to 20 V

DC supply voltage VDD-VEE −0.5 to 20 V
Control input voltage VCIN VSS − 0.5 to VDD + 0.5 V
Switch I/O voltage VI/VO VEE − 0.5 to VDD + 0.5 V
Control input current ICIN ±10 mA
Potential difference across I/O during ON VI-VO −0.5 to 0.5 V
Power dissipation PD 300 (DIP)/180 (SOP/TSSOP) mW
Operating temperature range Topr −40 to 85 °C
Storage temperature range Tstg −65 to 150 °C

Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).

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Operating Ranges (Note)

Characteristics Symbol Test Condition Min Typ. Max Unit

VDD-VSS ― 3 ― 18
DC supply voltage V
VDD-VEE ― 3 ― 18
Control input voltage VIN ― VSS ― VDD V
Input/output voltage VIN/VOUT ― VEE ― VDD V

Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused Control inputs must be tied to either VDD or VSS.

Static Electrical Characteristics

Test Condition −40°C 25°C 85°C
Characteristics Symbol VSS VEE VDD Unit
Min Max Min Typ. Max Min Max
(V) (V) (V)
5 3.5 ― 3.5 2.75 ― 3.5 ―
Control input high VEE = VSS
VIH 10 7.0 ― 7.0 5.50 ― 7.0 ― V
voltage
RL = 1 kΩ
VIS = VDD to VSS 15 11.0 ― 11.0 8.25 ― 11.0 ―
thru 1 kΩ IIS < 2 μA 5 ― 1.5 ― 2.25 1.5 ― 1.5
Control input low on all OFF
VIL 10 ― 3.0 ― 4.5 3.0 ― 3.0 V
voltage channels
15 ― 4.0 ― 6.75 4.0 ― 4.0
0 0 5 ― 850 ― 240 950 ― 1200
On-state 0 ≤ VIS ≤ VDD
RON 0 0 10 ― 210 ― 110 250 ― 300 Ω
resistance RL = 10 kΩ
0 0 15 ― 140 ― 80 160 ― 200

ΔOn-state 0 0 5 ― ― ― 10 ― ― ―
resistance
RON∆ ― 0 0 10 ― ― ― 6 ― ― ― Ω
between any 2
switches 0 0 15 ― ― ― 4 ― ― ―

Input/output VIN = 18 V, VOUT = 0 V 18 ― ±100 ― ±0.01 ±100 ― ±1000

IOFF nA
leakage current VIN = 0 V, VOUT = 18 V 18 ― ±100 ― ±0.01 ±100 ― ±1000
5 ― 5.0 ― 0.005 5.0 ― 150
Quiescent supply
IDD VIN = VSS, VDD (Note) 10 ― 10 ― 0.010 10 ― 300 μA
current
15 ― 20 ― 0.015 20 ― 600
VIH = 18 V 18 ― 0.1 ― 10−5 0.1 ― 1.0
Input current IIN μA
VIL = 0 V 18 ― −0.1 ― −10−5 −0.1 ― −1.0
Input capacitance CIN ― ― ― ― ― 5 7.5 ― ― pF
Switch input
CIN ― ― ― ― ― 10 ― ― ― pF
capacitance
TC4051B 10 ― ― ― 58 ― ― ―
Output
COUT TC4052B 10 ― ― ― 30 ― ― ― pF
capacitance
TC4053B 10 ― ― ― 17 ― ― ―
TC4051B 10 ― ― ― 0.2 ― ― ―
Feedthrough CIN-
TC4052B 10 ― ― ― 0.2 ― ― ― pF
capacitance C-OUT
TC4053B 10 ― ― ― 0.2 ― ― ―

Note: All valid input combinations.

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Switching Characteristics (Ta = 25°C, CL = 50 pF)
Test Condition
Characteristics Symbol VSS VEE VDD Min Typ. Max Unit
(V) (V) (V)
0 0 5 ― 15 45
Phase difference between
φI-O ― 0 0 10 ― 8 20 ns
input to output
0 0 15 ― 6 15
0 0 5 ― 170 550
tpZL
0 0 10 ― 90 240
Propagation delay time tpZH
RL = 1 kΩ 0 0 15 ― 70 160 ns
(A, B, C, -OUT) tpLZ
0 −5 5 ― 100 240
tpHZ
0 −7.5 7.5 ― 80 160
0 0 5 ― 120 380
0 0 10 ― 60 200
Propagation delay time tpZL
RL = 1 kΩ 0 0 15 ― 50 160 ns
(INH-OUT) tpZH
0 −5 5 ― 80 200
0 −7.5 7.5 ― 60 160
0 0 5 ― 170 450
0 0 10 ― 90 210
Propagation delay time tpLZ
RL = 1 kΩ 0 0 15 ― 70 160 ns
(INH-OUT) tpHZ
0 −5 5 ― 100 210
0 −7.5 7.5 ― 80 160
−3dB cutoff frequency
−5 −5 5 ― 20 ―
TC4051B
fmax (I-O) RL = 1 kΩ (Note 1) −5 −5 5 ― 30 ― MHz
TC4052B
−5 −5 5 ― 40 ―
TC4053B
−2.5 −2.5 2.5 ― 0.15 ―
RL = 10 kΩ
Total harmonic distortion ― −5 −5 5 ― 0.03 ― %
f = 1 kHz (Note 2)
−7.5 −7.5 7.5 ― 0.02 ―
−50dB feedthrough
― RL = 1 kΩ (Note 3) −5 −5 5 ― 500 ― kHz
(switch off)
Crosstalk ― RL = 1 kΩ (Note 4) −5 −5 5 ― 1.5 ― MHz
RIN = 1 kΩ 0 0 5 ― 200 ―
Crosstalk
― ROUT = 10 kΩ 0 0 10 ― 400 ― mV
(control-OUT)
CL = 15 pF 0 0 15 ― 600 ―

VOS
Note 1: Sine wave of ±2.5 Vp-p shall be used for Vis and the frequency of 20 log 10 = −3dB shall be fmax.
Vis

 V − VEE 
Note 2: Vis shall be sine wave of ±  DD  p-p.
 4 

VOS
Note 3: Sine wave of ±2.5 Vp-p shall be used for Vis and the frequency of 20 log 10 = −50dB shall be
Vis
feed-through.
VOS
Note 4: Sine wave of ±2.5 Vp-p shall be used for Vis and the frequency of 20 log 10 = −50dB shall be
Vis
crosstalk.

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Package Dimensions

Weight: 1.00 g (typ.)

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Package Dimensions

Weight: 0.18 g (typ.)

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Package Dimensions

Weight: 0.06 g (typ.)

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 TC4051,4052,4053BP/BF/BFT

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