Scribd Logo
Upload

Welcome to Scribd!

  • 25 views

    Introduction

    Uploaded by

    Khilawan Choudhary

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Introduction

    Uploaded by

    Khilawan Choudhary
    25 views5 pages

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    25 views5 pages

    Introduction

    Uploaded by

    Khilawan Choudhary

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 5

    Low Power VLSI Design

    EC400150
    Detailed Syllabus

    Course Code : EC400150 Course name: Low Power VLSI Design

    L T P C

    3 0 0 3

    Pre-requisite: Digital Electronics and Digital IC Design


    Objectives: To acquaint the students with the fundamental concepts of low power VLSI CMOS circuit design .

    S. Contents Contact
    No. Hours
    1 Introduction, Sources of Power Dissipation, Static Power Dissipation, Low Static/Dynamic Power 10
    Techniques, CMOS logic and Pass-Transistor Logic Families
    2 Standard Adder Cells, CMOS Adders Architectures, Parallel Adder. 8
    3 Types Of Multiplier Architectures, Parallel Multiplier, Braun, Booth and Wallace Tree Multipliers 10
    and their performance comparison
    4 Sources of power dissipation in SRAMs, Low power SRAM circuit techniques, Sources of power 6
    dissipation in DRAMs
    5 Low power VLSI design methodology - LP Physical Design, LP Gate-Level Design, LP 8
    Architecture-Level Design, Algorithmic-Level power Reduction.
    Total Contact Hours 42
    Course Outcomes: Upon successful completion of this course, students should be able to:
    CO1: Understand the basic operation of MOSFET and Design CMOS adders architectures
    CO2: Analyze the performance parameter of Combinational logic circuits with
    Static/Dynamic Power Techniques.
    CO3: Design Sequential circuits and estimate their performance parameters.
    CO4: Estimate the stability and performance of Memories and array structures.
    CO5: Understand the power optimization techniques at different level
    Text\ Reference Books

    Sl. Name of Books/ Authors Year of


    No. Publication

    1.
    J. Rabaey, “Low Power Design Essentials” Springer 2009

    2. Kiat Seng Yeo and Kaushik Roy, Low- Voltage, Low-Power 2009
    VLSI Subsystems, Tata Mc Graw Hill

    3. Soudris D, Piguet C and Goutis C, Designing CMOS Circuits for 2002


    Low Power, Kluwer Academic Publishers

    4 Ajit Pal, Low Power VLSI Design, Wiley


    -
    5 Related research papers
    Evaluation Criteria

    The evaluation criteria for July-Dec 2021 semester will be as follows:


    Two quizzes/ class tests/ Assignments of 5 marks each =10 Marks
    Mid semester Examination = 20 Marks
    End semester Examination = 70 Marks

    You might also like

    pFad - Phonifier reborn

    Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

    Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


    Alternative Proxies:

    Alternative Proxy

    pFad Proxy

    pFad v3 Proxy

    pFad v4 Proxy