ATmega 8
ATmega 8
ATmega 8
Embedded Systems 2
2.Introduction To AVR 9
3.Input output registers 15
4.Seven Segment Display 19
5.Sensor And It’s Classification 24
6.dtmf 29
7.Relay 34
8.LCD Display 38
9.ADC (Analog To Digital Converter) 44
10.ADC WITH ATMEGA8 53
11.Interrupts With Atmega-8 Introduction 63
12.Timer 72
13.Timer0 78
14.Interrupt With Timer0 86
15.What is PWM 91
Embedded Systems
➢A system mainly designed to perform one Or few
specific tasks
By: 5Voltz.com
Definition
• Electronic device that sense (or detect) changes in
physical property of environment and produce a
corresponding output, generally as an electrical or
optical signal
➢Introduction
➢Types of LCD
➢PIN Description (16X2)
➢Registers in LCD
➢Basic Commands for LCD
Introduction
• LCD stands for Liquid Crystal Display.
80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F
C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF
Successive Approximation Type ADC
➢ Introduction
➢ Important Factors & Aspects
➢ Circuit Diagram
➢ Working
Need Of ADC
• Transducer or sensor produce some electric signal with
respect to some physical quantities of real world
➢ Resolution:
o Resolution is an important factor for accuracy of ADC
o High Resolution provides small Step Size thus provides more accuracy
➢ Reference Voltage: (V.ref)
➢ Conversion Time:
V.ref
Reference Voltage
Digital Output
1111
1111
1110 1110
1101
1101
1100 1100
1011
1011
1010 1010
1001
1001
1000 1000
0111
0111
0110 0110
0101
0101
0100 0100
0011
0011
0010 0010
0001
0001
0000
Problem : If V.ref=5, ADC is of 4bit, find out digital output when
Vin= 1.65V
Solution : By formula :
Step Size = V.ref/(Resolution-1) = 5/15 = 0.33V
Digital Output =Vin/Step Size = 1.65 / 0.33 = 5 ➔ 0101
By Circuit :
Clock SAR Value Vd Vin D
Q3 Q2 Q1 Q0
1 1 0 0 0 (5*8)/16=2.5 1.65 0
2 0 1 0 0 (5*4)/16=1.25 1.65 1
3 0 1 1 0 (5*6)/16=1.875 1.65 0
4 0 1 0 1 (5*5)/16=1.5625 1.65 1
• PIN-20 (AVCC):
➢ AVCC is the supply voltage pin for the A/D Converter.
➢ It should be externally connected to voltage source, even if the
ADC is not used.
➢ AVCC must not differ more than ±0.3V from VCC.
➢ One can use it as Ref. Voltage (Vref.) for ADC by setting ADMUX
register which we will discuss later.
ADLAR(ADC Left Adjust Register) : For defining how to store ADC values in ADC Data Register
4.Select ADC Channel
5.Start Conversion
www.instagram.com/5voltz/
www.facebook.com/Team5Voltz/
team5voltz@gmail.com
What Is Interrupt
• An interrupt is a signal generated by hardware or software(program) to the
microcontroller and it suspends normal flow of execution.
• For every interrupt, there is a fixed location in memory that holds the address of its
ISR and this is knows as Interrupt Vector.
Interrupt Triggered Interrupt Triggered
ISR() ISR()
• Global interrupt enable bit must be enabled to activate microcontrollers Interrupt. This bit is
located at 7th bit of Status Register (SREG)
• Beside Global Interrupt, each interrupt is associated with 2-bits, an Interrupt Enable Bit and
Interrupt Flag Bit.
• The interrupt enable bit is used to enable or disable a specific interrupt. Basically is tells the
microcontroller whether it should respond to the interrupt or not (when triggered).
• The interrupt flag bit is set whenever the interrupt event occur.
Steps In Servicing An Interrupt
• When Interrupt is triggered, the microcontroller completes the execution of the current
instruction, clears the I bit of SREG and stores the address of the next instruction ( i.e.
the address stored in the Program Counter) on the Stack.
• The Interrupt Vector of the triggered interrupt is then loaded in the PC(Program
Counter) and the microcontroller starts executing corresponding ISR.
• After execution of ISR(Interrupt Service Routine) block, the address that was stored on
the Stack in step 1 is reloaded in the PC(Program Counter) and the I bit is re-enabled.
• The microcontroller then start executing instructions from the point that it left off when
the interrupt was triggered.
10:00 Am Studies 12:30 Pm
Mobile
Recharge
Attempt Recharge
Call Mobile
Interrupt Response Time
• The interrupt execution response for all the enabled interrupts is 4 clock cycles minimum.
• After 4 clock cycles, the Program Vector address for the actual interrupt handling routine is
executed.
• During this 4-clock cycle period, the Program Counter is pushed onto the Stack. The Vector
is normally a jump to the ISR, and this jump takes 3 clock cycles.
• If an interrupt occurs during execution of a multi-cycle instruction, this instruction is
completed before the interrupt is served.
• If an interrupt occurs when the MCU is in sleep mode, the interrupt execution response time
is increased by 4 clock cycles. This increase comes in addition to the start-up time from the
selected sleep mode.
• A return from an interrupt handling routine takes four clock cycles. During these four clock
cycles, the Program Counter (2 bytes) is popped back from the Stack, the Stack Pointer is
incremented by 2, and the I-bit in SREG is set.
Timer Introduction
Reach Out Us At:
www.youtube.com/5voltz/
www.instagram.com/5voltz/
www.facebook.com/Team5Voltz/
team5voltz@gmail.com
Timer/Counter
1 1 1 1 1 1 1 0
. . . . . . . .
0 0 0 0 0 1 0 0
0 0 0 0 0 0 1 1
0 0 0 0 0 0 1 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0
Bottom
8 Bit Timer/Counter Register
Timers In Atmega8
Timer0 Timer1 Timer2
8 Bit Timer 16 Bit Timer 8 Bit Timer
• Single Channel Counter • True 16-bit Design (i.e. allows 16-bit PWM) • Single Channel Counter
• Frequency Generator • Variable PWM Period • Frequency Generator
• External Event Counter • Frequency Generator • 10-bit Clock Prescaler
• 10-bit Clock Prescaler • External Event Counter • Clear Timer on Compare
• Two Independent Output Compare Units Match (Auto Reload)
• Double Buffered Output Compare Registers • Glitch-free, phase Correct
• One Input Capture Unit Pulse Width Modulator (PWM)
• Input Capture Noise Canceler • Overflow and Compare
• Clear Timer on Compare Match (Auto Match Interrupt Sources (TOV2
Reload) and OCF2)
• Glitch-free, Phase Correct Pulse Width • Allows Clocking from External
Modulator (PWM) 32kHz Watch Crystal
• Four Independent Interrupt Sources (TOV1, Independent of the I/O Clock
OCF1A, OCF1B, and ICF1)
Significance of Frequency, Prescaler & Bit Resolution in Timer
Frequency Prescaler Effective Time Per Bit Resolution Time after which
Frequency Pulse timer overflow
1Mhz No 1Mhz 1X10^-6 8=0-255 2.55X10^-4 Sec
1Mhz No 1Mhz 1X10^-6 16=0-65535 6.55X10^-2 Sec
1Mhz 1024 976.56Hz 1.02X10^-3 8=0-255 0.26 sec
1Mhz 1024 976.56Hz 1.02X10^-3 16=0-65535 67.1 sec
12Mhz 1024 11718.75Hz 8.53X10^-5 8=0-255 2.17X10^-2 sec
12Mhz 1024 11718.75Hz 8.53X10^-5 16=0-65535 5.59 sec
Timer0 Introduction
Reach Out Us At:
team5voltz@gmail.com
www.youtube.com/5voltz/
www.instagram.com/5voltz/
www.facebook.com/Team5Voltz/
Timer0
• Timer0 is a general purpose,8bit Timer/Counter module.
• Features of Timer-0
1. Single Channel Counter.
2. Frequency Generator.
3. External Event Counter.
4. 10-bit Clock Prescaler.
Timer0 (Block Diagram)
n= 0, 1, 2 for timer0, 1, 2 respectively.
TOVn→TIFR
Prescaler
Internal Clock
TCCR0 (Timer Counter Control Register-0)
Timer/Counter Register – TCNT0
• Global interrupt enable bit must be enabled to activate microcontrollers Interrupt. This bit is
located at 7th bit of Status Register (SREG)
• Beside Global Interrupt, each interrupt is associated with 2-bits, an Interrupt Enable Bit and
Interrupt Flag Bit.
• The interrupt enable bit is used to enable or disable a specific interrupt. Basically is tells the
microcontroller whether it should respond to the interrupt or not (when triggered).
• The interrupt flag bit is set whenever the interrupt event occur.
TIMSK (Timer/Counter Interrupt Mask Register)
•When TOIE0 bit is written to 1 and I-bit located at 7th bit of Status
Register (SREG) is set (1), the overflow interrupt is enabled.
• When both global & local Interrupts are enabled and Timer0 overflows, it generate
an interrupt and set the corresponding interrupt flag bit (TOV0→TIFR Register) to 1
• When Interrupt flag is set to 1, the microcontroller pause the main program,
executes the code written in corresponding ISR and after executing the ISR, it
resumes the normal operation.
Timer0 Overflow Timer0 Overflow
Interrupt Triggered Interrupt Triggered
(TOV0 bit →1) (TOV0 bit→1)
Pause Pause
main() main() main()
Count 0 to 255 Count 0 to 255 Count 0 to 255
Resume Resume
ISR() ISR()
Solutions:
Total Time for 1 cycle of square wave= 1/frequency → 1/0.5 = 2 Seconds.
On time of pulse = Off time of pulse = 2/2 = 1 Seconds.
Pause Pause
main() main() main()
Count 0 to 255 Count 0 to 255 Count 0 to 255
261.35ms Resume 522.7 ms Resume
ISR() ISR()
Overflow=1 Overflow=2
Execute ISR Execute ISR
Corresponding Timer0 Corresponding Timer0
Overflow Interrupt Overflow Interrupt
What is PWM
• Pulse Width Modulation is a method of reducing the average power delivered by an
digital electrical signal, by effectively chopping it into discrete parts.
Button In ON Condition
• The longer the switch is ON compared to the OFF period, the higher the total power
supplied to the load.
Duty Cycle
• The PWM frequency has to be high enough that it should not affect the load.
(The resultant waveform perceived by the load must be as smooth as possible).
• Helps in regulating voltage and thus can be use for controlling brightness of smart
lighting system and to control the speed of dc motors.