Module 4- Sequential Logic Design

COUNTERS

Counters is a sequential circuit consisting a set of flip-flops used to count number of input
pulses

The input pulses may be clock pulses, or they may originate from some external source and
may occur at a fixed interval of time or at random.

Counter count in two ways

--up count
--down count

Present count of the counter represents state of the counter

An n ‐bit counter consists of n flip‐flops and can count from 0 through 2n- 1 and 2n states.

Each state frequency = Total frequency/ 2n

 TYPES OF COUNTERS

Asynchronous or ripple counter

Synchronous counters

Asynchronous or ripple counter:

Constructed using minimum hardware.

In asynchronous counters, each flip-flop is triggered by the previous flip-flop, and hence the speed of
operation is limited.

The settling time of the counter is the cumulative sum of the individual settling times of the flip-flops.
This type of counters is also called ripple or serial counter.
Synchronous counter

The speed limitation of asynchronous counters can be overcome by applying clock pulses
simultaneously to all of the flip-flops.

This causes the settling time of the flip-flops to be equal to the propagation delay of a single flip-
flop.

The increase in speed is usually attained at the price of increased hardware. This type of counter
is also known as a parallel counter
 ASYNCHRONOUS OR RIPPLE COUNTER

Construct using T flip-flops or J-K Flip-flop because the toggle feature is naturally suited for the
implementation of the counting operation.

The T input of both flip-flop is connected to a constant 1, which means that the state of the flip-flop
will toggle (reverse) at each negative edge of its clock.

Clock input of the first flip-flop is connected to the Clock line and output of Q drives flip-flop B
TIMING DIAGRAM
4 BIT ASYNCHRONOUS OR RIPPLE COUNTER
OUTPUT WAVEFORM
TRUTH TABLE FOR 4 BIT RIPPLE COUNTER
 What is MOD number or Modulus?

The counter has 16 different states. Thus it is a MOD-16 ripple counter.

The Mode number or Modulus of a counter is the total number of states it sequences through in
each complete cycle
MOD-number=2n
where n= no. of flipflops

The maximum binary number counted by the counter is 2n -1. Thus , 4 flip-flop counter can
count as high as (1111)2 = 24 -1=1510
 3 bit Asynchronous Binary Down Counter

Logic 1

MSB
LSB Q0’
Q1’ Q2’
 output waveform for 1st
Truth Table circuit

CLK UP COUNTER DOWN COUNTER

Q2 Q1 Q0 Q2’ Q1’ Q0’
Initially 0 0 0 1 1 1

1 0 0 1 1 1 0
2 0 1 0 1 0 1
3 0 1 1 1 0 0
4 1 0 0 0 1 1
5 1 0 1 0 1 0
6 1 1 0 0 0 1
7 1 1 1 0 0 0
output waveform for 2nd
circuit
3 bit Asynchronous Up/Down Counter
 Propagation delay in asynchronous counter
The period of the clock T should be:

Thus, the maximum frequency (f) that can be used in an asynchronous counter
is given by

Thus, f should be less than or equal to 1/nx tpd. Hence, the maximum clock frequency
that can be applied in an n-bit asynchronous counter is
4 bit Synchronous Counter
Truth Table of 4 bit synchronous counter
4 bit Synchronous down counter
Truth Table of 4 bit synchronous down counter
Synchronous Up-Down Counter
 Propagation delay in synchronous counter

Total delay = Propagation delay of one flip-flop + Propagation delay of an AND gate.

 The maximum frequency of operation of a synchronous counter is given by,

where tp is the propagation delay of one flip-flop and tg is the propagation delay of
one AND gate.
 Design of Synchronous Counter

Step 1: Determine the number of flip flops and decide the type of flip-flop

Step 2: Excitation table of flip-flop

Step 3: State diagram and circuit excitation table

Step 4: obtain simplified equations using K-map

Step 5:Draw the logic diagram

 Design of 3 bit synchronous counter
Step 2: Excitation table of flip-flop

Qt Qt+1 T

0 0 0

0 1 1

1 0 1

1 1 0
Step 3: State diagram and circuit excitation table
Step 4: obtain simplified equations using K-map

Step 5:Draw the logic diagram

 Synchronous counter with Modulus < 2n
Design of a MOD-3 Counter
Step 1: Determine the number of flip flops and decide the type of flip-flop

 MOD-3 counter is a counter which has only three distinct states. To design a counter with
three states (N=3), the number of flip-flops required are 2.

Here n is the number of flip-flops required and N is the number of states present in the
counter.

Step 2: Excitation table of T flip-flop

Qt Qt+1 T

0 0 0
0 1 1
1 0 1
1 1 0
Step 3: State diagram and circuit excitation table

State table of MOD 3 counter

Circuit excitation table of MOD 3 counter

Step 4: Obtain simplified equations using K-map

Step 5:Draw the logic diagram of MOD-3 Counter

 Design of a MOD-5 Counter

Step 1: Determine the number of flip flops and decide the type of flip-flop
 MOD-5 counter is a counter which has only 5 distinct states. To design a counter with five states (N=5), the
number of flip-flops required are 3.

Here n is the number of flip-flops required and N is the number of states present in the counter.

Step 2: Excitation table of JK flip-flop CLK J K Qt Qt+1 State

Qt Qt+1 J K 0 0 0 0 No change
1 0 0 1 1
0 1 0 0 Reset
0 0 0 x
1 0 1 1 0
0 1 1 x
1 0 0 1 Set
1 0 x 1
1 1 0 1 1
1 1 x 0
1 1 0 1 Toggle
1 1 1 1 0
Step 3: State diagram and circuit excitation table

State table of MOD 5 counter

Circuit excitation table of MOD 5 counter

Step 4: Obtain simplified equations using K-map
Step 5:Draw the logic diagram of MOD-5 Counter
 Design of a MOD-10 (Decade or BCD) Counter

Step 1: Determine the number of flip flops and decide the type of flip-flop
 MOD-10 counter is a counter which has only 10 distinct states. To design a counter with three states
(N=10), the number of flip-flops required are 4.

Here n is the number of flip-flops required and N is the number of states present in the counter.

Step 2: Excitation table of T flip-flop

Qt Qt+1 T

0 0 0
0 1 1
1 0 1
1 1 0
Step 3: State diagram and circuit excitation table

State table of MOD 10 counter

Circuit excitation table of MOD 10

counter
Step 4: Obtain simplified equations using K-map
Step 5:Draw the logic diagram of MOD-10 Counter