ECE 315 Computer Interfacing

Lab #0: Tutorial on the Digilent Zybo Z7 Board and the

FreeRTOS Real-time Kernel
Winter 2022

Lab Dates, Report Dates, and Demo Due Dates

This lab exercise will be held on January 18 (LAB H21), January 19 (LAB H31), January 20 (LAB
H41), and January 21 (LAB H51). No report is required for this tutorial lab. No demo is required
either; however, you need to have a working software and hardware platform in time for Lab #1,
which starts two weeks later (the second week of February). Take advantage of the assistance of
the lab TAs and make sure that you get a working hardware and software environment by the
end of Lab #0.

Objectives
• To verify that your hardware and software environments are working properly.
• To gain familiarity with the Digilent Zybo Z7 Zynq-7000-based board.
• To gain experience with using the Xilinx Vivado and SDK tools.
• To gain some initial experience with the FreeRTOS real-time kernel.

Hardware Platform and Software Environment

• The hardware platform is a Digilent Zybo Z7 development board, which is based on a
Xilinx Zynq-7010 System-on-Chip (SoC) silicon chip. The Zynq-7010 contains two 667MHz
ARM Cortex A9 32-bit CPUs, called CPU0 and CPU1, which can simultaneously execute
two independent software systems. In the ECE 315 lab, CPU0 will run the FreeRTOS
software system; the second processor, CPU1, will be left disabled.
• As well as the two processors, the Zynq-7010 SoC also contains a variety of other
hardware subsystems including: (a) a high-performance Double Date Rate (DDR)
interface, which the CPUs use to access software and data that is stored in a 1-Gbyte
DDR3 DRAM memory; (b) a Field-Programmable Gate Array (FPGA) fabric, which allows
customized digital logic systems to be synthesized and interfaced to the two A7 CPUs; (c)
two serial ports, two USB 2.0 ports, two Gigabit Ethernet ports, two SPI ports, two CAN
ports, and two I2C ports; (d) 54 general-purpose I/O pins; and (e) two 16-bit

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 1Msample/second analog-to-digital converters (ADCs) with 17 software-selectable analog
input pins. Not all of these interface signals are available at the connectors and headers
on the Zybo Z7 board.
• The Zybo Z7 board houses the Zynq-7010 SoC and provides many connectors, headers,
and a variety of simple input/output devices. In particular, the Zybo Z7 has: (a) A
microUSB port that allows configuration files and software to be downloaded from the
PC host. This port also communicates text messages, produced by print statements in
software running on the CPUs, to be displayed on the host PC in the console window in
Vivado SDK. (b) One RJ45 Ethernet connector, to provide a wired network connection.
(c) One microSD flash connector for accessing stored software and data held in an external
nonvolatile memory. (d) Five Pmod (Peripheral MODule) expansion ports, which can be
used to enhance the Zybo Z7 by connecting Pmod devices. Two of the Pmod ports
connect to a 2-digit 7-segment LED display (SSD), and a third Pmod port is connected to a
16button keypad. This leaves two free Pmod ports on the Zybo Z7. (e) Eight pushbuttons,
including a reset button, a clear FPGA configuration button, and four user buttons. (f)
Four user slide switches. (g) Four user-controlled white LEDs and one red-green-blue
(RGB) LED.
• The Vivado SDK tool is an Integrated Development Environment (IDE) for software
development that is based on the widely used open-source Eclipse framework. In order
to produce an executable binary image file, SDK needs to know details of the target board
upon which the software will be running. The required details of the hardware, together
with the software drivers that control the hardware, are contained in the board support
package (BSP) for the Zybo Z7.
• The demonstration source file that is downloadable from the Lab #0 section of the lab
eClass site. This source file contains the FreeRTOS kernel functions as well as the
application code in C that you will be inspecting and modifying.

Documentation
• Three HOWTO Vivado installation guides in the Lab References Section of the lab eClass
page (titled "ECE 315 Winter 2022" on eClass). There are installation guides for three
possible host PC operating systems: (a) Microsoft Windows 10, (b) Linux, and (c) Apple
MacOS. Versions of the Vivado tools are available that can run natively in both Windows
and Linux. Note that a MacOS installation of Vivado first requires that a free copy of the
virtualization software VMware be obtained from the site
ualberta.onthehub.com and installed on your Mac. Then a lightweight version of Linux,
called Lumbuntu 16.04 LTS, must be installed and executed as a virtual machine in

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 VMware. Then the Linux version of Vivado must be downloaded and installed on the
Lumbuntu virtual machine.
• Digilent Zybo Z7 Reference Manual: https://reference.digilentinc.com/reference/
programmable-logic/zybo-z7/reference-manual
• The FreeRTOS Reference Manual: https://www.freertos.org/fr-content src/uploads/
2018/ 07/FreeRTOS_Reference_Manual_V10.0.0.pdf
• Chapter 5 of the ECE 315 lecture slides.

Prelab Work
The 2019.1 version of the Vivado design package, including the Software Development Kit (SDK),
must be installed on your host computer before starting Lab #0. The instructions for installing
Vivado 2019.1 are given in HOWTO handouts on the eClass site for the Microsoft Windows 10,
Linux and MacOS host operating system environments. You will need about 77 Gbytes of free
storage on a Windows or Linux host (100 GB on a Mac) to complete the installation. However,
once the installation is finished, the remaining installed binary code will be about 30 GB (more
on a Mac, which also requires VMware and the Lubuntu virtual machine).

Overview of Xilinx Vivado and SDK

Xilinx Vivado, like other contemporary Integrated Development Environments (IDEs) for FPGAs
and FPGA-based SoCs, is a complex software package. Synthesizing a hardware-software design
requires two main steps: (1) synthesizing the hardware platform, and (2) compiling the software
for that hardware platform.

Important: Handling Precautions for the Zybo Z7 Board

The Zybo Z7 board contains sensitive electronic components that can be easily damaged by
electrostatic discharge (ESD) when touched. The situation is worse in a cold climate, such as
Edmonton's, where the indoor air is heated and thus the relative humidity of the air becomes
very low. This fact, coupled with the fact that many people wear shoes with rubber-based,
electrically insulating shoes and/or their floors are covered with static-creating carpets, mean
that it easy for your body to build up static charges of many hundreds and even thousands of
volts. When your body gets charged up with significant amounts of static charge, and you then
go and touch a connector on a circuit board (say a copper trace on the board, or a pin on a
connector or header), it is easy to cause that charge to discharge through the conductor and
punch its way through the fragile transistor gates in the input circuits. It is standard practice to
provide protection diodes at the pins of integrated circuits, so that the diodes will provide a safe

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path for discharging any deposited static electricity. However, serious damage can still occur
when you touch conductors since the ESD protection circuits can't provide perfect protection.

As a standard precaution, be very careful when you handle circuit boards. If possible, wear a
grounded wrist strap when you are handling a circuit board. Avoid wearing rubber soled shoes.
Avoid touching exposed conductors and the pins in connectors and headers. Get in the habit
of touching a nearby grounded conductor before you start handling a circuit board.
Laboratory Exercise Instructions
Step 1: Do not connect the Zybo Z7 just yet to your PC. Download the zipped project directory
from the Tutorial Lab section of the Laboratory eClass site ("ECE 315 – Winter 2022") and unzip
the folder at a convenient location (say a lab0 subdirectory) in your personal computer. From
the unzipped folder, open the Tutoriallab_ECE315 project file using Vivado 2019.1.

Step 2: Click on the Open Block Design command in the IP Integrator section of the Flow Navigator
Window at the left side of the Vivado desktop window, as highlighted in yellow in Figure 1. This
action will cause a block diagram of the pre-designed Zynq-7010 hardware configuration for the
tutorial lab to be displayed.

Figure 1: The Vivado Desktop Window

Step 3: Next, click on the Generate Bitstream command in the PROGRAM AND DEBUG section of
Flow Navigator Window. Select Yes in the pop-up window for Synthesis. Next click OK in the
Launch Runs pop-up window.

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On the top right-hand side of the window, you can watch the progress of the synthesis process.
Synthesis causes the given high-level specification the Zynq-7000 SoC hardware configuration to
be converted into a bitstream configuration file. (This bitstream file, when downloaded into the
SoC, will cause the desired hardware configuration to be set up in the SoC to create the
embedded system upon which you will run the FreeRTOS kernel and application software.)

Step 4: Once the bitstream is successfully generated, a Bitstream Generation Completed window
will open. Click Cancel. Under the File pull-down menu, select the Export Hardware command, as
shown below in Figure 2. The pop-up Export Hardware window will open. Check on the Include
bitstream option and leave the remaining settings with their default values. Click on the OK
response. The hardware design files that are required for software development in the SDK tool
are now generated.

Figure 2: Exporting a Hardware Design from Vivado

Step 5: The hardware design is now exported into the SDK software development tool. Note that
the task application code appears as functions within a program that forms the FreeRTOS
software system. Start SDK by selecting Go to File -> Launch SDK.

Step 6: The Xilinx SDK desktop window will now open and you must wait for the initialization
process to finish. You will soon see the populated SDK windows appear, as shown in Figure 3. The
exported hardware design appears in the folder “design_1_wrapper_hw_platform_0” in the
Project Explorer pane at the left side. You will recognize a number of .c C files and .h header files

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in this folder. The Tcl script file ps7_init.tcl is used to initialize and configure the Zynq Processing
System, which is called a ps7 (to identify a Processing System CPU in a Zynq7000 SoC). Tcl
(pronounced "tickle") is a high-level scripting language that was used to create Xilinx Vivado.
After gaining more experience with the tools, you can investigate how to create Tcl scripts, with
file type .tcl, that contain useful sequences of Vivado and SDK commands.

Figure 3 : The SDK Desktop Window

PART-1:
Step 7: Click on the File->New->Application Project command, as shown in Figure 4. Enter the
project name that you want to use. Under the OS Platform drop-down menu, select
freertos_10_xilinx to add the FreeRTOS kernel to the software system. Leave the other selected
choices at their default values and click Next. Leave the default template as FreeRTOS Hello World
and click Finish.

It is common to include a "Hello World" tutorial example in software design environments such
as SDK. Such an example demonstrates to new users how a minimal software program can be
compiled, downloaded to the target hardware, and executed to produce a simple output
message. More complicated software programs can then be developed by modifying and growing
the Hello World example. Trying to create a brand-new working "Hello World" example from the
documentation would take a long time for a new user.

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 Figure 4: Creating a New Project in SDK

Step 8: After the workspace build is done, two new folders will appear in the Project Explorer
Window. In Figure 5, note the appearance of helloworld and helloworld_bsp. Expand the
helloworld subfolder and open the source file freertos_hello_world.c. Replace this code with the
helloworld.c file that was provided to you on eClass and save the changes. When executed later
in Step 10, this tutorial lab code will print the message …Hello World… into the console window
(at the bottom of the desktop) four times at an interval of 1 second.

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 Figure 5: The Project Explorer Window in SDK

Step 9: It is now time to connect the FPGA board. The Zybo board can be powered using the
micro-USB cable or from the external power supply. Jumper JP6 located near the ON/OFF switch
needs to be adjusted based on the power supply being used. The first method uses the micro-
USB cable as shown in Figure 6. This micro-USB cable will supply the power as well as providing
JTAG-UART connection from the PC to the board. Set the Jumper JP6 to “USB” in this case. The
second method involves using the external power supply as illustrated in Figure 7. Here, the
micro-USB cable will only serve the purpose of establishing a JTAG-UART connection. Set the
Jumper JP6 to “wall”.

You have been provided with the external power supply adapter, however, the board can receive
sufficient power over the USB cable.

Turn ON the power switch and you should see a red light on LD13, as shown in Figure 8. Now, to
establish serial communication with the board, click on the SDK Terminal tab in the bottom
window of the Xilinx SDK, as shown in Figure 9. Click on the + icon on the top border of the SDK
Terminal window and a pop-up Connect to serial port window should open. In the Port pulldown
menu of the pop-up window, select the COM terminal on your PC to which the micro-USB cable
from your Zybo Z7 board is connected. Leave the other settings at their default values, including
the baud rate of 115200. Click OK.

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Figure 6: Supplying Power to the Zybo board Using the Micro-USB Cable

Figure 7: Supplying Power to the Zybo Board Using a Cable to the Power Supply

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 Figure 8 : The Power Switch (at left) and Power Indicator LED (at right)

Figure 9 : The Serial Port Configuration Window in SDK

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Step 10: To run the application, right click on the helloworld folder inside the Project Explorer
pane. Select Run As-> Run Configurations, as shown in Figure 10. A Run Configurations window
will open as shown in Figure 11.

Figure 10 : Running the Hello World Application in SDK

Double-click on the Xilinx C/C++ application (System Debugger) command. In the same window,
on right side check the boxes for Reset entire system and Program FPGA. Make sure that the
remaining settings are left with their default values, as shown in Figure 11. Under the Applications
tab, verify that the ps7_cortexa9_0 checkbox is selected, the Project Name is correct (that is, the
project name that you chose in Step 7) and the Application field has the .elf file type mentioned.
The file type .elf stands for Executable and Linkable Format, which is a widely used file format for
encoding binary files for embedded systems. Click on Apply-> Run to produce the following
sequence of actions: (1) a board reset, (2) downloading the hardware configuration to the Zynq-
7010 SoC, (3) downloading the compiled software to the DDR3 memory on the Zybo Z7 board,
and (4) executing the software on the Cortex A9 processor that is designated
"hardware_platform_0", which is associated with CPU0.

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 Figure 11 : Preparing to Configure the FPGA and Execute a Program

You should now see that once the application begins to run, the DONE LED (LD12) turns green on
the board, and serial messages produced by the xil_printf() statement in the software will be
displayed in the SDK terminal window.

Step 11: Now modify the xil_printf statement that is in a commented section in the code. For
instance, change the statement to include your name. Re-run the application by clicking on Apply
-> Run and confirm the difference in the serial message are now being printed.

PART-2:
This part creates two FreeRTOS tasks, one responsible for blinking the BLUE LED and the other
responsible for blinking the YELLOW led using the RGB LED (LD6 on board). The BLUE task runs
and goes into a delay (i.e., it is deliberately blocked and is waiting for the delay period to finish)
for 1.5 sec. The YELLOW task runs and then goes into a delay period for 2.5 sec. If there is a case
where both the tasks come out of delay state at same instance, BLUE task will run first compared
to YELLOW task as BLUE task has highest priority. In this exercise, you will be responsible for
changing the RGB LED colors on board. By default, one task is assigned a blue color and the other
is assigned a yellow color. Download the gpio_tasks_leds.c file from the eclass. Rest of the color
definitions are provided at the top of the code file. Modify the C code under the commented
section of the file to change the color of your choice.

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Step 12: As in step 7, you start by creating a new application project File->New->Application
Project. Follow the same procedure except that under the project name, specify “gpio_leds” this
time. Steps 7 and 8 must be repeated, except this time, after you open freertos_hello_world.c,
replace the existing code with the code from gpio_tasks_leds.c. Save the changed source file.

Step 13: The Zybo Z7 board must be turned ON and the serial connection should be established
as mentioned in the above steps. Run this project in the same manner as before. You should now
see the RGB LED display and blink the colors blue and yellow. On the serial terminal you will see
the messages being printed that identify the task function that is currently being executed.

Go ahead and try to display different colors using the definitions provided in the code file and by
changing the xil_printf statements accordingly.

Report Requirements
No report is required for this tutorial lab exercise.

Marking Scheme
This lab is not worth any marks. However, it is important that you complete this lab exercise if
you wish to succeed on the subsequent lab exercises, which are all graded and worth marks.

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