G 709V3 Approved
G 709V3 Approved
G 709V3 Approved
1331
Summary
This Recommendation defines the requirements for the optical transport module of order n (OTM-n)
signals of the optical transport network, in terms of:
– optical transport hierarchy (OTH);
– functionality of the overhead in support of multi-wavelength optical networks;
– frame structures;
– bit rates;
– formats for mapping client signals.
The first revision of this Recommendation includes the text of Amendment 1 (ODUk virtual
concatenation, ODUk multiplexing, backward IAE), extension of physical interface specification,
ODUk APS/PCC signal definition and several editorial enhancements.
The second revision of this Recommendation includes the text of Amendments 1, 2, 3, Corrigenda
1,2, Erratum 1, Implementers Guide, support for an extended (unlimited) set of constant bit rate
client signals, a flexible ODUk, which can have any bit rate and a bit rate tolerance up to 100 ppm,
a client/server independent generic mapping procedure to map a client signal into the payload of an
OPUk, or to map an ODUj signal into the payload of one or more tributary slots in an OPUk, ODUk
delay measurement capability.
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Source
ITU-T Recommendation G.709/Y.1331 was approved on 16 March 2003 by ITU-T Study Group 15
(2001-2004) under the ITU-T Recommendation A.8 procedure. This text includes G.709/Y.1331
(2003) Amendment 1 approved on 14 December 2003, G.709 Implementer‟s Guide (May 2005),
G.709 corrigendum 1 (December 2006), G.709 Erratum 1 (November 2007), G.709 Amendment 2
(November 2007) and G.709 Amendment 3 (April 2009).
Document history
Issue Notes
3.0 October 2009 – Third version includes G.709 Amendments 1, 2 and 3, Erratum 1,
Corrigenda 1,2, Implementer‟s Guide, support for an extended (unlimited) set of
constant bit rate client signals, a flexible ODUk, which can have any bit rate and a
bit rate tolerance up to 100 ppm, a client/server independent generic mapping
procedure to map a client signal into the payload of an OPUk, or to map an ODUj
signal into the payload of one or more tributary slots in an OPUk, ODUk delay
measurement capability.
2.4 April 2009 – Includes G.709 Amendment 3 (2009)
2.3 November 2007 – Includes G.709 Erratum 1 (2007) and Amendment 2 (2007)
2.2 December 2006 – Includes G.709 Implementer‟s Guide (2005) and Corrigendum 1
(2006)
2.1 December 2003 – Extension by Amendment 1 related to the applicability of the
ODUk APS/PCC channel
2.0 March 2003 – Second version includes G.709 (2001) Amendment 1, extension of
physical specification for OTM-0.2 and OTM-0.3 (clauses 2 and 9.1), definition of
ODUk APS/PCC signal (subclause 15.8.2.4), several editorial enhancements
(clauses 6.1, 15.7.2.1.2, 15.8.2.1.2, 15.8.2.2.2, 19.2.1, 19.2.2, 19.2.3, 19.3.1, 19.3.2,
19.3.3) and merging of Appendices I and V.
1.0 am1 November 2001 – Amendment 1 includes Backward IAE, ODUk virtual
concatenation (clause 18) and ODUk multiplexing (clause 19)
1.0 Initial version, February 2001
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CONTENTS
Page
1 Scope............................................................................................................................. 11
2 References..................................................................................................................... 11
3 Terms and definitions ................................................................................................... 12
4 Abbreviations ................................................................................................................ 14
5 Conventions .................................................................................................................. 18
6 Optical transport network interface structure ............................................................... 19
6.1 Basic signal structure ...................................................................................... 20
6.1.1 OCh substructure ............................................................................................ 20
6.1.2 Full functionality OTM-n.m (n ≥ 1) structure ................................................ 21
6.1.3 Reduced functionality OTM-nr.m and OTM-0.m structure ........................... 21
6.1.4 Parallel OTM-0.mvn structure........................................................................ 21
6.2 Information structure for the OTN interfaces ................................................. 21
7 Multiplexing/mapping principles and bit rates ............................................................. 24
7.1 Mapping .......................................................................................................... 27
7.2 Wavelength division multiplex....................................................................... 28
7.3 Bit rates and capacity...................................................................................... 28
7.4 ODUk Time-Division Multiplex .................................................................... 32
8 Optical transport module (OTM-n.m, OTM-nr.m, OTM-0.m, OTM-0.mvn) .............. 37
8.1 OTM with reduced functionality (OTM-0.m, OTM-nr.m, OTM-0.mvn) ...... 38
8.1.1 OTM-0.m ........................................................................................................ 38
8.1.2 OTM-nr.m ...................................................................................................... 39
8.1.2.1 OTM-16r.m .................................................................................................... 39
8.1.2.2 OTM-32r.m .................................................................................................... 40
8.1.3 OTM-0.mvn .................................................................................................... 41
8.2 OTM with full functionality (OTM-n.m) ....................................................... 42
9 Physical specification of the ONNI .............................................................................. 44
9.1 OTM-0.m ........................................................................................................ 44
9.2 OTM-nr.m ...................................................................................................... 44
9.2.1 OTM-16r.m .................................................................................................... 44
9.2.2 OTM-32r.m .................................................................................................... 44
9.3 OTM-n.m ........................................................................................................ 44
9.4 OTM-0.mvn .................................................................................................... 44
10 Optical channel (OCh) .................................................................................................. 44
10.1 OCh with full functionality (OCh) ................................................................. 44
10.2 OCh with reduced functionality (OChr) ......................................................... 45
11 Optical channel transport unit (OTU) ........................................................................... 45
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19.4 OPUk Multiplex Overhead and ODTU Justification Overhead ..................... 144
19.4.1 OPUk Multiplex Structure Identifier (MSI) ................................................... 148
19.4.1.1 OPU2 Multiplex Structure Identifier (MSI) – Payload Type 20 .................... 149
19.4.1.2 OPU3 Multiplex Structure Identifier (MSI) – Payload Type 20 .................... 149
19.4.1.3 OPU1 Multiplex Structure Identifier (MSI) – Payload Type 20 .................... 150
19.4.1.4 OPU4 Multiplex Structure Identifier (MSI) – Payload Type 21 .................... 150
19.4.1.5 OPU2 Multiplex Structure Identifier (MSI) – Payload Type 21 .................... 151
19.4.1.6 OPU3 with 1.25G Tributary Slots (Payload Type 21) Multiplex Structure
Identifier (MSI) .............................................................................................. 152
19.4.2 OPUk Payload Structure Identifier Reserved overhead (RES) ...................... 153
19.4.3 OPUk Multiplex Justification Overhead (JOH) ............................................. 153
19.4.3.1 Asynchronous Mapping Procedures (AMP) .................................................. 153
19.4.3.2 Generic Mapping Procedure (GMP) .............................................................. 154
19.4.4 OPU Multi Frame Identifier overhead (OMFI) .............................................. 154
19.5 Mapping ODUj into ODTUjk ........................................................................ 155
19.5.1 Mapping ODU1 into ODTU12 ....................................................................... 156
19.5.2 Mapping ODU1 into ODTU13 ....................................................................... 159
19.5.3 Mapping ODU2 into ODTU23 ....................................................................... 162
19.5.4 Mapping ODU0 into ODTU01 ....................................................................... 165
19.6 Mapping of ODUj into ODTUk.ts.................................................................. 165
19.6.1 Mapping ODUj into ODTU2.M ..................................................................... 166
19.6.2 Mapping ODUj into ODTU3.M ..................................................................... 167
19.6.3 Mapping ODUj into ODTU4.M ..................................................................... 168
Annex A – Forward error correction using 16-byte interleaved RS(255,239) codecs ............
Annex B – Adapting 64B/66B encoded clients via transcoding into 513B code blocks .........
Annex C – Adaptation of OTU3 and OTU4 over multichannel parallel interfaces ................
Annex D – Generic Mapping Procedure Principles .................................................................
Appendix I – Range of stuff ratios for asynchronous mappings of CBR2G5, CBR10G,
and CBR40G clients with 20 ppm bit-rate tolerance into OPUk, and for
asynchronous multiplexing of ODUj into ODUk (k > j) ..............................................
Appendix II – Examples of functionally standardized OTU frame structures ........................
Appendix III – Example of ODUk multiplexing .....................................................................
Appendix IV – Example of fixed stuff in OPUk with multiplex of lower-order ODUk
signals ...........................................................................................................................
Appendix VI – ODUk multiplex structure identifier (MSI) examples ....................................
Appendix VII – Adaptation of parallel 64B/66B encoded clients ...........................................
Appendix VIII – Improved Robustness for mapping of 40GBASE-R into OPU3 using
1027B code blocks ........................................................................................................
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1 Scope
The optical transport hierarchy (OTH) supports the operation and management aspects of optical
networks of various architectures, e.g., point-to-point, ring and mesh architectures.
This Recommendation defines the interfaces of the optical transport network to be used within and
between subnetworks of the optical network, in terms of:
– optical transport hierarchy (OTH);
– functionality of the overhead in support of multi-wavelength optical networks;
– frame structures;
– bit rates;
– formats for mapping client signals.
The interfaces defined in this Recommendation can be applied at user-to-network interfaces (UNI)
and network node interfaces (NNI) of the optical transport network. It is recognized for interfaces
used within optical subnetworks, aspects of the interface are optical technology dependent and
subject to change as technology progresses. Therefore, optical technology dependent aspects (for
transverse compatibility) are not defined for these interfaces to allow for technology changes. The
overhead functionality necessary for operations and management of optical subnetworks is defined.
The second revision of this recommendation introduces
– support for an extended (unlimited) set of constant bit rate client signals,
– a flexible ODUk, which can have any bit rate and a bit rate tolerance up to 100 ppm
– a client/server independent generic mapping procedure to map a client signal into the
payload of an OPUk, or to map an ODUj signal into the payload of one or more tributary
slots in an OPUk
– ODUk delay measurement capability.
2 References
The following ITU-T Recommendations and other references contain provisions which, through
reference in this text, constitute provisions of this Recommendation. At the time of publication, the
editions indicated were valid. All Recommendations and other references are subject to revision;
users of this Recommendation are therefore encouraged to investigate the possibility of applying the
most recent edition of the Recommendations and other references listed below. A list of the
currently valid ITU-T Recommendations is regularly published. The reference to a document within
this Recommendation does not give it, as a stand-alone document, the status of a Recommendation.
ITU-T Recommendation G.652 (2003), Characteristics of a single-mode optical fibre
cable.
ITU-T Recommendation G.653 (2003), Characteristics of a dispersion-shifted single-mode
optical fibre cable.
ITU-T Recommendation G.655 (2003), Characteristics of a non-zero dispersion-shifted
single-mode optical fibre cable.
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4 Abbreviations
This Recommendation uses the following abbreviations:
0xYY YY is a value in hexadecimal presentation
16FS 16 columns with Fixed Stuff
3R Reamplification, Reshaping and Retiming
ACT Activation (in the TCM ACT byte)
AI Adapted Information
AIS Alarm Indication Signal
AMP Asynchronous Mapping Procedure
APS Automatic Protection Switching
BDI Backward Defect Indication
BDI-O Backward Defect Indication Overhead
BDI-P Backward Defect Indication Payload
BEI Backward Error Indication
BI Backward Indication
BIAE Backward Incoming Alignment Error
BIP Bit Interleaved Parity
BMP Bit-synchronous Mapping Procedure
Cm number of m-bit client data entities
Cn number of n-bit client data entities
CnD difference between Cn and (m/n x Cm)
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JC Justification Control
JOH Justification Overhead
LCAS Link Capacity Adjustment Scheme
LF Local Fault
LLM Logical Lane Marker
LSB Least Significant Bit
MFAS MultiFrame Alignment Signal
MFI Multiframe Indicator
MS Maintenance Signal
MSB Most Significant Bit
MSI Multiplex Structure Identifier
MST Member Status
naOH non-associated overhead
NNI Network Node Interface
NORM Normal Operating Mode
OCC Optical Channel Carrier
OCCo Optical Channel Carrier – overhead
OCCp Optical Channel Carrier – payload
OCCr Optical Channel Carrier with reduced functionality
OCG Optical Carrier Group
OCGr Optical Carrier Group with reduced functionality
OCh Optical channel with full functionality
OChr Optical channel with reduced functionality
OCI Open Connection Indication
ODTUG Optical channel Data Tributary Unit Group
ODTUjk Optical channel Data Tributary Unit j into k
ODTUk.ts Optical channel Data Tributary Unit k with ts tributary slots
ODU Optical Channel Data Unit
ODUk Optical Channel Data Unit-k
ODUk-Xv X virtually concatenated ODUks
ODUkP Optical Channel Data Unit-k Path Monitoring level
ODUkT Optical Channel Data Unit-k Tandem Connection Monitoring level
OH Overhead
OMFI OPU Multi-Frame Identifier
OMS Optical Multiplex Section
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PT Payload Type
RES Reserved for future international standardization
RF Remote Fault
RS Reed-Solomon
RS-Ack Re-sequence acknowledge
SAPI Source Access Point Identifier
Sk Sink
SM Section Monitoring
SMOH Section Monitoring OverHead
So Source
SNC Subnetwork connection
SNC/I Subnetwork connection protection with inherent monitoring
SNC/N Subnetwork connection protection with non-intrusive monitoring
SNC/S Subnetwork connection protection with sublayer monitoring
SQ Sequence Indicator
TC Tandem Connection
TC-CMEP Tandem Connection-Connection Monitoring End Point
TCM Tandem Connection Monitoring
TCMOH Tandem Connection Monitoring OverHead
TS Tributary Slot
TSOH Tributary Slot Overhead
TTT Timing Transparent Transcoding
TxTI Transmitted Trace Identifier
UNI User-to-Network Interface
VCG Virtual Concatenation Group
VCOH Virtual Concatenation Overhead
vcPT virtual concatenated Payload Type
5 Conventions
The functional architecture of the optical transport network as specified in ITU-T Rec. G.872 is
used to derive the ONNI. The ONNI is specified in terms of the adapted and characteristic
information present in each layer as described in ITU-T Rec. G.805.
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Transmission order: The order of transmission of information in all the diagrams in this
Recommendation is first from left to right and then from top to bottom. Within each byte the most
significant bit is transmitted first. The most significant bit (bit 1) is illustrated at the left in all the
diagrams.
Value of reserved bit(s): The value of an overhead bit, which is reserved or reserved for future
international standardization shall be set to "0".
Value of non-sourced bit(s): Unless stated otherwise, any non-sourced bits shall be set to "0".
OTUk, ODUk and OPUk overhead assignment: The assignment of overhead in the optical
channel transport/data/payload unit signal to each part is defined in Figure 5-1.
Column #
1 7 8 14 15 16
overhead area
specific
2
Row #
OPU
3 ODU specific overhead area
4
G.709/Y.1331_F5-1
LO OPUk
substructure
ODUkP
LO ODUk
OCh
ODUkT
HO OPUk
OTUkV OTUk OTUkV OTUk OTUk
ODUkP
HO ODUk
ODUkT OCh OChr
OMSn OPSMnk
OPSn OTM-n.m OTM-0.m, OTM-0.mvn
OTSn OTM-nr.m
Full Reduced Multi Lane,
functionality functionality Reduced
OTM interface OTM interface functionality
OTM-0.m, OTM interface
OTM-n.m OTM-0.mvn
OTM-nr.m
Full Reduced Multi Lane,
functionality functionality Reduced
OTM interface OTM interface functionality
OTM interface
Client
OPUk
OPUk OPUk payload
OH
ODUk
ODUk path OPUk
PMOH
ODUk
ODUk TC L1 TCMOH 1 to 6 levels
of ODUk
ODUk tandem
ODUk tandem connection ODUk TC Lm connection
TCMOH
ODUk monitoring
TCMOH
OCh
OCh OCh payload
OH
OCCo
OCCo
OCCo
OCCo
OCCo
OMSn
OMU-n.m OMSn payload
OH
OTSn
OTM-n.m OTSn payload
OH G.709/Y.1331_F6-2
OOS
Client
OPUk
OPUk OH
OPUk payload
ODUk
ODUk path OPUk
PMOH
ODUk
ODUk TC L1 TCMOH 1 to 6 levels
of ODUk
ODUk tandem
ODUk tandem connection TCMOH
ODUk TC Lm connection
ODUk monitoring
TCMOH
OTM-0.m OPS0
G.709/Y.1331_F6-3
Client
OPUk
OPUk OPUk payload
OH
ODUk
ODUk path OPUk
PMOH
ODUk
ODUk TC L1 1 to 6 levels
TCMOH
of ODUk
ODUk tandem
ODUk tandem connection ODUk TC Lm connection
TCMOH
ODUk monitoring
TCMOH
OTM-nr.m OPSn
G.709/Y.1331_F6-4
Client
OPUk
OPUk OH
OPUk Payload
ODUk
ODUk Path PMOH OPUk
ODUk
ODUk TC L1 TCMOH
1 to 6 levels
of ODUk
ODUk Tandem ODUk Tandem
TCMOH ODUk TC Lm Connection
Connection Monitoring
ODUk
TCMOH
OTUk OTUk
OTUk FEC
Section OH
OTM-0.mvn OPSMnk
ODUkP/CL
LO OPUk ODUkP_AI
CMEP
ODUkP
Path
ODUkT/ODUk ODUkT/ODUk
Connection
Tandem
CMEP
ODUkT ODUkT
LO ODUk ODUk_CI
LO ODUk ODUk_CI
ODU
LO ODUk ODUk_CI
ODUkP/ODUj
HO OPUk ODUkP_AI
CMEP
Path
HO ODUk ODUk_CI
ODUkT/ODUk
Connection
Tandem
CMEP
ODUkT
OTUk/ODUk OTUkV/ODUk
OTUk OTUkV
Section
Optical
CMEP
OChr OCh
OCh OH
OChr_CI OCh_CI
OCh OCh OH
OCh_CI
OCh_CI_PLD OCh OH
OMS Network Layer
OTS/OMS OMS OH
OPS Network Layer
OTS_AI
OTLk.4 OTS OH
OPSM OPS OTS
OTS_CI_PLD
OTS_CI_OH
OOS
multiplexing layers may be present at a given OTN NNI. The interconnection of and visibility of
ODUk multiplexing layers within an equipment or domain is outside the scope of this
recommendation. Refer to Recommendation G.872 for further information on interconnection of
and multiplexing of ODUk layers within a domain.Figure 7-1A shows that a (non-OTN) client
signal is mapped into a lower order OPU, identified as “OPU (L)”. The OPU (L) signal is mapped
into the associated lower order ODU, identified as “ODU (L)”. The ODU (L) signal is either
mapped into the associated OTU[V] signal, or into an ODTU. The ODTU signal is multiplexed into
an ODTU Group (ODTUG). The ODTUG signal is mapped into a higher order OPU, identified as
“OPU (H)”. The OPU (H) signal is mapped into the associated higher order ODU, identified as
“ODU (H)”. The ODU (H) signal is mapped into the associated OTU[V].
The OPU (L) and OPU (H) are the same information structures, but with different client signals.
The concepts of lower order and high order ODU are specific to the role that ODU plays within a
single domain.
Figure 7-1B shows that an OTU[V] signal is mapped either into an Optical Channel signal,
identified as OCh and OChr, or into an OTLk.n. The OCh/OChr signal is mapped into an Optical
Channel Carrier, identified as OCC and OCCr. The OCC/OCCr signal is multiplexed into an OCC
Group, identified as OCG-n.m and OCG-nr.m. The OCG-n.m signal is mapped into an OMSn. The
OMSn signal is mapped into an OTSn. The OTSn signal is presented at the OTM-n.m interface.
The OCG-nr.m signal is mapped into an OPSn. The OPSn signal is presented at the OTM-nr.m
interface. A single OCCr signal is mapped into an OPS0. The OPS0 signal is presented at the OTM-
0.m interface. The OTLk.n signal is mapped into an Optical Transport Lane Carrier, identified as
OTLC. The OTLC signal is multiplexed into an OTLC Group, identified as OTLCG. The OTLCG
signal is mapped into an OPSMnk. The OPSMnk signal is presented at the OTM-0.mvn interface.
- 26 -
ODU4 x1 x1
ODU4 OPU4 Client Signal
x1 (L) (L)
OTU4[V] x 80
ODTU4.1 ODU0
x1 ODU4 x1 OPU4 x1 x 40
(H) (H) ODTU4.2 ODU1
ODU4
ODTUG4 x 10 ODU2
ODTU4.8
PT=21 ODU2e
x2
ODTU4.31 ODU3
x 80/ts
ODTU4.ts ODUflex
ODU3
to ODU (H) x 1/X Client Signal
OPU3-X
ODU3
x1 (L) x1 OPU3 Client Signal
OTU3[V] (L)
x1 x 16
ODU3 OPU3 x1 ODTU13 ODU1
(H) (H) x4 ODU2
ODTU23
ODU3
ODTUG3 x 32 ODU0
to ODU (H) ODTU3.1
PT=21
x1 x3 ODU2e
ODTU3.9
x 32/ts ODUflex
ODTU3.ts
x 16
ODTU13 ODU1
ODTUG3
PT=20 x4 ODU2
ODTU23
See Figure 7-1B
ODU2e
to ODU (H) x 1 OPU2e
ODU2e Client Signal
(L) (L)
ODU2
to ODU (H) x 1/X Client Signal
OPU2-X
ODU2
x1 (L) x1 OPU2 Client Signal
OTU2[V] (L)
x1 x4
ODU2 OPU2 x1 ODTU12 ODU1
(H) (H) ODTUG2 x8 ODU0
ODTU2.1
ODU2 PT=21
x 8/ts ODUflex
to ODU (H) ODTU2.ts
x1
ODTUG2 x4 ODU1
ODTU12
PT=20
ODU1
to ODU (H) x 1/X Client Signal
OPU1-X
ODU1
x1 (L) x1 OPU1 Client Signal
OTU1[V] (L)
x1
ODU1 OPU1 x 1 ODTUG1 x2
ODTU01 ODU0
(H) (H) PT=20
ODU1
to ODU (H)
x1 xn x1 x 1/n
OTM-0.mvn OPSMn4 OTLCG OTLC OTL4.n
x1 xn x1 x 1/n
OPSMn3 OTLCG OTLC OTL3.n
x1 x1 x1
OCCr OChr OTU4[V]
OTM-0.m OPS0
x1 x1
OCCr OChr
xl
xi
x1 x1 OTU3[V]
OCCr OChr
x1
OTM-nr.m OPSn OCG-nr.m xj
x1
OCC OCh
x1
OTU2[V]
x1
OCC OCh
x1
xl
1 i+j+k+l n
xi
x1
OTSn OMSn OCG-n.m
OTM-n.m
xj x1
OCC OCh
x1 OTU1[V]
x1 xk
OTS OH OMS OH x1
OCC OCh
x1
OCh OH
x1
OSC OTM Overhead Signal (OOS) COMMS OH
Multiplexing Mapping
The OTS, OMS, OCh and COMMS overhead is inserted into the OOS using mapping and
multiplexing techniques outside the scope of this Recommendation.
7.1 Mapping
The client signal or an Optical channel Data Tributary Unit Group (ODTUGk) is mapped into the
OPUk. The OPUk is mapped into an ODUk and the ODUk is mapped into an OTUk[V]. The
OTUk[V] is mapped into an OCh[r] and the OCh[r] is then modulated onto an OCC[r]. The OTUk
may also be mapped into n OTLk.n and an OTLk.n is then modulated onto an OTLC.
- 28 -
NOTE – The nominal ODUk rates are approximately: 2 498 775.126 kbit/s (ODU1), 10 037 273.924 kbit/s
(ODU2), 40 319 218.983 kbit/s (ODU3), 104 794 445.815 kbit/s (ODU4) and 10 399 525.316 kbit/s
(ODU2e).
NOTE – The nominal OTL rates are approximately: 10 754 603.390 kbit/s (OTL3.4) and 27 952 493.392
kbit/s (OTL4.4).
Table 7-6/G.709/Y.1331 HO OPUk multi-frame periods for 2.5G and 1.25G tributary slots
OPU type 1.25G tributary slot multi- 2.5G tributary slot multi-
frame period (Note) frame period (Note)
OPU1 97.942 μs -
OPU2 97.531 μs, 48.765 μs
OPU3 97.119 μs 48.560 μs
OPU4 93.416 μs -
NOTE – The period is an approximated value, rounded to 3 decimal places.
Table 7-9/G.709/Y.1331 –Number of tributary slots required for ODUj into HO OPUk
# 2.5G tributary # 1.25G tributary slots
slots
Figures 7-2, 7-3 and 7-4 show how various signals are multiplexed using the ODTUG1/2/3 (PT=20)
multiplexing elements. Figure 7-2 presents the multiplexing of four ODU1 signals into the OPU2
signal via the ODTUG2 (PT=20). An ODU1 signal is extended with frame alignment overhead and
asynchronously mapped into the Optical channel Data Tributary Unit 1 into 2 (ODTU12) using the
AMP justification overhead (JOH). The four ODTU12 signals are time-division multiplexed into
the Optical channel Data Tributary Unit Group 2 (ODTUG2) with Payload Type 20, after which
this signal is mapped into the OPU2.
ODU1
OH
ODU1 payload ODU1
ODTU12
JOH
ODU1 ODTU12
ODTU12 ODTU12
JOH JOH
ODU1 ODU1 ODTUG2
ODTUG2
OPU2
OH
OPU2 payload OPU2
ODU2
OH
ODU2 payload ODU2
G.709/Y.1331_F7-2
Figure 7-2/G.709/Y.1331 ODU1 into ODU2 multiplexing method via ODTUG2 (PT=20)
ODTUG3
Figure 7-3/G.709/Y.1331 ODU1 and ODU2 into ODU3 multiplexing method via ODTUG3
(PT=20)
- 34 -
Figure 7-3 presents the multiplexing of up to 16 ODU1 signals and/or up to 4 ODU2 signals into
the OPU3 signal via the ODTUG3 (PT=20). An ODU1 signal is extended with frame alignment
overhead and asynchronously mapped into the Optical channel Data Tributary Unit 1 into 3
(ODTU13) using the AMP justification overhead (JOH). An ODU2 signal is extended with frame
alignment overhead and asynchronously mapped into the Optical channel Data Tributary Unit 2 into
3 (ODTU23) using the AMP justification overhead (JOH). "x" ODTU23 (0 x 4) signals and
"16-4x" ODTU13 signals are time-division multiplexed into the Optical channel Data Tributary
Unit Group 3 (ODTUG3) with Payload Type 20, after which this signal is mapped into the OPU3.
Figure 7-4 presents the multiplexing of two ODU0 signals into the OPU1 signal via the ODTUG1
(PT=20). An ODU0 signal is extended with frame alignment overhead and asynchronously mapped
into the Optical channel Data Tributary Unit 0 into 1 (ODTU01) using the AMP justification
overhead (JOH). The two ODTU01 signals are time-division multiplexed into the Optical channel
Data Tributary Unit Group 1 (ODTUG1) with Payload Type 20, after which this signal is mapped
into the OPU1.
ODU0
OH
ODU0 Payload ODU0
ODTU01 ODTU01
JOH
ODU0
ODTUG1 (PT=20)
OPU1
OPU1 Payload OPU1
OH
ODU1
OH ODU1 Payload ODU1
Figure 7-4/G.709/Y.1331 ODU0 into ODU1 multiplexing method via ODTUG1 (PT=20)
Figures 7-5, 7-6 and 7-7 show how various signals are multiplexed using the ODTUG2/3/4 (PT=21)
multiplexing elements.
Figure 7-5 presents the multiplexing of up to eight ODU0 signals, and/or up to four ODU1 signals
and/or up to eight ODUflex signals into the OPU2 signal via the ODTUG2 (PT=21). An ODU1
signal is extended with frame alignment overhead and asynchronously mapped into the Optical
channel Data Tributary Unit 1 into 2 (ODTU12) using the AMP justification overhead (JOH). An
ODU0 signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 2.1 (ODTU2.1) using the GMP justification overhead. An
ODUflex signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 2.ts (ODTU2.ts) using the GMP justification overhead. Up to
eight ODTU2.1 signals, up to four ODTU12 signals and up to eight ODTU2.ts signals are
- 35 -
time-division multiplexed into the Optical channel Data Tributary Unit Group 2 (ODTUG2) with
Payload Type 21, after which this signal is mapped into the OPU2.
ODU ODU0 ODU1
OH
ODU Payload ODU OH
ODU0 Payload ODU0 OH
ODU1 Payload ODU1
ODTUG2 (PT=21)
OPU2
OPU2 Payload OPU2
OH
ODU2
OH ODU2 Payload ODU2
Figure 7-5/G.709/Y.1331 ODU0, ODU1 and ODUflex into ODU2 multiplexing method via
ODTUG2 (PT=21)
Figure 7-6 presents the multiplexing of up to thirty-two ODU0 signals and/or up to sixteen ODU1
signals and/or up to four ODU2 signals and/or up to three ODU2e signals and/or up to thirty-two
ODUflex signals into the OPU3 signal via the ODTUG3 (PT=21). An ODU1 signal is extended
with frame alignment overhead and asynchronously mapped into the Optical channel Data Tributary
Unit 1 into 3 (ODTU13) using the AMP justification overhead (JOH). An ODU2 signal is extended
with frame alignment overhead and asynchronously mapped into the Optical channel Data Tributary
Unit 2 into 3 (ODTU23) using the AMP justification overhead. An ODU0 signal is extended with
frame alignment overhead and asynchronously mapped into the Optical channel Data Tributary Unit
3.1 (ODTU3.1) using the GMP justification overhead. An ODU2e signal is extended with frame
alignment overhead and asynchronously mapped into the Optical channel Data Tributary Unit 3.9
(ODTU3.9) using the GMP justification overhead. An ODUflex signal is extended with frame
alignment overhead and asynchronously mapped into the Optical channel Data Tributary Unit 3.ts
(ODTU3.ts) using the GMP justification overhead. Up to thirty-two ODTU3.1 signals, up to sixteen
ODTU13 signals, up to four ODTU23 signals, up to three ODTU3.9 and up to thirty-two ODTU3.ts
signals are time-division multiplexed into the Optical channel Data Tributary Unit Group 3
(ODTUG3) with Payload Type 21, after which this signal is mapped into the OPU3.
- 36 -
ODTUG3 (PT=21)
OPU3
OPU3 Payload OPU3
OH
ODU3
OH ODU3 Payload ODU3
Figure 7-6/G.709/Y.1331 ODU0, ODU1, ODU2, and ODUflex into ODU3 multiplexing
method via ODTUG3 (PT=21)
Figure 7-7 presents the multiplexing of up to eighty ODU0 signals and/or up to forty ODU1 signals
and/or up to ten ODU2 signals and/or up to ten ODU2e signals and/or up to two ODU3 signals
and/or up to eighty ODUflex signals into the OPU4 signal via the ODTUG4 (PT=21). An ODU0
signal is extended with frame alignment overhead and asynchronously mapped into the Optical
channel Data Tributary Unit 4.1 (ODTU4.1) using the GMP justification overhead (JOH). An
ODU1 signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 4.2 (ODTU4.2) using the GMP justification overhead. An
ODU2 signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 4.8 (ODTU4.8) using the GMP justification overhead (JOH).
An ODU2e signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 4.8 (ODTU4.8) using the GMP justification overhead. An
ODU3 signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 4.31 (ODTU4.31) using the GMP justification overhead. An
ODUflex signal is extended with frame alignment overhead and asynchronously mapped into the
Optical channel Data Tributary Unit 4.ts (ODTU4.ts) using the GMP justification overhead (JOH).
Up to eighty ODTU4.1 signals, up to forty ODTU4.2 signals, up to ten ODTU4.8 signals, up to two
ODTU4.31 and up to eighty ODTU4.ts signals are time-division multiplexed into the Optical
channel Data Tributary Unit Group 4 (ODTUG4) with Payload Type 21, after which this signal is
mapped into the OPU4.
- 37 -
ODU
OH
ODU Payload ODU
ODTUG4 (PT=21)
OPU4
OPU4 Payload OPU4
OH
ODU4
OH
ODU4 Payload ODU4
Figure 7-7/G.709/Y.1331 ODU0, ODU1, ODU2, ODU2e, ODU3 and ODUflex into ODU4
multiplexing method via ODTUG4 (PT=21)
Details of the multiplexing method and mappings are given in clause 19.
An example illustrating the multiplexing of 2 ODU0 signals into an ODU1 and of 4 ODU1 signals
into an ODU2 is presented in Appendix III.
16/32r.m
OTM- X X X X X X
0.m
OTM- X X X X X
0.m
OTM- X X X X X
0.mvn
x1 x1 x1 x1
OTM-0.4 OCCr OChr OTU4[V] ODU4 OPU4
x1 x1 x1 x1
OTM-0.3 OCCr OChr OTU3[V] ODU3 OPU3
x1 x1 x1 x1
OTM-0.2 OCCr OChr OTU2]V] ODU2 OPU2
x1 x1 x1 x1
OTM-0.1 OCCr OChr OTU1[V] ODU1 OPU1
Mapping
Figure 8-1 shows the relationship between various information structure elements that are defined
below and illustrates possible mappings for the OTM-0.m.
An OSC is not present and there is no OOS either.
8.1.2 OTM-nr.m
8.1.2.1 OTM-16r.m
This OTM-16r.m supports 16 optical channels on a single optical span with 3R regeneration at each
end.
Several OTM-16r interface signals are defined. Some examples:
OTM-16r.1 (carrying i (i ≤ 16) OTU1[V] signals);
OTM-16r.2 (carrying j (j ≤ 16) OTU2[V] signals);
OTM-16r.3 (carrying k (k ≤ 16) OTU3[V] signals);
OTM-16r.4 (carrying l (l ≤ 16) OTU4[V] signals);
OTM-16r.1234 (carrying i (i ≤ 16) OTU1[V], j (j ≤ 16) OTU2[V], k (k ≤ 16) OTU3[V] and
l (l ≤ 16) OTU4[V] signals with i + j + k +l ≤ 16);
OTM-16r.123 (carrying i (i ≤ 16) OTU1[V], j (j ≤ 16) OTU2[V] and k (k ≤ 16) OTU3[V]
signals with i + j + k ≤ 16);
OTM-16r.12 (carrying i (i ≤ 16) OTU1[V] and j (j ≤ 16) OTU2[V] signals with i + j ≤ 16);
OTM-16r.23 (carrying j (j ≤ 16) OTU2[V] and k (k ≤ 16) OTU3[V] signals with
j + k ≤ 16),
OTM-16r.34 (carrying k (k ≤ 16) OTU3[V] and l (l ≤ 16) OTU4[V] signals with k + l ≤
16),
in generic terms identified as OTM-16r.m.
The OTM-16r.m signal is an OTM-nr.m signal (see Figure 6-56-6) with 16 optical channel carriers
(OCCr) numbered OCCr #0 to OCCr #15. An optical supervisory channel (OSC) is not present and
there is no OOS either.
At least one of the OCCrs is in service during normal operation and transporting an OTUk[V].
There is no predefined order in which the OCCrs are taken into service.
Some examples of the defined OTM-16r.m interface signals and the OTM-16r.m multiplexing
structure are shown in Figure 8-2.
NOTE – OTM-16r.m OPS overhead is not defined. The interface will use the OTUk[V] SMOH in this
multi-wavelength interface for supervision and management. OTM-16r.m connectivity (TIM) failure reports
will be computed from the individual OTUk[V] reports by means of failure correlation in fault management.
Refer to the equipment Recommendations for further details.
- 40 -
x1 xi x1 x1 x1 x1 Client
OTM-16r.1 OCG-16r.1 OCCr OChr OTU1[V] ODU1 OPU1
signal
1 i 16
xj x1 x1 x1 x1 Client
OTM-16r.2 x 1 OCG-16r.2 OCCr OChr OTU2[V] ODU2 OPU2
signal
1 j 16
x1 xk x1 x1 x1 x1 Client
OTM-16r.3 OCG-16r.3 OCCr OChr OTU3[V] ODU3 OPU3
signal
1 k 16
x1 xj x1 x1 x1 x1 Client
OTM-16r.12 OCG-16r.12 OCCr OChr OTU2[V] ODU2 OPU2
signal
1 i + j 16 x i
x1 x1 x1 x1 Client
OCCr OChr OTU1[V] ODU1 OPU1
signal
x1 x1 x1 x1 Client
OCCr OChr OTU3[V] ODU3 OPU3
signal
1 j + k 16 xk
xj x1 x1 x1 x1 Client
OTM-16r.23 x 1 OCG-16r.23 OCCr OChr OTU2[V] ODU2 OPU2
signal
x1 x1 x1 x1 Client
OCCr OChr OTU3[V] ODU3 OPU3
signal
xk
xj x1 x1 x1 x1 Client
OTM-16r.123 x 1 OCG-16r.123 OCCr OChr OTU2[V] ODU2 OPU2
signal
xi
1 i + j + k 16
x1 x1 x1 x1 Client
OCCr OChr OTU1[V] ODU1 OPU1
signal
G.709/Y.1331_F8-2
Multiplexing
Mapping
8.1.2.2 OTM-32r.m
This OTM-32r.m supports 32 optical channels on a single optical span with 3R regeneration at each
end.
- 41 -
x1
OTLC OTL3.4 x 1/4
x1 x 1/4
OTLC OTL3.4
x1 x1 x1
OTM-0.3v4 OTLCG x 1/4 OTU3 ODU3 OPU3
x1
OTLC OTL3.4
x1 x 1/4
OTLC OTL3.4
x1
OTLC OTL4.4 x 1/4
x1 x 1/4
OTLC OTL4.4
x1 x1 x1
OTM-0.4v4 OTLCG x 1/4 OTU4 ODU4 OPU4
x1
OTLC OTL4.4
x1 x 1/4
OTLC OTL4.4
Multiplexing Mapping
x1 xi x1 x1 Client
OTM-n.1 OCG-n.1 OCC OCh OTU1[V] x 1 ODU1
x1
OPU1
signal
1 i n
x1
OSC OOS OTS, OMS, OCh, COMMS OH
x1 xj x1 x1 Client
OTM-n.2 OCG-n.2 OCC OCh OTU2[V] x 1 ODU2
x1
OPU2 signal
1 j n
x1
OSC OOS OTS, OMS, OCh, COMMS OH
x1 xk x1 x1 Client
OTM-n.3 OCG-n.3 OCC OCh OTU3[V] x 1 ODU3 x1
OPU3 signal
1 k n
x1
OSC OOS OTS, OMS, OCh, COMMS OH
x1 xj x1 x1 x1 x1 Client
OTM-n.12 OCG-n.12 OCC OCh OTU2[V] ODU2 OPU2
signal
xi
x1 x1 x1 x1 Client
1 i + j n OCC OCh OTU1[V] ODU1 OPU1
signal
x1
OSC OOS OTS, OMS, OCh, COMMS OH
x1 x1 x1 x1 Client
OCC OCh OTU3[V] ODU3 OPU3 signal
1 j + k n xk
x1 xj x1 x1 x1 x1
OTM-n.23 OCG-n.23 OCC OCh OTU2[V] ODU2 OPU2 Client
signal
x1
OSC OOS OTS, OMS, OCh, COMMS OH
x1 x1 x1 x1 Client
OCC OCh OTU3[V] ODU3 OPU3
signal
xk
x1 xj x1 x1 x1 x1 Client
OTM-n.123 OCG-n.123 OCC OCh OTU2[V] ODU2 OPU2
signal
xi
1 i + j + k 16 x1 x1 x1 x1 Client
OCC OCh OTU1[V] ODU1 OPU1
signal
x1
OSC OOS OTS, OMS, OCh, COMMS OH
G.709/Y.1331_F8-3
Multiplexing
Mapping
9.1 OTM-0.m
Specifications for physical optical characteristics of the OTM-0.1, OTM-0.2 and OTM-0.3 signals
are contained in ITU-T Recs G.959.1 and G.693.
Specifications for physical optical characteristics of the OTM-0.4 are for further study.
9.2 OTM-nr.m
9.2.1 OTM-16r.m
Specifications for physical optical characteristics of the OTM-16r.1, OTM-16r.2 and OTM-16r.12
signals are contained in ITU-T Rec. G.959.1.
Specifications for physical optical characteristics of other OTM-16r.m are for further study.
9.2.2 OTM-32r.m
Specifications for physical optical characteristics of the OTM-32r.1, OTM-32r.2, and OTM-32r.12
signals are contained in ITU-T Rec. G.959.1.
Specifications for physical optical characteristics of other OTM-32r.m are for further study.
9.3 OTM-n.m
Specifications for physical optical characteristics of the OTM-n.m are vendor specific and outside
the scope of this Recommendation.
9.4 OTM-0.mvn
Specifications for physical optical characteristics of the OTM-0.3v4 and OTM-0.4v4 signals are
contained in ITU-T Rec. G.695 and ITU-T Rec. G.959.1 respectively.
OCh
OCh payload
overhead
OCh payload
1 3824
1
2
3
4
ODUk
The bit rates of the OTUk signals are defined in Table 7-1.
The OTUk (k=1,2,3,4) forward error correction (FEC) contains the Reed-Solomon RS(255,239)
FEC codes. Transmission of the OTUk FEC is mandatory for k=4 and optional for k=1,2,3. If no
FEC is transmitted, fixed stuff bytes (all-0s pattern) are to be used.
The RS(255,239) FEC code shall be computed as specified in Annex A.
For interworking of equipment supporting FEC, with equipment not supporting FEC (inserting
fixed stuff all-0s pattern in the OTUk (k=1,2,3) FEC area), the FEC supporting equipment shall
support the capability to disable the FEC decoding process (ignore the content of the OTUk
(k=1,2,3) FEC).
The transmission order of the bits in the OTUk frame is left to right, top to bottom, and MSB to
LSB (see Figure 11-2).
Column
4080
Row 1
1
2
3
4
MSB LSB G.709/Y.1331_F11-2
12345678
11.2 Scrambling
The OTUk signal must have sufficient bit timing content at the ONNI. A suitable bit pattern, which
prevents a long sequence of "1"s or "0"s, is provided by using a scrambler.
The operation of the scrambler shall be functionally identical to that of a frame synchronous
scrambler of sequence length 65535 operating at the OTUk rate.
The generating polynomial shall be 1 + x + x3 + x12 + x16. Figure 11-3 shows a functional diagram of
the frame synchronous scrambler.
Data in
D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q
S S S S S S S S S S S S S S S S
OTUk
clock
Scrambled
OTUk MSB of MFAS byte G.709/Y.1331_F11-3 data out
The scrambler shall be reset to "FFFF" (HEX) on the most significant bit of the byte following the
last framing byte in the OTUk frame, i.e., the MSB of the MFAS byte. This bit, and all subsequent
bits to be scrambled, shall be added modulo 2 to the output from the x16 position of the scrambler.
The scrambler shall run continuously throughout the complete OTUk frame. The framing bytes
(FAS) of the OTUk overhead shall not be scrambled.
- 47 -
Scrambling is performed after FEC computation and insertion into the OTUk signal.
2 OPUk area
ODUk overhead (4 3810 bytes)
3 area
4
G.709/Y.1331_F12-1
Area reserved for FA and OTUk overhead.
The ODU2 bit rate is 239/237 times 4 times the STM-16 bit rate.
The ODU3 bit rate is 239/236 times 16 times the STM-16 bit rate.
The ODU4 bit rate is 239/227 times 40 times the STM-16 bit rate.
ODU1, ODU2 and ODU3 signals which carry an STM-N (N = 16, 64, 256) signal may also be
generated using the timing of these client signals.
Refer to Table 7-2 for the nominal bit rates and bit rate tolerances.
12.2.2 ODU2e
An ODU2e signal is generated using the timing of its client signal.
The ODU2e bit rate is 239/237 times the 10GBASE-R client bit rate.
Refer to Table 7-2 for the nominal bit rate and bit rate tolerance.
12.2.3 ODUflex for CBR client signals
An ODUflex(CBR) signal is generated using the timing of its client signal.
The ODUflex bit rate is 239/238 times the CBR client bit rate.
The client signal may have a bit rate tolerance up to 100 ppm.
~ CBR client
up to 100 ppm
BMP
Client bit rate 239/238
OPUflex
ODUflex
(A)GMP
ODTUk.ts
HO OPUk
~ HO ODUk
20 ppm
OTUk
If the CBR client clock is present such ODUflex(PRBS) or ODUflex(NULL) signal may be
generated using the CBR client clock, otherwise the ODUflex(PRBS) or ODUflex(NULL) signal is
generated using a local clock.
12.2.5 ODUflex for GFP-F mapped packet client signals
ODUflex(GFP) signals are generated using a local clock. This clock may be the local HO ODUk (or
OTUk) clock, or an equipment internal clock of the signal over which the ODUflex is carried
through the equipment.
Any bit rate is possible for an ODUflex(GFP) signal, however it is suggested for maximum
efficiency that the ODUflex(GFP) will occupy a fixed number of ODTUk.ts payload bytes (in the
initial ODTUk.ts).
NOTE - Such ODUflex(GFP) may be transported through more than one HO ODUk path. The Cm value will
be fixed in the first HO ODUk path; it will not be fixed in the other HO ODUk paths.
This fixed number of bytes per ODTUk.ts is controlled by configuration of the value Cm (refer to
Annex D). The value of Cm should be selected such that the ODUflex signal can be transported over
“n” OPUk tributary slots under worst case conditions (i.e. maximum ODUflex bit rate and
minimum HO OPUk bit rates). The ODUflex signal may be transported over a series of HO ODUk
paths, the following are some example sequences: HO ODU2; HO ODU2 – ODU3; HO ODU2 –
ODU4; HO ODU2 – ODU3 – ODU4; HO ODU3; HO ODU3 – ODU4; HO ODU4.
The ODUflex(GFP) has a bit rate tolerance of 20 ppm. This tolerance requires that the maximum
value of Cm is 15230 for ODTU2.ts and ODTU3.ts, and 15198 for ODTU4.ts.
These Cm values are to be reduced when the ODUflex(GFP) signal is generated by e.g. a HO ODUk
clock while the signal has to be transported also over a HO ODUj (j<k). The reduction factors are
presented in Table 12-2. Note that these reduction factors are to be applied to the higher set of Cm
values as indicated in Table 12-2.
Packet client
GFP-F
OPUflex
ODUflex
Cm
(B)GMP
ODTUk.ts
HO OPUk
~
HO ODUk 20 ppm
OTUk
Figure 12-3/G.709/Y.1331 – ODUflex clock generation for GFP-F mapped packet client
signals
1
OPUk overhead
2
Row #
area
4
G.709/Y.1331_F13-1
15 Overhead description
An overview of OTS, OMS and OCh overhead is presented in Figure 15-1.
FDI-O
n
TTI FDI-P 3
2
1
BDI-O BDI-O FDI-O
PMI PMI
OCh
OCI
An overview of OTUk, ODUk and OPUk overhead is presented in Figures 15-2 and 15-3.
- 52 -
Column
Row 1 7 8 14 15 3824 3825 4080
1 FA OH OTUk OH
2 OTUk FEC
(4 256 bytes)
3
4
SM
1 2 3
BDI
IAE
SAPI BEI/BIAE RES
15
16
BDI Backward Defect Indication GCC General Communication Channel DAPI
BEI Backward Error Indication IAE Incoming Alignment Error
BIAE Backward Incoming Alignment Error MFAS MultiFrame Alignment Signal 31
32
BIP8 Bit Interleaved Parity – level 8 RES Reserved for future international
DAPI Destination Access Point Identifier standardization Operator
FA Frame Alignment SAPI Source Access Point Identifier specific
FAS Frame Alignment Signal SM Section Monitoring
TTI Trail Trace Identifier 63 G.709/Y.1331_F15-2
Figure 15-2/G.709/Y.1331 OTUk frame structure, frame alignment and OTUk overhead
- 53 -
Column
Row 1 14 1516 17 3824
1
Overhead
OPUk
2
O
OPUk Payload
D
U
(4 x 3808 bytes)
k
3
O
ve
rh
ea
4
d
Column #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
BDI
EXP: Experimental
SAPI BEI STAT
GCC: General Communication Channel 15 4 PSI
APS: Automatic Protection Switching coordination channel 16 1 2 3 4 5 6 7 8
PCC: Protection Communication Control channel
TCMi
DAPI
BDI
consists of portions dedicated to the end-to-end ODUk path and to six levels of tandem connection
monitoring. The ODUk path OH is terminated where the ODUk is assembled and disassembled.
The TC OH is added and terminated at the source and sink of the corresponding tandem
connections, respectively. The specific OH format and coding is defined in 15.6 and 15.8.
15.1.3 Optical channel transport unit overhead (OTUk OH)
OTUk OH information is part of the OTUk signal structure. It includes information for operational
functions to support the transport via one or more optical channel connections. The OTUk OH is
terminated where the OTUk signal is assembled and disassembled. The specific OH format and
coding is defined in 15.6 and 15.7.
The specific frame structure and coding for the non-standard OTUkV OH is outside the scope of
this Recommendation. Only the required basic functionality that has to be supported is defined
in 15.7.3.
15.1.4 Optical channel non-associated overhead (OCh OH)
OCh OH information is added to the OTUk to create an OCh. It includes information for
maintenance functions to support fault management. The OCh OH is terminated where the OCh
signal is assembled and disassembled.
The specific frame structure and coding for the OCh OH is outside the scope of this
Recommendation. Only the required basic functionality that has to be supported is defined in 15.5.
15.1.5 Optical multiplex section overhead (OMS OH)
OMS OH information is added to the OCG to create an OMU. It includes information for
maintenance and operational functions to support optical multiplex sections. The OMS OH is
terminated where the OMU is assembled and disassembled.
The specific frame structure and coding for the OMS OH is outside the scope of this
Recommendation. Only the required basic functionality that has to be supported is defined in 15.4.
15.1.6 Optical transmission section overhead (OTS OH)
OTS OH information is added to the information payload to create an OTM. It includes information
for maintenance and operational functions to support optical transmission sections. The OTS OH is
terminated where the OTM is assembled and disassembled.
The specific frame structure and coding for the OTS OH is outside the scope of this
Recommendation. Only the required basic functionality that has to be supported is defined in 15.3.
15.1.7 General management communications overhead (COMMS OH)
COMMS OH information is added to the information payload to create an OTM. It provides general
management communication between network elements. The specific frame structure and coding
for the COMMS OH is outside the scope of this Recommendation.
TTI[17] to TTI[31] contain the 15-character destination access point identifier (DAPI[1] to
DAPI[15]).
TTI[32] to TTI[63] are operator specific.
1 2 3 4 5 6 7 8
0 SAPI[0]
1 0 SAPI[1] Source
2 0 SAPI[2] access
point
identifier
15 0 SAPI[15]
16 DAPI[0]
17 0 DAPI[1] Destination
18 0 DAPI[2] access
point
identifier
31 0 DAPI[15]
32
Operator
specific
63
G.709/Y.1331_F15-4
according to ITU-T Rec. T.50 (International Reference Alphabet – 7-bit coded character set for
information exchange).
IS character # NS character #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CC ICC UAPC
CC ICC UAPC
CC ICC UAPC
CC ICC UAPC
CC ICC UAPC
CC ICC UAPC
The international segment field provides a three-character ISO 3166 geographic/political country
code (G/PCC). The country code shall be based on the three-character uppercase alphabetic
ISO 3166 country code (e.g., USA, FRA).
The national segment field consists of two subfields: the ITU carrier code (ICC) followed by a
unique access point code (UAPC).
The ITU Carrier Code is a code assigned to a network operator/service provider, maintained by the
ITU-T Telecommunication Standardization Bureau (TSB) as per ITU-T Rec. M.1400. This code
shall consist of 1-6 left-justified characters, alphabetic, or leading alphabetic with trailing numeric.
The unique access point code shall be a matter for the organization to which the country code and
ITU carrier code have been assigned, provided that uniqueness is guaranteed. This code shall
consist of 6-11 characters, with trailing NUL, completing the 12-character national segment.
OPUk overhead
2
Row #
3 ODUk overhead
4
G.709/Y.1331_F15-6
FAS OH Byte 1 FAS OH Byte 2 FAS OH Byte 3 FAS OH Byte 4 FAS OH Byte 5 FAS OH Byte 6
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
OA1 OA1 OA1 OA2 OA2 OA2
G.709/Y.1331_F15-7
A single multiframe alignment signal (MFAS) byte is defined in row 1, column 7 of the
OTUk/ODUk overhead for this purpose (see Figure 15-8). The value of the MFAS byte will be
incremented each OTUk/ODUk frame and provides as such a 256-frame multiframe.
MFAS OH Byte
1 2 3 4 5 6 7 8
.
.
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
MFAS sequence
0 0 0 0 0 0 1 1
0 0 0 0 0 1 0 0
.
.
.
.
1 1 1 1 1 1 1 0
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 G.709/Y.1331_F15-8
.
.
Individual OTUk/ODUk overhead signals may use this central multiframe to lock their 2-frame,
4-frame, 8-frame, 16-frame, 32-frame, etc., multiframes to the principal frame.
NOTE – The 80-frame HO OPU4 multiframe can not be supported. A dedicated 80-frame OPU4 Multi-
Frame Indicator (OMFI) is used instead.
2
Row #
3 ODUk overhead
4
G.709/Y.1331_F15-9
SM
1 2 3
TTI BIP-8
0 1 2 3 4 5 6 7 8
BDI
IAE
SAPI BEI/BIAE RES
15 G.709/Y.1331_F15-10
16
DAPI
31
32
Operator
specific
63
The OTUk BIP-8 is computed over the bits in the OPUk (columns 15 to 3824) area of
OTUk frame i, and inserted in the OTUk BIP-8 overhead location in OTUk frame i+2 (see
Figure 15-11).
1 BIP8 14 15 3824
1
Frame i
2
OPUk
3
4
BIP8
BIP8
1
Frame i+1
4
BIP8
1
Frame i+2
4 G.709/Y.1331_F15-11
Column #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
PM
1 2 3
TTI BIP-8
0 1 2 3 4 5 6 7 8
BDI
DAPI
PM&TCM
31
32
Operator
Specific 1 2 3 4 5 6 7 8
DMp
63
TCMi
1 2 3
TTIi BIP-8i
0 1 2 3 4 5 6 7 8
BDIi
SAPI BEIi/BIAEi STATi
15
16
DAPI
PM&TCM
31
32
Operator
Specific 1 2 3 4 5 6 7 8
DMt1
DMt2
DMt3
DMt4
DMt5
DMt6
63
1 14 15 3824
1
Frame i
2
OPUk
BIP8
4
BIP8
1
Frame i+1
2
BIP8
1
Frame i+2
2
BIP8
4 G.709/Y.1331_F15-15
This DMp signal is inserted by the DMp originating P-CMEP and sent to the far-end P-CMEP. This
far-end P-CMEP loops back the DMp signal towards the originating P-CMEP. The originating P-
CMEP measures the number of frame periods between the moment the DMp signal value is
inverted and the moment this inverted DMp signal value is received back from the far-end P-
CMEP. The receiver should apply a persistency check on the received DMp signal to be tolerant for
bit errors emulating the start of delay measurement indication. The additional frames that are used
for such persistency checking should not be added to the delay frame count. The looping P-CMEP
should loop back each received DMp bit within approximately 100 µs.
Refer to Recommendation G.798 for the specific path delay measurement process specifications.
NOTE 1 – Path delay measurements can be performed on-demand, to provide the momentary two-
way transfer delay status, and pro-active, to provide 15 minute and 24 hour two-way transfer delay
performance management snapshots.
NOTE 2 – Equipment designed according to the 2008 or earlier versions of this Recommendation may not be
capable of supporting this path delay monitoring. For such equipment, the DMp bit is a bit reserved for
future international standardisation and set to zero.
NOTE 3 – This process measures round trip delay. The one way delay may not be half of the round trip
delay in the case that the transmit and receive directions of the ODUk path are of unequal lengths (e.g. in
networks deploying uni-directional protection switching).
15.8.2.2 ODUk tandem connection monitoring (TCM) overhead
Six fields of ODUk tandem connection monitoring (TCM) overhead are defined in row 2,
columns 5 to 13 and row 3, columns 1 to 9 of the ODUk overhead and six additional bits of tandem
connection monitoring are defined in row 2, column 3, bits 1 to 6. TCM supports monitoring of
ODUk connections for one or more of the following network applications (refer to
ITU-T Recs G.805 and G.872):
optical UNI to UNI tandem connection monitoring; monitoring the ODUk connection
through the public transport network (from public network ingress network termination to
egress network termination);
optical NNI to NNI tandem connection monitoring; monitoring the ODUk connection
through the network of a network operator (from operator network ingress network
termination to egress network termination);
sublayer monitoring for linear 1+1, 1:1 and 1:n optical channel subnetwork connection
protection switching, to determine the signal fail and signal degrade conditions;
sublayer monitoring for optical channel shared protection ring (SPring) protection
switching, to determine the signal fail and signal degrade conditions;
monitoring an optical channel tandem connection for the purpose of detecting a signal fail
or signal degrade condition in a switched optical channel connection, to initiate automatic
restoration of the connection during fault and error conditions in the network;
monitoring an optical channel tandem connection for, e.g., fault localization or verification
of delivered quality of service.
The six TCM fields are numbered TCM1, TCM2, ..., TCM6.
Each TCM field contains the following subfields (see Figure 15-14):
trail trace identifier (TTI);
bit interleaved parity 8 (BIP-8);
backward defect indication (BDI);
- 68 -
A1 B1 C1 C2 B2 B3 B4 A2
C1-C2
B1-B2 B3-B4
A1-A2
A1 B1 C1 B2 C2 A2
C1-C2
B1-B2
A1-A2
1 14 15 3824
1
BIP8
Frame i
2
OPUk
3
4
BIP8
1
Frame i+1
BIP8
1
Frame i+2
BIP8
4 G.709/Y.1331_F15-18
NO2
NO1 NO3
User User
ODUk ODUk
path NO4 path
TCM overhead field
The DMti signal consists of a constant value (0 or 1) that is inverted at the beginning of a two-way
delay measurement test. The transition from 01 in the sequence …0000011111…, or the
transition from 10 in the sequence …1111100000… represents the path delay measurement start
point. The new value of the DMti signal is maintained until the start of the next delay measurement
test.
This DMti signal is inserted by the DMti originating TC-CMEP and sent to the far-end TC-CMEP.
This far-end TC-CMEP loops back the DMti signal towards the originating TC-CMEP. The
originating TC-CMEP measures the number of frame periods between the moment the DMti signal
value is inverted and the moment this inverted DMti signal value is received back from the far-end
TC-CMEP. The receiver should apply a persistency check on the received DMti signal to be
tolerant for bit errors emulating the start of delay measurement indication. The additional frames
that are used for such persistency checking should not be added to the delay frame count. The
looping TC-CMEP should loop back each received DMti bit within approximately 100 µs.
Refer to Recommendation G.798 for the specific tandem connection delay measurement process
specifications.
NOTE 1 – Tandem connection delay measurements can be performed on-demand, to provide the
momentary two-way transfer delay status, and pro-active, to provide 15 minute and 24 hour two-
way transfer delay performance management snapshots.
NOTE 2 – Equipment designed according to the 2008 or earlier versions of this Recommendation may not be
capable of supporting this tandem connection delay monitoring. For such equipment, the DMti bit is a bit
reserved for future international standardisation.
NOTE 3 – This process measures round trip delay. The one way delay may not be half of the round trip
delay in the case that the transmit and receive directions of the ODUk tandem connection are of unequal
lengths (e.g. in networks deploying uni-directional protection switching).
15.8.2.3 ODUk general communication channels (GCC1, GCC2)
Two fields of two bytes are allocated in the ODUk overhead to support two general
communications channels between any two network elements with access to the ODUk frame
structure (i.e., at 3R regeneration points). These are clear channels and any format specification is
outside of the scope of this Recommendation. The bytes for GCC1 are located in row 4, columns 1
and 2, and the bytes for GCC2 are located in bytes row 4, columns 3 and 4 of the ODUk overhead.
15.8.2.4 ODUk automatic protection switching and protection communication channel
(APS/PCC)
A four-byte ODUk-APS/PCC signal is defined in row 4, columns 5 to 8 of the ODUk overhead. Up
to eight levels of nested APS/PCC signals may be present in this field. The APS/PCC bytes in a
given frame are assigned to a dedicated connection monitoring level depending on the value of
MFAS as follows:
The forward and backward fields are further divided into three subfields as shown in Figure 15-21:
the forward/backward fault type indication field, the forward/backward operator identifier field, and
the forward/backward operator-specific field.
- 75 -
0 1 9 10 127
Operator identifier Operator-specific
field field
Fault
indication Forward
field
Fault
indication Backward
field
1111 1111
Byte allocation in
129 130 131 132 133 134 135 136 137
backward field
Byte allocation in
1 2 3 4 5 6 7 8 9
forward field
Country code National segment code
G/PCC ICC NUL padding
G/PCC ICC NUL padding
G/PCC ICC NUL padding
G/PCC ICC NUL padding
G/PCC ICC NUL
padding
G/PCC ICC
NUL
The international segment field provides a three-character ISO 3166 geographic/political country
code (G/PCC). The first three bytes of the 9-byte operator identifier field (i.e., bytes 1 through 3 for
the forward operator identifier field and bytes 129 through 131 for the backward operator identifier
field) are reserved for the international segment field. The country code shall be based on the
three-character uppercase alphabetic ISO 3166 country code (e.g., USA, FRA).
The national segment field provides a 1-6 character ITU carrier code (ICC). The ICC is maintained
by the ITU-T Telecommunication Standardization Bureau (TSB) as per ITU-T Rec. M.1400. The
national segment field is 6 bytes and provides a 1-6 character ITU carrier code (ICC) with trailing
null characters to complete the 6-character field.
15.8.2.5.3 Forward/backward operator-specific field
Bytes 10 through 127 are allocated for the forward operator-specific field as shown in Figure 15-21.
Bytes 138 through 255 are allocated for the backward operator-specific field. The operator-specific
fields are not subject to standardization.
15.8.2.6 ODUk experimental overhead (EXP)
Two bytes are allocated in the ODUk overhead for experimental use. These bytes are located in
row 3, columns 13 and 14 of the ODUk overhead.
The use of these bytes is not subject to standardization and outside the scope of this
Recommendation.
Experimental overhead is provided in the ODUk OH to allow a vendor and/or a network operator
within their own (sub)network to support an application, which requires additional ODUk overhead.
There is no requirement to forward the EXP overhead beyond the (sub)network; i.e., the operational
span of the EXP overhead is limited to the (sub)network with the vendor's equipment, or the
network of the operator.
15.8.2.7 ODUk reserved overhead (RES)
Eight bytes and one bit are reserved in the ODUk overhead for future international standardization.
These bytes are located in row 2, columns 1 to 2 and row 4, columns 9 to 14 of the ODUk overhead.
The bit is located in row 2, column 3, bit 8 of the ODUk overhead. These bytes and bit are set to all
ZEROs.
- 77 -
concatenation
ODUk overhead specific
3
4 PSI
0 PT
1
Mapping
& concatenation
specific
255
G.709/Y.1331_F15-23
NOTE 1 – There are 216 spare codes left for future international standardization. Refer to Annex A/G.806
for the procedure to obtain one of these codes for a new payload type.
NOTE 2 – These values are excluded from the set of available code points. These bit patterns are present
in ODUk maintenance signals.
NOTE 3 – Value "01" is only to be used for experimental activities in cases where a mapping code is not
defined in this table. Refer to Annex A/G.806 for more information on the use of this code.
NOTE 4 – These 16 code values will not be subject to further standardization. Refer to Annex A/G.806 for
more information on the use of these codes.
NOTE 5 – For the payload type of the virtual concatenated signal a dedicated payload type overhead
(vcPT) is used, see clause 18.
NOTE 6 – The former G.sup43 description of this mapping recommended using Payload Type 87.
NOTE 7 – Equipment supporting ODTUk.ts for OPU2 or OPU3 must be backward compatible with
equipment which supports only the ODTUjk. ODTUk.ts capable equipment transmitting PT=21 which
receives PT=20 from the far end shall revert to PT=20 and operate in ODTUjk only mode. Refer to G.798
for the specification.
16 Maintenance signals
An alarm indication signal (AIS) is a signal sent downstream as an indication that an upstream
defect has been detected. An AIS signal is generated in an adaptation sink function. An AIS signal
is detected in a trail termination sink function to suppress defects or failures that would otherwise be
detected as a consequence of the interruption of the transport of the original signal at an upstream
point.
A forward defect indication (FDI) is a signal sent downstream as an indication that an upstream
defect has been detected. An FDI signal is generated in an adaptation sink function. An FDI signal
is detected in a trail termination sink function to suppress defects or failures that would otherwise be
detected as a consequence of the interruption of the transport of the original signal at an upstream
point.
NOTE – AIS and FDI are similar signals. AIS is used as the term when the signal is in the digital domain.
FDI is used as the term when the signal is in the optical domain; FDI is transported as non-associated
overhead in the OTM overhead signal (OOS).
An open connection indication (OCI) is a signal sent downstream as an indication that upstream the
signal is not connected to a trail termination source. An OCI signal is generated in a connection
function and output by this connection function on each of its output connection points, which are
not connected to one of its input connection points. An OCI signal is detected in a trail termination
sink function.
A locked (LCK) is a signal sent downstream as an indication that upstream the connection is
"locked", and no signal is passed through.
- 80 -
A payload missing indication (PMI) is a signal sent downstream as an indication that upstream at
the source point of the signal, either none of the tributary slots have an optical signal or an optical
signal with no payload. This indicates that the transport of the optical tributary signal is interrupted.
A PMI signal is generated in the adaptation source function and it is detected in the trail termination
sink function which suppresses the LOS defect that arises under this condition.
Column #
1 14 15 3824 3825 4080
1
Row #
1 2 3 4 5 6 7
0xFF
OA1
OA1
OA1
OA2
OA2
OA2
Column #
1 4080
1 1:16 17:32 33:48 49:64 4065:4080
Row #
1 2 3 4 5 6
0xFF
OA1
OA1
OA1
OA2
OA2
Column #
1 4080
1 1:16 17:32 33:48 49:64 4065:4080
Row #
1 2 3 4 5 6 7
0xFF
OA1
OA1
OA1
OA2
OA2
OA2
Column #
1 4080
1 1:16 65:80 16247:16272
Row #
OTL3-AIS
1 2 3 4 5 6
0xFF
OA1
OA1
OA1
OA2
OA2
Column #
1 4080
1 1:16 16001:16016 305:320 16305:16320 289:304 16289:16304 273:288 16273:16288 257:272 16257:16272
Row #
2 241:256 16241:16256 225:240 16225:16240 209:224 16209:16224 193:208 16193:16208 177:192 16177:16192
3 161:176 16161:16176 145:160 redistributed
16145:16160 5%
129:144 of repeating
16129:16144 PN-11 sequence
113:128 16113:16128 97:112 16097:16112
4 81:96 16081:16096 65:80 16065:16080 49:64 16049:16064 33:48 16033:16048 17:32 16017:16032
OTL4-AIS
Column #
1 78 14 17 3824
1 FA OH OTUk OH
STAT
STAT
STAT
FTFL
2
Row #
All-1s pattern
STAT
STAT
STAT
STAT
3
4
G.709/Y.1331_F16-2
In addition, the ODUk-AIS signal may be extended with one or more levels of ODUk tandem
connection, GCC1, GCC2, EXP and/or APS/PCC overhead before it is presented at the OTM
interface. This is dependent on the functionality between the ODUk-AIS insertion point and the
OTM interface.
The presence of ODUk-AIS is detected by monitoring the ODUk STAT bits in the PM and TCMi
overhead fields.
16.5.2 ODUk open connection indication (ODUk-OCI)
ODUk-OCI is specified as a repeating "0110 0110" pattern in the entire ODUk signal, excluding the
frame alignment overhead (FA OH) and OTUk overhead (OTUk OH) (see Figure 16-3).
Column #
1 78 14 17 3824
1 FA OH OTUk OH
STAT
STAT
STAT
2
Row #
STAT
STAT
STAT
4
G.709/Y.1331_F16-3
NOTE – The repeating "0110 0110" pattern is the default pattern; other patterns are also allowed as long as
the STAT bits in the PM and TCMi overhead fields are set to "110".
In addition, the ODUk-OCI signal may be extended with one or more levels of ODUk tandem
connection, GCC1, GCC2, EXP and/or APS/PCC overhead before it is presented at the OTM
interface. This is dependent on the functionality between the ODUk-OCI insertion point and the
OTM interface.
The presence of ODUk-OCI is detected by monitoring the ODUk STAT bits in the PM and TCMi
overhead fields.
- 84 -
1 FA OH OTUk OH
STAT
STAT
STAT
2
Row #
STAT
STAT
STAT
4
G.709/Y.1331_F16-4
NOTE – The repeating "0101 0101" pattern is the default pattern; other patterns are also allowed as long as
the STAT bits in the PM and TCMi overhead fields are set to "101".
In addition, the ODUk-LCK signal may be extended with one or more additional levels of ODUk
tandem connection, GCC1, GCC2, EXP and/or APS/PCC overhead before it is presented at the
OTM interface. This is dependent on the functionality between the ODUk-LCK insertion point and
the OTM interface.
The presence of ODUk-LCK is detected by monitoring the ODUk STAT bits in the PM and TCMi
overhead fields.
DQ DQ DQ DQ D Q DQ DQ DQ DQ DQ DQ Generic-AIS
Clock
G.709/Y.1331_F16-5
- FC-1200 constant bit rate client signal after timing transparent transcoding (TTT) providing
a 50/51 rate compression into OPU2e using client/server specific byte-synchronous
mapping procedure
- constant bit rate client signals with bit rates up to 1.238 Gbit/s into OPU0 and up to 2.488
Gbit/s into OPU1 using a client agnostic generic mapping procedure (GMP) possibly
preceded by a timing transparent transcoding (TTT) of the client signal to reduce the bit
rate of the signal to fit the OPUk Payload bandwidth
- constant bit rate client signals with bit rates close to 2.5, 10.0, 40.1 or 104.3 Gbit/s into
OPU1, OPU2, OPU3 or OPU4 respectively using a client agnostic generic mapping
procedure (GMP) possibly preceded by a timing transparent transcoding (TTT) of the client
signal to reduce the bit rate of the signal to fit the OPUk Payload bandwidth
- other constant bit rate client signals into OPUflex using a client agnostic bit-synchronous
mapping procedure (BMP)
- asynchronous transfer mode (ATM)
- packet streams (e.g. Ethernet, MPLS, IP) which are encapsulated with the generic framing
procedure (GFP-F)
- test signals
- Continuous Mode GPON constant bit rate client signal into OPU1 using asynchronous
mapping procedure (AMP)
into OPUk.
17.1 Mapping of CBR2G5, CBR10G, CBR10G3 and CBR40G signals into OPUk
Mapping of a CBR2G5, CBR10G or CBR40G signal (with up to 20 ppm bit-rate tolerance) into an
OPUk (k = 1,2,3) may be performed according to the bit synchronous mapping procedure based on
one generic OPUk frame structure (see Figure 17-1). Mapping of a CBR2G5, CBR10G or CBR40G
signal (with up to 45 ppm bit-rate tolerance) into an OPUk (k = 1,2,3) may be performed
according to the asynchronous mapping procedure. Mapping of a CBR10G3 signal (with up to 100
ppm bit-rate tolerance) into an OPUk (k = 2e) is performed using bit synchronous mapping
procedure.
NOTE 1 – Examples of CBR2G5, CBR10G and CBR40G signals are STM-16 and CMGPON_D/U2 (refer
to ITU-T Rec. G.984.6), STM-64 and STM-256. An example of a CBR10G3 signal is 10GBASE-R.
NOTE 2 – The maximum bit-rate tolerance between OPUk and the client signal clock, which can be
accommodated by the asynchronous mapping scheme, is 65 ppm. With a bit-rate tolerance of 20 ppm for
the OPUk clock, the client signal's bit-rate tolerance can be 45 ppm.
NOTE 3 – For OPUk (k=1,2,3) the clock tolerance is 20 ppm. For OPU2e the clock tolerance is 100 ppm
and asynchronous mapping can not be supported with this justification overhead.
Column
Row 15 16 17 18 3824
1 RES JC
2 RES JC
3 RES JC
PSI 2
RES
JC Reserved JC
255
The OPUk overhead for these mappings consists of a payload structure identifier (PSI) including
the payload type (PT), a client signal fail (CSF) indicator and 254 bytes plus 7 bits reserved for
future international standardization (RES), three justification control (JC) bytes, one negative
justification opportunity (NJO) byte, and three bytes reserved for future international
standardization (RES). The JC bytes consist of two bits for justification control and six bits reserved
for future international standardization.
The OPUk payload for these mappings consists of 4 3808 bytes, including one positive
justification opportunity (PJO) byte.
The justification control (JC) signal, which is located in rows 1, 2 and 3 of column 16, bits 7 and 8,
is used to control the two justification opportunity bytes NJO and PJO that follow in row 4.
The asynchronous and bit synchronous mapping processes generate the JC, NJO and PJO according
to Tables 17-1 and 17-2, respectively. The demapping process interprets JC, NJO and PJO
- 87 -
according to Table 17-3. Majority vote (two out of three) shall be used to make the justification
decision in the demapping process to protect against an error in one of the three JC signals.
The value contained in NJO and PJO when they are used as justification bytes is all-0s. The receiver
is required to ignore the value contained in these bytes whenever they are used as justification
bytes.
During a signal fail condition of the incoming CBR2G5, CBR10G or CBR40G client signal (e.g., in
the case of a loss of input signal), this failed incoming signal is replaced by the generic-AIS signal
as specified in 16.6.1, and is then mapped into the OPUk.
During a signal fail condition of the incoming 10GBASE-R type CBR10G3 client signal (e.g., in
the case of a loss of input signal), this failed incoming 10GBASE-R signal is replaced by a stream
of 66B blocks, with each block carrying two Local Fault sequence ordered sets (as specified in
IEEE Std. 802.3). This replacement signal is then mapped into the OPU2e.
- 88 -
During signal fail condition of the incoming ODUk/OPUk signal (e.g., in the case of an ODUk-AIS,
ODUk-LCK, ODUk-OCI condition) the generic-AIS pattern as specified in 16.6.1 is generated as a
replacement signal for the lost CBR2G5, CBR10G or CBR40G signal.
During signal fail condition of the incoming ODU2e/OPU2e signal (e.g., in the case of an ODU2e-
AIS, ODU2e-LCK, ODU2e-OCI condition) a stream of 66B blocks, with each block carrying two
Local Fault sequence ordered sets (as specified in IEEE Std. 802.3) is generated as a replacement
signal for the lost 10GBASE-R signal.
NOTE 4 – Local Fault sequence ordered set is /K28.4/D0.0/D0.0/D1.0/. The 66B block contains the
following value SH=10 0x55 00 00 01 00 00 00 01.
NOTE 5 – Equipment developed prior to the 2008 version of this recommendation may generate a
different 10GBASE-R replacement signal (e.g. Generic-AIS) than the Local Fault sequence ordered
set.
Asynchronous mapping
The OPUk signal for the asynchronous mapping is created from a locally generated clock (within
the limits specified in Table 7-3), which is independent of the CBR2G5, CBR10G or CBR40G
(i.e., 4(k–1) × 2 488 320 kbit/s (k = 1,2,3)) client signal.
The CBR2G5, CBR10G, CBR40G (i.e., 4(k–1) × 2 488 320 kbit/s (k = 1,2,3)) signal is mapped into
the OPUk using a positive/negative/zero (pnz) justification scheme.
Bit synchronous mapping
The OPUk clock for the bit synchronous mapping is derived from the CBR2G5, CBR10G,
CBR40G or CBR10G3 client signal. During signal fail conditions of the incoming CBR2G5,
CBR10G, CBR40G or CBR10G3 signal (e.g., in the case of loss of input signal), the OPUk payload
signal bit rate shall be within the limits specified in Table 7-3 and neither a frequency nor frame
phase discontinuity shall be introduced. The resynchronization on the incoming CBR2G5,
CBR10G, CBR40G or CBR10G3 signal shall be done without introducing a frequency or frame
phase discontinuity.
The CBR2G5, CBR10G, CBR40G or CBR10G3 signal is mapped into the OPUk without using the
justification capability within the OPUk frame: NJO contains a justification byte, PJO contains a
data byte, and the JC signal is fixed to 00.
17.1.1 Mapping a CBR2G5 signal (e.g., STM-16, CMGPON_D/CMGPON_U2) into OPU1
Groups of 8 successive bits (not necessarily being a byte) of the CBR2G5 signal are mapped into a
Data (D) byte of the OPU1 (see Figure 17-2). Once per OPU1 frame, it is possible to perform either
a positive or a negative justification action.
Column #
3824
15
16
17
18
PSI RES RES RES
NJO JC JC JC
1 D D 3805D D
2 D D 3805D D
Row #
3 D D 3805D D
PJO
4 D 3805D D
G.709/Y.1331_F17-2
1904
1905
1920
1921
3824
15
16
17
PSI RES RES RES
1 16FS
1280
1281
2544
2545
2560
2561
3824
15
16
17
PSI RES RES RES
1 16FS 16FS
3 16FS 16FS
PJO
Column #
1904
1905
1920
1921
3824
15
16
17
PSI RES RES RES
118 16D 119 16D
NJO JC JC JC
1 16FS
4
G.709/Y.1331_F17-5
OPUk payload
OPUk
overhead 0 PT
ATM cell
1
PSI
RES
255
53 bytes
Figure 17-517-6/G.709/Y.1331 OPUk frame structure and mapping of ATM cells into OPUk
The ATM cell information field (48 bytes) shall be scrambled before mapping into the OPUk. In the
reverse operation, following termination of the OPUk signal, the ATM cell information field will be
descrambled before being passed to the ATM layer. A self-synchronizing scrambler with generator
polynomial x43 + 1 shall be used (as specified in ITU-T Rec. I.432.1). The scrambler operates for
the duration of the cell information field. During the 5-byte header the scrambler operation is
suspended and the scrambler state retained. The first cell transmitted on start-up will be corrupted
because the descrambler at the receiving end will not be synchronized to the transmitter scrambler.
- 91 -
Cell information field scrambling is required to provide security against false cell delineation and
cell information field replicating the OTUk and ODUk frame alignment signal.
When extracting the ATM cell stream from the OPUk payload area after the ODUk termination, the
ATM cells must be recovered. The ATM cell header contains a header error control (HEC) field,
which may be used in a similar way to a frame alignment word to achieve cell delineation. This
HEC method uses the correlation between the header bits to be protected by the HEC (32 bits) and
the control bit of the HEC (8 bits) introduced in the header after computation with a shortened
cyclic code with generating polynomial g(x) = x8 + x2 + x + 1.
The remainder from this polynomial is then added to the fixed pattern "01010101" in order to
improve the cell delineation performance. This method is similar to conventional frame alignment
recovery where the alignment signal is not fixed but varies from cell to cell.
More information on HEC cell delineation is given in ITU-T Rec. I.432.1.
The OPUk overhead for the ATM mapping consists of a payload structure identifier (PSI) including
the payload type (PT) and 255 bytes reserved for future international standardization (RES), and
seven bytes reserved for future international standardization (RES).
The OPUk payload for the ATM mapping consists of 4 3808 bytes.
4
G.709/Y.1331_F17-6
OPUk payload
OPUk
overhead 0 PT
GFP frame GFP idle frame
1
CSF
PSI 2
RES
4 4-65535 4
255 bytes bytes
Figure 17-617-7/G.709/Y.1331 OPUk frame structure and mapping of GFP frames into
OPUk
GFP frames arrive as a continuous bit stream with a capacity that is identical to the OPUk payload
area, due to the insertion of Idle frames at the GFP encapsulation stage. The GFP frame stream is
scrambled during encapsulation.
NOTE 1 – There is no rate adaptation or scrambling required at the mapping stage; this is performed by the
GFP encapsulation process.
- 92 -
The OPUk overhead for the GFP mapping consists of a payload structure identifier (PSI) including
the payload type (PT), a client signal fail (CSF) indicator and 254 bytes plus 7 bits reserved for
future international standardization (RES), and seven bytes reserved for future international
standardization (RES). The CSF indicator should be used only for Ethernet Private Line Type 1
services; for other packet clients the CSF bit is fixed to 0.
The OPUk payload for the GFP mapping consists of 4 × 3808 bytes.
NOTE 2 – The OPUflex(GFP) bit rate may be any configured bit rate as specified in Tables 7-3 and
7-8.
17.3.1 Mapping of GFP frames into Extended OPU2 payload area
The mapping of generic framing procedure (GFP) frames in an Extended OPU2 payload area is
performed by aligning the byte structure of every GFP frame with the byte structure of the Extended
OPU2 payload (see Figure 17-1117-8). Since the GFP frames are of variable length (the mapping
does not impose any restrictions on the maximum frame length), a frame may cross the OPU2
frame boundary.
15 16 17 3824
for payload data
OPU OH used
3
PSI
4
G.709/Y.1331_F17-6
Extended OPU2 payload
OPU2
overhead 0 PT GFP idle frame
GFP frame
1
CSF
PSI 2 RES
4 4-65535 4
255 bytes bytes
Figure 17-1117-8/G.709/Y.1331 OPU2 frame structure and mapping of GFP frames into
Extended OPU2 payload area
GFP frames arrive as a continuous bit stream with a capacity that is identical to the OPU2 payload
area, due to the insertion of GFP-Idle frames at the GFP encapsulation stage. The GFP frame stream
is scrambled during encapsulation.
NOTE – There is no rate adaptation or scrambling required at the mapping stage; this is performed by the
GFP encapsulation process.
The OPU2 overhead for the GFP mapping consists of a payload structure identifier (PSI) including
the payload type (PT), a client signal fail (CSF) indicator and 254 bytes plus 7 bits of reserved for
future international standardization (RES).
The Extended OPU2 payload for the GFP mapping consists of 4 × 3808 bytes from the OPU2
payload plus 7 bytes from the OPU2 overhead.
- 93 -
1 RES RES
2 RES RES
All-0s pattern
3 RES RES
4 PSI RES
255
Figure 17-717-9/G.709/Y.1331 OPUk frame structure and mapping of NULL client into
OPUk
The OPUk overhead for the NULL mapping consists of a payload structure identifier (PSI)
including the payload type (PT) and 255 bytes reserved for future international standardization
(RES), and seven bytes reserved for future international standardization (RES).
The OPUk payload for the NULL mapping consists of 4 × 3808 bytes.
17.4.2 Mapping of PRBS test signal into OPUk
For test purposes a 2 147 483 647-bit pseudo-random test sequence (231 1) as specified in
5.8/O.150 can be mapped into the OPUk payload. Groups of 8 successive bits of the
2 147 483 647-bit pseudo-random test sequence signal are mapped into 8 data bits (8D) (i.e., one
byte) of the OPUk payload (see Figure 17-817-10).
- 94 -
3824
RES RES 15
RES RES 16
8D 8D 17
8D 8D 18
3805 8D
8D
1
3805 8D
8D
2
RES
RES
3805 8D
8D
8D
8D
3
RES
PSI
3805 8D
8D
8D
8D
4
0 PT
1
PSI
RES
255
Figure 17-817-10/G.709/Y.1331 OPUk frame structure and mapping of 2 147 483 647-bit
pseudo-random test sequence into OPUk
The OPUk overhead for the PRBS mapping consists of a payload structure identifier (PSI)
including the payload type (PT) and 255 bytes reserved for future international standardization
(RES), and seven bytes reserved for future international standardization (RES).
The OPUk payload for the PRBS mapping consists of 4 3808 bytes.
Column
Row 15 16 17 18 3824
1 CS CS
2 CS CS
3 CS CS
4 PSI CS
255
The OPUk overhead for the mapping consists of a payload structure identifier (PSI) including the
payload type (PT) and 255 bytes reserved for future international standardization (RES), and seven
bytes for client-specific (CS) purposes. The definition of these CS overhead bytes is performed
within the encapsulation process specification.
The OPUk payload for this non-specific mapping consists of 4 3808 bytes.
17.5.1 Mapping bit stream with octet timing into OPUk
If octet timing is available, each octet of the incoming data stream will be mapped into a data byte
(octet) of the OPUk payload.
17.5.2 Mapping bit stream without octet timing into OPUk
If octet timing is not available, groups of 8 successive bits (not necessarily an octet) of the incoming
data stream will be mapped into a data byte (octet) of the OPUk payload.
17.6 Mapping of other constant bit-rate signals with justification into OPUk
Mapping of other CBR client signals (with up to 100 ppm bit-rate tolerance) into an OPUk (k = 0,
1, 2, 3, 4) is performed by the generic mapping procedure as specified in Annex D.
During a signal fail condition of the incoming CBR client signal (e.g., in the case of a loss of input
signal), this failed incoming signal is replaced by the appropriate replacement signal as defined in
the clauses hereafter.
During a signal fail condition of the incoming ODUk/OPUk signal (e.g., in the case of an ODUk-
AIS, ODUk-LCK, ODUk-OCI condition), the failed client signal is replaced by the appropriate
replacement signal as defined in the clauses hereafter.
The OPUk overhead for this mapping consists of a
- payload structure identifier (PSI) including the payload type (PT) as specified in Table 15-
8, the client signal fail (CSF) and 254 bytes plus 7 bits reserved for future international
standardization (RES),
- 96 -
- three justification control (JC1, JC2, JC3) bytes carrying the value of GMP overhead Cm,
- three justification control (JC4, JC5, JC6) bytes carrying the value of GMP overhead CnD
and
- one byte reserved for future international standardization (RES).
The JC1, JC2 and JC3 bytes consist of a 14-bit Cm field (bits C1, C2, .., C14), a 1-bit Increment
Indicator (II) field, a 1-bit Decrement Indicator (DI) field and an 8-bit CRC-8 field which contains
an error check code over the JC1, JC2 and JC3 fields.
The JC4, JC5 and JC6 bytes consist of a 10-bit CnD field (bits D1, D2, .., D10), a 5-bit CRC-5 field
which contains an error check code over the bits 4 to 8 in the JC4, JC5 and JC6 fields and nine bits
reserved for future international standardization (RES). The default value of n in CnD is 8. The
support for n=1 is client dependent and specified in the clauses hereafter when required.
17.6.1 Mapping a sub-1.238 Gbit/s CBR client signal into OPU0
Table 17-4A specifies the clients defined by this recommendation and their GMP cm and Cm with
m=8 (c8, C8) minimum, nominal and maximum parameter values. Table 17-4B specifies the GMP
cn and Cn with n=8 (c8, C8) or n=1 (c1, C1) for those clients. Table 17-5 specifies the replacement
signals for those clients.
The support for 1-bit timing information (C1) is client dependent. Clients for which the 8-bit timing
information in Cm with m=8 is sufficient will not deploy the ability to transport C1D and the
JC4/5/6 value will be fixed to all-0‟s.
The OPU0 payload for this mapping consists of 4 3808 bytes. The bytes in the OPU0 payload
area are numbered from 1 to 15232. The OPU0 payload byte numbering for GMP 1-byte (8-bit)
blocks is illustrated in Figure 17-1717-12. In row 1 of the OPU0 frame the first byte will be labelled
1, the next byte will be labelled 2, etc.
Groups of eight successive bits (not necessary being a byte) of the client signal are mapped into a
byte of the OPU0 payload area under control of the GMP data/stuff control mechanism. Each byte
in the OPU0 payload area may either carry 8 client bits, or carry 8 stuff bits. The stuff bits are set to
zero.
- 97 -
Column
Row 15 16 17 18 3824
0 PT JC1 C C C C C C C C 14-bit C8
1 2 3 4 5 6 7 8
1
PSI 2 JC2 C C C C C C I D
CSF
9 10 11 12 13 14 I I
JC3 CRC-8 Decrement Indicator
RES
Increment Indicator
255
1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES
D D D D D
JC4 1 2 3 4 5
client specific
D D D D D 10-bit C1D
JC5 6 7 8 9 10
JC6 CRC-5
NOTE – The Ethernet link fault indication is a stream of repeating /C1/C2/C1/C2/ … Ordered Sets,
where C1 = /K28.5/D21.5/D0.0/D0.0/ and C2 = /K28.5/D2.2/D0.0/D0.0/. This character stream is
then processed by the GFP-T mapper process in the same manner as if it were the received 8B/10B
data stream, mapping it into GFP-T superblocks for transmission.
17.6.2 Mapping a supra-1.238 to sub-2.488 Gbit/s CBR client signal into OPU1
Table 17-6A specifies the clients defined by this recommendation and their GMP cm and Cm with
m=16 (c16, C16) minimum, nominal and maximum parameter values. Table 17-6B specifies the
GMP cn and Cn with n=8 (c8, C8) or n=1 (c1, C1) for those clients. Table 17-7 specifies the
replacement signals for those clients.
The support for 8-bit timing information (C8D) in the OPU1 JC4/JC5/JC6 OH is required.
The support for 1-bit timing information (C1D) in the OPU1 JC4/JC5/JC6 OH is client dependent.
The OPU1 payload for this mapping consists of 4 3808 bytes. The groups of 2 bytes in the OPU1
payload area are numbered from 1 to 7616. The OPU1 payload byte numbering for GMP 2-byte
(16-bit) blocks is illustrated in Figure 17-1817-13. In row 1 of the OPU1 frame the first 2-bytes will
be labelled 1, the next 2-bytes will be labelled 2, etc.
Groups of sixteen successive bits of the client signal are mapped into a group of 2 successive bytes
of the OPU1 payload area under control of the GMP data/stuff control mechanism. Each group of 2
bytes in the OPU1 payload area may either carry 16 client bits, or carry 16 stuff bits. The stuff bits
are set to zero.
- 100 -
Column
Row 15 16 17 18 19 20 3823 3824
255 1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES D D D D D
JC4 1 2 3 4 5
D D D D D 10-bit CnD
JC5 6 7 8 9 10
JC6 CRC-5
Table 17-6A/G.709/Y.1331 –Cm (m=16) for supra-1.238 to sub-2.488G clients into OPU1
Client Nominal bit Bit rate Floor Minimum Nominal Maximum Ceiling
signal rate (kbit/s) tolerance C16,min c16 c16 c16 C16,max
(ppm)
FC-200 2 125 000 100 6503 6503.206 6503.987 6504.767 6505
17.6.3 Mapping CBR client signals with bit rates close to 9.995G into OPU2
Table 17-8A specifies the clients defined by this recommendation and their GMP cm and Cm with
m=64 (c64, C64) minimum, nominal and maximum parameter values. Table 17-8B specifies the
GMP cn and Cn with n=8 (c8, C8) or n=1 (c1, C1) for those clients. Table 17-9 specifies the
replacement signals for those clients.
NOTE – The bit rate range for those CBR client signals is given by following equation:
7 238 1 20 ppm 1 20 ppm
OPU2 payload bitrate(nom) CBR client bitrate T OPU2 payload bitrate(nom)
8
239 1 f ppm
1 f ppm
where f is bit-rate tolerance of CBR client and T is transcoding factor. T=16/15 for 8B10B encoded CBR
clients, T=1027/1024 for 64B/66B encoded CBR clients and T=1 for other clients. If f = ±100 ppm, the bit
rate range for CBR client signal is 8 708 228.746 to T9 994 077.649 kbit/s; for T=16/15: 10 660 349.492
kbi/ts, for T=1027/1024: 10 023 357.173 kbit/s.
The support for 8-bit timing information (C8D) in the OPU2 JC4/JC5/JC6 OH is required.
The support for 1-bit timing information (C1D) in the OPU2 JC4/JC5/JC6 OH is client dependent.
The OPU2 payload for this mapping consists of 4 3808 bytes. The groups of 8 bytes in the OPU2
payload area are numbered from 1 to 1904. The OPU2 payload byte numbering for GMP 8-byte
(64-bit) blocks is illustrated in Figure 17-1917-14. In row 1 of the OPU2 frame the first 8-bytes will
be labelled 1, the next 8-bytes will be labelled 2, etc.
Groups of sixty-four successive bits of the client signal are mapped into a group of 8 successive
bytes of the OPU2 payload area under control of the GMP data/stuff control mechanism. Each
group of 8 bytes in the OPU2 payload area may either carry 64 client bits, or carry 64 stuff bits. The
stuff bits are set to zero.
- 102 -
Column
Row 15 16 17 24 25 32 3817 3824
255 1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES D D D D D
JC4
1 2 3 4 5
D D D D D 10-bit CnD
JC5
6 7 8 9 10
JC6 CRC-5
Figure 17-1917-14/G.709/Y.1331 OPU2 frame structure for the mapping of a CBR client
signal
Table 17-8A/G.709/Y.1331 – Cm (m=64) for CBR clients close to 9.995G into OPU2
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C64,min c64 c64 c64 C64,max
(ppm)
For
further
study
Table 17-8B/G.709/Y.1331 – Cn (n=8 or 1) for CBR clients close to 9.995G into OPU2
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C8,min c8 c8 c8 C8,max
(ppm)
For
further
study
- 103 -
17.6.4 Mapping CBR client signals with bit rates close to 40.149G into OPU3
Table 17-10A specifies the clients defined by this recommendation and their GMP cm and Cm with
m=256 (c256, C256) minimum, nominal and maximum parameter values. Table 17-10B specifies the
GMP cn and Cn with n=8 (c8, C8) or n=1 (c1, C1) for those clients. Table 17-11 specifies the
replacement signals for those clients.
NOTE – The bit rate range for those CBR client signals is given by following equation:
31 238 1 20 ppm 1 20 ppm
OPU3 payload bitrate(nom) CBR client bitrate T OPU3 payload bitrate(nom)
32 239 1 f ppm
1 f ppm
where f is the bit-rate tolerance of CBR client and T is transcoding factor. T=16/15 for 8B10B encoded
CBR clients, T=1027/1024 for 64B/66B encoded CBR clients and T=1 for other clients. If f = ±100 ppm,
the bit rate range for CBR client signal is 38 728 424.091 to T40 145 701.741 kbit/s; for T=16/15: 42 822
081.857 kbi/ts, for T=1027/1024: 40 263 316.101 kbit/s.
The support for 8-bit timing information (C8D) in the OPU3 JC4/JC5/JC6 OH is required.
The support for 1-bit timing information (C1D) in the OPU3 JC4/JC5/JC6 OH is client dependent.
The OPU3 payload for this mapping consists of 4 3808 bytes. The groups of 32 bytes in the
OPU3 payload area are numbered from 1 to 476. The OPU3 payload byte numbering for GMP 32-
byte (256-bit) blocks is illustrated in Figure 17-2017-15. In row 1 of the OPU3 frame the first 32-
bytes will be labelled 1, the next 32-bytes will be labelled 2, etc.
Groups of two hundred fifty six successive bits of the client signal are mapped into a group of 32
successive bytes of the OPU3 payload area under control of the GMP data/stuff control mechanism.
Each group of 32 bytes in the OPU3 payload area may either carry 256 client bits, or carry 256 stuff
bits. The stuff bits are set to zero.
- 104 -
Column
Row 15 16 17 48 49 80 3793 3824
255 1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES D D D D D
JC4
10-bit CnD
1 2 3 4 5
D D D D D
JC5 6 7 8 9 10
JC6 CRC-5
Figure 17-2017-15/G.709/Y.1331 OPU3 frame structure for the mapping of a CBR client
signal
Table 17-10A/G.709/Y.1331 –Cm (m=256) for CBR clients close to 40.149G into OPU3
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C256,min c256 c256 c256 C256,max
(ppm)
For
further
study
Table 17-10B/G.709/Y.1331 – Cn (n=8 or 1) for CBR clients close to 40.149G into OPU3
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C8,min c8 c8 c8 C8,max
(ppm)
For
further
study
- 105 -
17.6.5 Mapping CBR client signals with bit rates close to 104.134G into OPU4
Table 17-12A specifies the clients defined by this recommendation and their GMP cm and Cm with
m=640 (c640, C640) minimum, nominal and maximum parameter values. Table 17-12B specifies the
GMP cn and Cn with n=8 (c8, C8) or n=1 (c1, C1) for those clients. Table 17-13 specifies the
replacement signals for those clients.
NOTE – The bit rate range for those CBR client signals is given by following equation:
79 475 238 1 20 ppm 475 1 20 ppm
OPU4 payload bitrate(nom) CBR client bitrate T OPU4 payload bitrate(typ)
80 476 239 1 f ppm 476 1 f ppm
where f is the bit-rate tolerance of CBR client and T is transcoding factor. T=16/15 for 8B10B encoded
CBR clients, T=1027/1024 for 64B/66B encoded CBR clients and T=1 for other clients. If f = ±100 ppm,
the bit rate range for CBR client signal is 102 392 471.399 to T104 343 453.866 kbit/s; for T=16/15: 111
299 684.124 kbi/ts, for T=1027/1024: 104 649 147.578 kbit/s.
The support for 8-bit timing information (C8D) in the OPU4 JC4/JC5/JC6 OH is required.
The support for 1-bit timing information (C1D) in the OPU4 JC4/JC5/JC6 OH is client dependent.
The OPU4 payload for this mapping consists of 4 3800 bytes for client data and 4 8 bytes with
fixed stuff. The groups of 80 bytes in the OPU4 payload area are numbered from 1 to 190. The
OPU4 payload byte numbering for GMP 80-byte (640-bit) blocks is illustrated in Figure 17-2117-
16. In row 1 of the OPU4 frame the first 80-bytes will be labelled 1, the next 80-bytes will be
labelled 2, etc.
Groups of six hundred and forty successive bits of the client signal are mapped into a group of 80
successive bytes of the OPU4 payload area under control of the GMP data/stuff control mechanism.
Each group of 80 bytes in the OPU4 payload area may either carry 640 client bits, or carry 640 stuff
bits. The stuff bits are set to zero.
- 106 -
Column
3817
3824
Row 15 16 17 56 57 96 97 3776 3816
1 JC4 JC1 1 1 1 1 2 48 48
2 JC5 JC2 48 48 49 49 49 95 95
Fixed
Stuff
3 JC6 JC3 96 96 96 96 97 143 143
OPU4 OH OPU4 payload used for CBR client (4 3800 bytes) OPU4 Fixed
1 2 3 4 5 6 7 8 Stuff
(4 x 8 bytes)
JC1 C C C C C C C C 14-bit C640
0 PT 1 2 3 4 5 6 7 8
1 JC2 C C C C C C I D
9 10 11 12 13 14 I I
PSI 2
CSF
255 1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES D D D D D
JC4
1 2 3 4 5
D D D D D 10-bit CnD
JC5
6 7 8 9 10
JC6 CRC-5
Figure 17-2117-16/G.709/Y.1331 OPU4 frame structure for the mapping of a CBR client
signal
Table 17-12A/G.709/Y.1331 – Cm (m=640) for CBR clients close to 104.134G into OPU4
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C640,min c640 c640 c640 C640,max
(ppm)
For
further
study
Table 17-12B/G.709/Y.1331 – Cn (n=8 or 1) for CBR clients close to 104.134G into OPU4
Client Nominal bit rate Bit rate Floor Minimum Nominal Maximum Ceiling
signal (kbit/s) tolerance C8,min c8 c8 c8 C8,max
(ppm)
For
further
study
- 107 -
17.7 Mapping a 1000BASE-X and FC-1200 signal via timing transparent transcoding into
OPUk
17.7.1 Mapping a 1000BASE-X signal into OPU0
Refer to 17.6.1 for the mapping of the transcoded 1000BASE-X signal and to 17.6.1.1 for the
transcoding of the 1000BASE-X signal.
17.7.2 Mapping a FC-1200 signal into OPU2e
The nominal line rate for FC-1200 is 10 518 750 kbit/s ± 100ppm, and must therefore be
compressed to a suitable rate to fit into an OPU2e.
The adaptation of the 64B/66B encoded FC-1200 client is done by transcoding a group of eight 66B
blocks into one 513B block (as described in annex B), assembling eight 513B blocks into one 516-
octet superblock and encapsulating seventeen 516-octet superblocks into a 8800 octet GFP frame as
illustrated in Figure 17-1617-18. The GFP frame consists of 2200 rows with 32 bits per row. The
first row contains the GFP Core Header, the second row the GFP Payload Header. The next four
rows contain 16 bytes reserved for future international standardization. The next seventeen times
129 rows contain the seventeen superblocks #1 to #17. The last row contains the GFP payload FCS.
The Flag (F) bit of 513B Block #i (I = 0..7) is carried in Flag #i bit located in the Superblock Flags
field. The remaining 512 bits of each of the eight 513B Blocks of a superblock are carried in 16
rows of the Superblock Data field; bits of 513B Block #0 in the first 16 rows of the superblock, bits
of 513B Block #1 in the next 16 rows, etc. Each 513B Block contains „j‟ (j = 0..8) control blocks
(CB1 to CBj) and „8-j‟ all-data Blocks (DB1..DB8-j) as specified in Annex B. Figure 17-1617-18
presents a 513B Block with three control blocks and five all-data blocks. A 513B Block may
contain zero to eight control blocks and a superblock may contain thus zero to sixty-four control
blocks.
NOTE – The GFP encapsulation stage does not generate GFP-Idle frames and therefore the
generated GFP stream is synchronous to the FC-1200 client stream. The adaptation process
performs a 50/51 rate compression, so the resulting GFP stream has a signal bit rate of 50/51
10.51875Gbit/s ± 100 ppm (i.e. 10 312 500 kbit/s ± 100ppm).
The stream of 8800 octet GFP frames is byte-synchronous mapped into the OPU2e payload by
aligning the byte structure of every GFP frame with the byte structure of the OPU2e payload (see
Figure 17-1517-17). Sixty-four fixed stuff (FS) bytes are added in columns 1905 to 1920 of the
OPU2e payload. All the GFP frames have the same length (8800 octets). The GFP frames are not
aligned with the OPU2e payload structure and may cross the boundary between two OPU2e frames.
- 108 -
During a signal fail condition of the incoming FC-1200 signal (e.g., in the case of a loss of input
signal), this failed incoming FC-1200 signal is replaced by a stream of 66B blocks, with each block
carrying two Local Fault sequence ordered sets as specified in INCITS 364. This replacement signal
is then applied at the transcoding process.
NOTE – Local Fault sequence ordered set is /K28.4/D0.0/D0.0/D1.0/. The 66B block contains the
following value SH=10 0x55 00 00 01 00 00 00 01.
During signal fail condition of the incoming ODU2e/OPU2e signal (e.g., in the case of an ODU2e-
AIS, ODU2e-LCK, ODU2e-OCI condition) a stream of 66B blocks, with each block carrying two
Local Fault sequence ordered sets as specified in INCITS 364 is generated as a replacement signal
for the lost FC-1200 signal.
Column #
1905
1921
3824
1904
1920
PSI RES RES RES 15
RES RES RES RES 16
17
2 16FS
GFP frame #i+1 GFP frame #i+1
3 16FS
OPU2e payload
OPU2e
Overhead 0 PT
GFP frame
1
PSI 2
CSF
RES
8800
255 bytes
Figure 17-1517-17/G.709/Y.1331 Mapping of transcoded FC-1200 into OPU2e
- 109 -
Transmission Order
1 2 3 4 5 6 7 8
Transmission Order
F ……………... 31 32
POS CB Type 1 2 3 4 5 6 7 8
C
1 PLI cHEC
PFI=1
CB1 PTI= UPI=0x15
2
000
EXI=0000
(transp 10GFC) tHEC
CB2
3
CB3
4 RES
DB1 5
6
(16 bytes)
DB2
Superblock #1 (516
7
DB3
……………...
DB4
Superblock Data (512 bytes)
bytes)
DB5
134
Superblock
Block #0 (512 bit) 135
Flags
CRC-24
Block #1 (512 bit) 136
Block #2 (512 bit) …. Superblock #2 (516 bytes)
264
Block #3 (512 bit) 265
Block #4 (512 bit) Superblock #3 (516 bytes)
….
393
Block #5 (512 bit)
…..….
...
Block #6 (512 bit)
Block #7 (512 bit) 2071
Superblock #17 (516 bytes)
….
2199
Flag 7
Flag 6
Flag 5
Flag 4
Flag 3
Flag 2
Flag 1
Flag 0
GFP framing is used to facilitate delineation of the superblock structure by the receiver. The leading
flag bits from each of the eight 513B blocks are relocated into a single octet at the end of the 513-
octet Superblock Data field (labelled “Superblock Flags”).
To minimize the risk of incorrect decoding due to errors in the 1 to 65 octets of “control”
information (Flags, FC, POS, CB_Type), a CRC-24 is calculated over the 65 octets within each
superblock that may contain such "control" information and appended to form a 516 octet
superblock. The 65 octets in the 516 octet superblock over which the CRC-24 is calculated are the
octets (1+8n) with n=0..64 (i.e. octets 1, 9, 17, .., 513). The generator polynomial for the CRC-24 is
G(x) = x24+ x21 + x20 + x17 + x15 + x11 + x9 + x8 + x6 + x5 + x + 1 with an all-ones initialization value,
where x24 corresponds to the MSB and x0 to the LSB. This superblock CRC is generated by the
source adaptation process using the following steps:
1) The 65 octets of “control” information (Flags, POS, CB_Type) are taken in network octet
order (see Figure 17-1617-18), most significant bit first, to form a 520-bit pattern
representing the coefficients of a polynomial M(x) of degree 519.
2) M(x) is multiplied by x24 and divided (modulo 2) by G(x), producing a remainder R(x) of
degree 23 or less.
3) The coefficients of R(x) are considered to be a 24-bit sequence, where x23 is the most
significant bit.
4) After inversion, this 24-bit sequence is the CRC-24
Exactly 17 of these 516-octet superblocks are prefixed with the standard GFP core and type headers
and 16 octets of “reserved” (padding). Because the number of 516-octet superblocks per GFP frame
is known a priori, it is possible for this mapping scheme to operate in a cut-through (as opposed to
store and forward) fashion, thus minimizing the mapping latency.
- 110 -
The payload FCS (a CRC-32) is appended to the end of each GFP frame and is calculated across the
Payload Information Field of the GFP frame per G.7041. The purpose of the payload FCS is to
provide visibility of bit errors occurring anywhere in the GFP Payload Information Field and thus
augments the coverage provided by the per-Superblock CRC-24 (which only provides coverage for
the “control” overhead in each superblock). The payload FCS is for purposes of statistics gathering
only.
All octets in the GFP Payload Area are scrambled using the X43 + 1 self synchronous scrambler,
again per G.7041.
Column
Row 15 16 17 3824
0 PT
1
PSI 2
CSF
RES
255
18 Concatenation
Concatenation in the OTN is realized by means of virtual concatenation of OPUk signals.
- 112 -
3823X+1
14X+1
14X+2
15X+1
3824X
15X
16X
2
OPUk-X payload
3
15 16 17 18 3824
1
VCOH
2
15 16 3824
1
OPUk-Xv
VCOH
2 OPUk#X
4 PSI
OPUk#1
Each OPUk in the OPUk-Xv is transported in an ODUk and the X ODUks form the ODUk-Xv.
Each ODUk of the ODUk-Xv is transported individually through the network. Due to different
propagation delay of the ODUks, a differential delay will occur between the individual ODUks and
thus OPUks. This differential delay has to be compensated and the individual OPUks have to be
realigned for access to the contiguous payload area.
18.1.2 OPUk-Xv OH description
18.1.2.1 OPUk-Xv OH location
The OPUk-Xv overhead consists of: X times a payload structure identifier (PSI) including the
payload type (PT) and client signal fail (CSF), X times virtual concatenation (VCOH) overhead
used for a virtual concatenation specific sequence and multiframe indication, and overhead (e.g.,
justification control and opportunity bits) associated with the mapping of client signals into the
OPUk payload as shown in Figure 18-1. The PSI and VCOH overhead is specific for each
individual OPUk of the OPUk-Xv, while the mapping specific overhead is related to the
concatenated signal
The OPUk-Xv VCOH consists of a 3-byte VCOH per OPUk. The VCOH bytes in each OPUk are
used as defined in Figure 18-2.
VCOH1 VCOH2 VCOH3
MFAS
Column # 45678 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
15 16 MFI1 0 1 2 3 4 5 6 7 CRC8
00000 0
VCOH
1 1
Mapping specific
2 Reserved CRC8
00010 2
VCOH
3 3
00011 3 Reserved CRC8
4 PSI
00100 4 SQ CRC8
RSA
GID
0 PT
1 vcPT
CSF
2 Member status
CRC8
(0-255)
Reserved
RES
255
11111 31 CRC8
is defined to convey the signal fail status of the client signal mapped into an OPUk-Xv at the
ingress of the OTN to the egress of the OTN.
OPUk-Xv CSF is located in bit 1 of the PSI[2] byte of the Payload Structure Identifier. Bits 2 to 8
of the PSI[2] byte are reserved for future international standardization. These bits are set to all
ZEROs.
OPUk-Xv CSF is set to "1" to indicate a client signal fail indication, otherwise it is set to "0".
NOTE – Equipment designed prior to this revision of the recommendation will generate a “0” in the OPUk-
Xv CSF and will ignore any value in OPUk CSF.
18.1.2.2.2 OPUk-Xv Virtual Concatenation Overhead (VCOH1/2/3)
Three bytes per individual OPUk of the OPUk-Xv are used to transport a 8 × 3 byte × 32 frame
structure for virtual concatenation specific overhead. These bytes are located in rows 1, 2 and 3 of
column 15 as shown in Figure 18-2.
The structure is aligned with the ODUk multiframe and locked to bits 4, 5, 6, 7 and 8 of the MFAS.
The structure is repeated 8 times in the 256-frame multiframe.
The structure is used to transport multiframe sequences and LCAS control overhead.
18.1.2.2.2.1 OPUk-Xv Virtual Concatenation MultiFrame Indicator (MFI1, MFI2)
A two-stage multiframe is introduced to cover differential delay measurement (between the member
signals within the virtual concatenated group) and compensation (of those differential delays) by the
realignment process within the receiver.
The first stage uses MFAS in the Frame Alignment overhead area for the 8-bit multiframe indicator.
MFAS is incremented every ODUk frame and counts from 0 to 255.
The second stage uses the MFI1 and MFI2 overhead bytes in the VCOH. They form a 16-bit
multiframe counter with the MSBs in MFI1 and the LSBs in MFI2.
MFI1 is located in VCOH1[0] and MFI2 in VCOH1[1].
The multiframe counter of the second stage counts from 0 to 65535 and is incremented at the start
of each multiframe of the first stage (MFAS = 0).
The resulting overall multiframe (a combination of 1st multiframe and 2nd multiframe counter) is
16 777 216 ODUk frames long.
At the start of the OPUk-Xv the multiframe sequence of all individual OPUks of the OPUk-Xv is
identical.
The realignment process has to be able to compensate a differential delay of at least 125 µs.
18.1.2.2.2.2 OPUk-Xv Sequence Indicator (SQ)
The sequence indicator SQ identifies the sequence/order in which the individual OPUks of the
OPUk-Xv are combined to form the contiguous OPUk-X-PLD as shown in Figure 18-1.
The 8-bit sequence number SQ (which supports values of X up to 256) is transported in VCOH1[4].
Bit 1 of VCOH1[4] is the MSB, bit 8 is the LSB.
Each OPUk of an OPUk-Xv has a fixed unique sequence number in the range of 0 to (X–1). The
OPUk transporting the first time slot of the OPUk-Xv has the sequence number 0, the OPUk
transporting the second time slot has the sequence number 1 and so on up to the OPUk transporting
time slot X of the OPUk-Xv with the sequence number (X–1).
For applications requiring fixed bandwidth the sequence number is fixed assigned and not
- 116 -
configurable. This allows the constitution of the OPUk-Xv either to be checked without using the
trace, or to be transported via a number of ODUk signals which have their trail termination
functions being part of an ODUk trail termination function resource group.
Refer to ITU-T Rec. G.7042/Y.1305 for the use and operation.
18.1.2.2.2.3 OPUk-Xv LCAS Control Words (CTRL)
The LCAS control word (CTRL) is located in bits 1 to 4 of VCOH1[5]. Bit 1 of VCOH1[5] is the
MSB, bit 4 is the LSB.
Refer to ITU-T Rec. G.7042/Y.1305 for the LCAS control commands, their coding and operation.
18.1.2.2.2.4 OPUk-Xv LCAS Member Status Field (MST)
The LCA member status field (MST) reports the status of the individual OPUks of the OPUk-Xv.
One bit is used per OPUk to report the status from sink to source. VCOH2[0] to VCOH2[31] are
used as shown in Figure 18-2. Refer to ITU-T Rec. G.7042/Y.1305 for coding and operation.
The status of all members (256) is transferred in 1567 μs (k = 1), 390 μs (k = 2) and 97 μs (k = 3).
18.1.2.2.2.5 OPUk-Xv LCAS Group Identification (GID)
The LCAS Group Identification (GID) provides the receiver with a means of verifying that all the
arriving channels originated from one transmitter. Refer to ITU-T Rec. G.7042/Y.1305 for coding
and operation.
Bit 5 of VCOH1[5] is used for the GID.
18.1.2.2.2.6 OPUk-Xv LCAS Re-Sequence Acknowledge (RS-Ack)
Re-Sequence Acknowledge, an indication from sink to source that a re-sequence, a sequence
increase or a sequence decrease has been detected. Refer to ITU-T Rec. G.7042/Y.1305 for coding
and operation.
Bit 6 of VCOH1[5] is used for the RS-Ack.
18.1.2.2.2.7 OPUk-Xv LCAS Cyclic Redundancy Check (CRC)
An 8-bit CRC check for fast acceptance of VirtConc LCAS OH is provided. The CRC-8 is
calculated over VCOH1 and VCOH2 on a frame per frame basis and inserted into VCOH3. The
CRC_8 Polynomial is x8 + x3 + x2 + 1. Refer to ITU-T Rec. G.7042/Y.1305 for operation.
18.1.2.2.2.8 OPUk-Xv VCOH Reserved Overhead
The reserved VCOH is set to all-0s.
18.1.2.2.3 OPUk Mapping Specific Overhead
X times four bytes are reserved in the OPUk overhead for mapping specific overhead. These bytes
are located in columns 15X+1 to 16X.
The use of these bytes depends on the specific client signal mapping (defined in 18.2).
Column
14X+2
14X+3
15X+1
15X+2
15X+3
16X+1
16X+2
16X+3
3824X
14X+1
15X
16X
17X
Row
1 JC JC JC NJO PJO
VCOH
VCOH
VCOH
VCOH
2 JC JC JC NJO PJO
3 JC JC JC NJO PJO
4 PSI PSI PSI PSI JC JC JC NJO PJO
The OPUk-4v overhead for these mappings consists of a X (X = 4) times a Payload Structure
Identifier (PSI), which includes the Payload Type (PT) and virtual concatenation payload type
(vcPT), X times Virtual Concatenation Overhead (VCOH), three Justification Control (JC) bytes
and one Negative Justification Opportunity (NJO) byte per row. The JC bytes consist of two bits for
justification control and six bits reserved for future international standardization.
The OPUk-4v payload for these mappings consists of X (X = 4) times 4 × 3808 bytes, including one
Positive Justification Opportunity (PJO) byte per row.
The Justification Control (JC) signals, which are located in columns 15X+1 (61), 15X+2 (62) and
15X+3 (63) of each row, bits 7 and 8, are used to control the two justification opportunity fields
NJO and PJO that follow in column 16X (64) and 16X+1 (65) of each row.
The asynchronous and bit synchronous mapping processes generate the JC, NJO and PJO according
to Tables 17-1 and 17-2, respectively. The demapping process interprets JC, NJO and PJO
according to Table 17-3. Majority vote (two out of three) shall be used to make the justification
decision in the demapping process to protect against an error in one of the three JC signals.
The value contained in NJO and PJO when they are used as justification bytes is all-0s. The receiver
is required to ignore the value contained in these bytes whenever they are used as justification
bytes.
During a signal fail condition of the incoming CBR client signal (e.g., in the case of a loss of input
signal), this failed incoming signal is replaced by the generic-AIS signal as specified in 16.6.1, and
is then mapped into the OPUk-4v.
During signal fail condition of the incoming ODUk/OPUk-4v signal (e.g., in the case of an
ODUk-AIS, ODUk-LCK, ODUk-OCI condition) the generic-AIS pattern as specified in 16.6.1 is
generated as a replacement signal for the lost CBR signal.
- 118 -
Asynchronous mapping
The OPUk-4v signal for the asynchronous mapping is created from a locally generated clock
(within the limits specified in Table 7-3), which is independent of the CBR
(i.e., 4(k) × 2 488 320 kbit/s) client signal.
The CBR (i.e., 4(k) × 2 488 320 kbit/s) signal is mapped into the OPUk-4v using a
positive/negative/zero (pnz) justification scheme.
Bit synchronous mapping
The OPUk-4v clock for the bit synchronous mapping is derived from the CBR
(i.e., 4(k) × 2 488 320 kbit/s) client signal. During signal fail conditions of the incoming CBR signal
(e.g., in the case of loss of input signal), the OPUk-4v payload signal bit rate shall be within the
limits specified in Table 7-3 and neither a frequency nor frame phase discontinuity shall be
introduced. The resynchronization on the incoming CBR signal shall be done without introducing a
frequency or frame phase discontinuity.
The CBR (i.e., 4(k) × 2 488 320 kbit/s) signal is mapped into the OPUk-4v without using the
justification capability within the OPUk-Xv frame: NJO contains four justification bytes,
PJO contains four data bytes, and the JC signal is fixed to 00.
18.2.1.1 Mapping a CBR10G signal (e.g. STM-64) into OPU1-4v
Groups of 8 successive bits (not necessarily being a byte) of the CBR10G signal are mapped into a
Data (D) byte of the OPU1-4v (see Figure 18-4). Once per OPU1-4v row (and thus four times per
OPU1-4v frame), it is possible to perform either a positive or a negative justification action.
3824X
14X+1
14X+2
14X+3
15X+1
15X+2
15X+3
16X+1
16X+2
16X+3
15X
16X
17X
X=4
NJO NJO NJO NJO
PJO PJO PJO PJO
4 × 3808D – 1
JC JC JC JC
JC JC JC JC
JC JC JC JC
1
VCOH
VCOH
VCOH
VCOH
2 4 × 3808D – 1
3 4 × 3808D – 1
PSI
PSI
PSI
PSI
4 4 × 3808D – 1
1920X + 1
1904X+1
1904X
1920X
•••••••••••••••••••••••••••• •••••• •••••••••••••••••••••••••••••••••••••••
14X+1
14X+2
14X+3
15X+1
15X+2
15X+3
16X+1
16X+2
16X+3
15X
16X
17X
3824X
NJO NJO NJO NJO
PJO PJO PJO PJO
JC JC JC JC 4 118 16D – 1 4 119 16D
JC JC JC JC
JC JC JC JC
1 4 × 16FS
VCOH
VCOH
VCOH
VCOH
JC JC 2871X+13
15X+1
3824X
15X
Row
NJO NJO
NJO NJO
NJO NJO
NJO NJO
JC JC
JC JC
JC JC
JC JC
JC JC
JC JC
JC JC
JC JC
JC JC
1
VCOH
VCOH
2
4 X 3808/4 4 X 3808/4 4 X 3808/4 4 X 3808/4
bytes bytes bytes bytes
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
3
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
PSI
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
4 PSI
X = 16
0 PT (06) G.709/Y.1331_F18-6
1 vcPT 1 2 3 4 5 6 7 8
PSI OPUk-16v OH OPUk-16v payload (4 X 3808 bytes)
JC Reserved JC
RES
255
Figure 18-6/G.709/Y.1331 – OPUk-16v frame structure for the mapping of a CBR signal
The OPUk-16v overhead for these mappings consists of a X (X = 16) times a Payload Structure
Identifier (PSI), which includes the Payload Type (PT) and virtual concatenation payload type
(vcPT), X times Virtual Concatenation Overhead (VCOH), 4 × 3 Justification Control (JC) bytes
and 4 × 1 Negative Justification Opportunity (NJO) bytes per row. The JC bytes consist of two bits
for justification control and six bits reserved for future international standardization.
The OPUk-16v payload for these mappings consists of 4 blocks of 4 × 15232 bytes, including 4 × 1
Positive Justification Opportunity (PJO) bytes per row.
The Justification Control (JC) signals, which are located in the locations indicated in Figure 18-3,
bits 7 and 8, are used to control the two justification opportunity fields NJO and PJO that follow in
the next two columns of each row.
- 120 -
The asynchronous and bit synchronous mapping processes generate the JC, NJO and PJO according
to Tables 17-1 and 17-2, respectively. The demapping process interprets JC, NJO and PJO
according to Table 17-3. Majority vote (two out of three) shall be used to make the justification
decision in the demapping process to protect against an error in one of the three JC signals.
The value contained in NJO and PJO when they are used as justification bytes is all-0s. The receiver
is required to ignore the value contained in these bytes whenever they are used as justification
bytes.
During a signal fail condition of the incoming CBR client signal (e.g., in the case of a loss of input
signal), this failed incoming signal is replaced by the generic-AIS signal as specified in 16.6.1, and
is then mapped into the OPUk-16v.
During signal fail condition of the incoming ODUk/OPUk-16v signal (e.g., in the case of an
ODUk-AIS, ODUk-LCK, ODUk-OCI condition) the generic-AIS pattern as specified in 16.6.1 is
generated as a replacement signal for the lost CBR signal.
Asynchronous mapping
The OPUk-16v signal for the asynchronous mapping is created from a locally generated clock
(within the limits specified in Table 7-3), which is independent of the CBR
(i.e., 4(k+1) × 2 488 320 kbit/s) client signal.
The CBR (i.e., 4(k+1) × 2 488 320 kbit/s) signal is mapped into the OPUk-16v using a
positive/negative/zero (pnz) justification scheme.
Bit synchronous mapping
The OPUk-16v clock for the bit synchronous mapping is derived from the CBR client signal.
During signal fail conditions of the incoming CBR signal (e.g., in the case of loss of input signal),
the OPUk-16v payload signal bit rate shall be within the limits specified in Table 7-3 and neither a
frequency nor frame phase discontinuity shall be introduced. The resynchronization on the
incoming CBR signal shall be done without introducing a frequency or frame phase discontinuity.
The CBR (i.e., 4(k+1) × 2 488 320 kbit/s) signal is mapped into the OPUk-16v without using the
justification capability within the OPUk-16v frame: NJO contains four justification bytes, PJO
contains four data bytes, and the JC signal is fixed to 00.
18.2.2.1 Mapping a CBR40G signal (e.g., STM-256) into OPU1-16v
Groups of 8 successive bits (not necessarily being a byte) of the CBR40G signal are mapped into a
Data (D) byte of the OPU1-16v (see Figure 18-7). Four times per OPU1-16v row (and thus sixteen
times per OPU1-16v frame), it is possible to perform either a positive or a negative justification
action.
- 121 -
Column #
2871X+18
1919X+13
2871X+13
968X+9
1919X+9
967X+4
14X+1
15X+1
15X+5
15X
3824X
X = 16
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
15231D 15231D 15231D 15231D
VCOH
VCOH
2
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
15231D 15231D 15231D 15231D
Row #
••••
3
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
15231D 15231D 15231D 15231D
4
NJO
NJO
NJO
NJO
PJO
PJO
PJO
PJO
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
JC
PSI PSI 15231D 15231D 15231D 15231D
16X+1
3824X
15X
1
VCOH
VCOH
3
PSI
PSI
OPUk-Xv payload
OPUk-Xv
overhead 0 PT (06)
ATM cell
1 vcPT
PSI
RES
255
53 bytes G.709/Y.1331_F18-8
The ATM cell information field (48 bytes) shall be scrambled before mapping into the OPUk-Xv.
In the reverse operation, following termination of the OPUk-Xv signal, the ATM cell information
field will be descrambled before being passed to the ATM layer. A self-synchronizing scrambler
with generator polynomial x43 + 1 shall be used (as specified in ITU-T Rec. I.432.1). The scrambler
- 122 -
operates for the duration of the cell information field. During the 5-byte header the scrambler
operation is suspended and the scrambler state retained. The first cell transmitted on start-up will be
corrupted because the descrambler at the receiving end will not be synchronized to the transmitter
scrambler. Cell information field scrambling is required to provide security against false cell
delineation and cell information field replicating the OTUk and ODUk frame alignment signal.
When extracting the ATM cell stream from the OPUk-Xv payload area after the ODUk
terminations, the ATM cells must be recovered. The ATM cell header contains a Header Error
Control (HEC) field, which may be used in a similar way to a frame alignment word to achieve cell
delineation. This HEC method uses the correlation between the header bits to be protected by the
HEC (32 bits) and the control bit of the HEC (8 bits) introduced in the header after computation
with a shortened cyclic code with generating polynomial g(x) = x8 + x2 + x + 1.
The remainder from this polynomial is then added to the fixed pattern "01010101" in order to
improve the cell delineation performance. This method is similar to conventional frame alignment
recovery where the alignment signal is not fixed but varies from cell to cell.
More information on HEC cell delineation is given in ITU-T Rec. I.432.1.
The OPUk-Xv overhead for the ATM mapping consists of X times a Payload Structure Identifier
(PSI), which includes the Payload Type (PT) and virtual concatenation payload type (vcPT),
X times three Virtual Concatenation Overhead (VCOH) bytes and X times four bytes reserved for
future international standardization (RES).
The OPUk-Xv payload for the ATM mapping consists of 4X × 3808 bytes.
18.2.4 Mapping of GFP frames into OPUk-Xv
The mapping of Generic Framing Procedure (GFP) frames is performed by aligning the byte
structure of every GFP frame with the byte structure of the OPUk-Xv payload (see Figure 18-9).
Since the GFP frames are of variable length (the mapping does not impose any restrictions on the
maximum frame length), a GFP frame may cross the OPUk frame boundary. A GFP frame consists
of a GFP header and a GFP payload area.
14X+1
14X+2
16X+1
3824X
15X
1
VCOH
VCOH
3
PSI
PSI
OPUk-Xv payload
OPUk-Xv
overhead 0 PT (06) GFP frame GFP idle frame
1 vcPT
PSI
RES 4 4-65535 4 G.709/Y.1331_F18-9
255 bytes bytes
GFP frames arrive as a continuous bit stream with a capacity that is identical to the OPUk-Xv
payload area, due to the insertion of GFP idles at the GFP encapsulation stage. The GFP frame
stream is scrambled during encapsulation.
NOTE – There is no rate adaptation or scrambling required at the mapping stage; this is performed by the
GFP encapsulation process.
The OPUk-Xv overhead for the GFP mapping consists of X times a Payload Structure Identifier
(PSI), which includes the Payload Type (PT) and virtual concatenation payload type (vcPT),
X times three Virtual Concatenation Overhead (VCOH) bytes and X times four bytes reserved for
future international standardization (RES).
The OPUk-Xv payload for the GFP mapping consists of 4X × 3808 bytes.
18.2.5 Mapping of test signal into OPUk-Xv
18.2.5.1 Mapping of a NULL client into OPUk-Xv
An OPUk-Xv payload signal with an all-0s pattern (see Figure 18-10) is defined for test purposes.
This is referred to as the NULL client.
14X+1
14X+2
16X+1
3824X
15X
1
VCOH
VCOH
2
All-0s pattern
3
PSI
PSI
OPUk-Xv payload
OPUk-Xv (4X 3808 bytes)
overhead 0 PT (06)
1 vcPT
PSI
RES
255 G.709/Y.1331_F18-10
The OPUk-Xv overhead for the NULL mapping consists of X times a Payload Structure Identifier
(PSI), which includes the Payload Type (PT) and virtual concatenation payload type (vcPT),
X times three Virtual Concatenation Overhead (VCOH) bytes and X times four bytes reserved for
future international standardization (RES).
The OPUk-Xv payload for the NULL mapping consists of 4X × 3808 bytes.
18.2.5.2 Mapping of PRBS test signal into OPUk-Xv
For test purposes a 2 147 483 647-bit pseudo-random test sequence (231 – 1) as specified
in 5.8/O.150 can be mapped into the OPUk-Xv payload. Groups of 8 successive bits of the
2 147 483 647-bit pseudo-random test sequence signal are mapped into 8 Data bits (8D)
(i.e., one byte) of the ODU3 payload (see Figure 18-11).
- 124 -
14X+1
14X+2
16X+1
3824X
15X
VCOH
2 X 3808 8D
3 X 3808 8D
PSI
PSI
4 X 3808 8D
OPUk-Xv payload
OPUk-Xv
overhead 0 PT (06)
1 vcPT
PSI
RES
255 G.709/Y.1331_F18-11
The OPUk-Xv overhead for the PRBS mapping consists of X times a Payload Structure Identifier
(PSI), which includes the Payload Type (PT) and virtual concatenation payload type (vcPT),
X times three Virtual Concatenation Overhead (VCOH) bytes and X times four bytes reserved for
future international standardization (RES).
The OPUk-Xv payload for the PRBS mapping consists of 4X × 3808 bytes.
18.2.6 Mapping of a non-specific client bit stream into OPUk-Xv
In addition to the mappings of specific client signals as specified in the other subclauses of this
clause, a non-specific client mapping into OPUk-Xv is specified. Any (set of) client signal(s),
which after encapsulation into a continuous bit stream with a bit rate of the OPUk-Xv payload, can
be mapped into the OPUk-Xv payload (see Figure 18-12). The bit stream must be synchronous with
the OPUk-Xv signal. Any justification must be included in the continuous bit stream creation
process. The continuous bit stream must be scrambled before mapping into the OPUk-Xv payload.
- 125 -
14X+1
14X+2
15X+1
15X+2
16X+1
3824X
15X
16X
CS CS
CS
1
VCOH
VCOH
CS
2
CS
3 CS
PSI
PSI
CS
CS
OPUk-Xv payload
OPUk-Xv (4X 3808 bytes)
overhead 0 PT (06)
1 vcPT
PSI
RES
255 G.709/Y.1331_F18-12
The OPUk-Xv overhead for the mapping consists of X times a Payload Structure Identifier (PSI),
which includes the Payload Type (PT) and virtual concatenation payload type (vcPT), X times three
Virtual Concatenation Overhead (VCOH) bytes and X times four bytes for client specific purposes
(CS). The definition of these CS overhead bytes is performed within the encapsulation process
specification.
The OPUk-Xv payload for this non-specific mapping consists of 4X × 3808 bytes.
18.2.6.1 Mapping bit stream with octet timing into OPUk-Xv
If octet timing is available, each octet of the incoming data stream will be mapped into a data byte
(octet) of the OPUk-Xv payload.
18.2.6.2 Mapping bit stream without octet timing into OPUk-Xv
If octet timing is not available, groups of 8 successive bits (not necessarily an octet) of the incoming
data stream will be mapped into a data byte (octet) of the OPUk-Xv payload.
19 Mapping ODUj signals into the ODTU signal and the ODTU into the HO OPUk
tributary slots
This clause specifies the multiplexing of
- ODU0 into HO OPU1, ODU1 into HO OPU2, ODU1 and ODU2 into HO OPU3 using
client/server specific asynchronous mapping procedures (AMP)
- Other ODUj into HO OPUk using a client agnostic generic mapping procedure (GMP).
This ODUj into HO OPUk multiplexing is performed in two steps:
1) asynchronous mapping of ODUj into Optical channel Data Tributary Unit (ODTU) using
either AMP or GMP
2) byte-synchronous mapping of ODTU into one or more HO OPUk Tributary Slots.
- 126 -
3823
3824
bits Frame Frame 1
15
16
17
18
19
20
21
22
23
24
25
26
(6)78 Row Row
1 1
TSOH
2 2
TS1
(0)00
3 3
4 4
5 1
TSOH
6 2
TS2
(0)01
7 3
8 4
13 1
TSOH
14 2 TS4
(0)11
15 3
16 4
TS1 or TS5
17 1 1
TSOH
18 2 2
(1)00
19 3 3
20 4 4
TS4 or TS8
29 13 1
TSOH
30 14 2
(1)11 1 2 3 4 5 6 7 8 1 2 7 8 1.25G TS#
31 15 3
32 16 4 1 2 3 4 1 2 3 4 1 2 3 4 2.5G TS#
- An OPU3 2.5G Tributary Slot occupies 6.25% of the OPU3 payload area. It is a structure
with 238 columns by 64 (16 4) rows (see Figures 19-2 and 19-419-8) plus Tributary Slot
Overhead (TSOH). The sixteen OPU3 2.5G TSs are byte interleaved in the OPU3 payload
area and the sixteen OPU3 TSOHs are frame interleaved in the OPU3 overhead area.
- An OPU3 1.25G Tributary Slot occupies 3.125% of the OPU3 payload area. It is a structure
with 119 columns by 128 (32 4) rows (see Figures 19-2 and 19-419-8) plus Tributary Slot
Overhead (TSOH). The thirty-two OPU3 1.25G TSs are byte interleaved in the OPU3
payload area and the thirty-two OPU3 TSOHs are frame interleaved in the OPU3 overhead
area.
An OPU3 2.5G tributary slot “i” (i = 1,2,..16) is provided by two OPU3 1.25G tributary slots “i”
and “i+16” as illustrated in Figure 19-2.
The Tributrary Slot Overhead (TSOH) of OPU3 tributary slots is located in column 16 plus column
15, rows 1, 2 and 3 of the OPU3 frame.
TSOH for a 2.5G tributary slot is available once every 16 frames. A 16-frame multiframe structure
is used for this assignment. This multiframe structure is locked to bits 5, 6, 7 and 8 of the MFAS
byte as shown in Table 19-2 and Figure 19-2.
TSOH for a 1.25G tributary slot is available once every 32 frames. A 32-frame multiframe structure
is used for this assignment. This multiframe structure is locked to bits 4, 5, 6, 7 and 8 of the MFAS
byte as shown in Table 19-2 and Figure 19-2.
3823
3824
bits Frame Frame 1
15
16
17
18
31
32
33
34
47
48
49
50
(4)5678 Row Row
1 1
TSOH
2 2
TS1
(0)0000
3 3
4 4
5 1
TSOH
6 2
TS2
(0)0001
7 3
8 4
61 1
TSOH
TS16
62 2
(0)1111
63 3
64 4
TS1 or TS17
65 1 1
TSOH
66 2 2
(1)0000
76 3 3
68 4 4
TS16 or TS32
125 61 1
TSOH
15
16
17
18
15 31
16 32
15 31
16 32
1 1
2 2
2 2
(1)1111
127 63 3
16
15
2.5G TS#
1
2
128 64 4
3823
3824
bit Frame Frame 1
15
16
17
18
19
20
8 Row Row
1 1
TSOH
2 2
TS1
0
3 3
4 4
5 1
TSOH
6 2
TS2
1
7 3
1 2 1 2 1 2 1.25G TS#
8 4
1001111
1001110
0000001
0000000
8
7
6
5
4
3
2
1
320
319
318
317
316
315
314
313
2345678 Row
Multi
Row
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
Frame Frame 1
Column
PSI
PSI
PSI
PSI
FI
FI
FI
FI
OM
OM
OM
OM
79 39 79 39 79 39 79 39 79 39 79 39 79 39 79 39 55
80 40 80 40 80 40 80 40 80 40 80 40 80 40 80 40 56
- 131 -
1 41 1 41 1 41 1 41 1 41 1 41 1 41 1 41 57
2 42 2 42 2 42 2 42 2 42 2 42 2 42 2 42 58
39 79 39 79 39 79 39 79 39 79 39 79 39 79 39 79 95
40 80 40 80 40 80 40 80 40 80 40 80 40 80 40 80 96
41 1 41 1 41 1 41 1 41 1 41 1 41 1 41 1 97
42 2 42 2 42 2 42 2 42 2 42 2 42 2 42 2 98
Figure 19-1619-4A/G.709/Y.1331 – OPU4 1.25G tributary slot allocation
79 39 79 39 79 39 79 39 79 39 79 39 79 39 79 39 3815
80 40 80 40 80 40 80 40 80 40 80 40 80 40 80 40 3816
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3817
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3818
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3819
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3820
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3821
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3822
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3823
FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS FS 3824
bits
OMFI
1001111
1001110
0000001
0000000
4
3
2
1
160
159
158
157
Multi
3+4
1+2
3+4
1+2
3+4
1+2
3+4
1+2
1
Column
15
TS2
TS1
TS80
TS79
16
1 1 1 1 1 1 1 1 17
2 2 2 2 2 2 2 2 18
79 79 79 79 79 79 79 79 95
80 80 80 80 80 80 80 80 96
1 1 1 1 1 1 1 1 97
2 2 2 2 2 2 2 2 98
39 39 39 39 39 39 39 39 3815
40 40 40 40 40 40 40 40 3816
FS FS FS FS FS FS FS FS 3817
FS FS FS FS FS FS FS FS 3818
FS FS FS FS FS FS FS FS 3819
FS FS FS FS FS FS FS FS
- 132 -
3820
FS FS FS FS FS FS FS FS 3821
FS FS FS FS FS FS FS FS 3822
FS FS FS FS FS FS FS FS 3823
FS FS FS FS FS FS FS FS 3824
1
PSI
PSI
PSI
PSI
15
FI
FI
FI
FI
TS2
TS1
OM
OM
OM
OM
TS80
TS79
16
41 41 41 41 41 41 41 41 17
42 42 42 42 42 42 42 42 18
79 79 79 79 79 79 79 79 55
80 80 80 80 80 80 80 80 56
1 1 1 1 1 1 1 1 57
2 2 2 2 2 2 2 2 58
Figure 19-1619-4B/G.709/Y.1331 – OPU4 tributary slots in 160 row x 7620 column format
79 79 79 79 79 79 79 79 3815
80 80 80 80 80 80 80 80 3816
FS FS FS FS FS FS FS FS 3817
FS FS FS FS FS FS FS FS 3818
FS FS FS FS FS FS FS FS 3819
FS FS FS FS FS FS FS FS 3820
FS FS FS FS FS FS FS FS 3821
FS FS FS FS FS FS FS FS 3822
FS FS FS FS FS FS FS FS 3823
FS FS FS FS FS FS FS FS 3824
- 133 -
ODTUjk
c-1
Overhead 1 2 3
c
1 1
2
3
ODTUjk Payload
ts
r-1
jk=01,12,13,23 r
Table 19-619-5/G.709/Y.1331 – ODTUjk characteristics for 2.5G and 1.25G tributary slots
2.5G TS c r ts ODTUjk ODTUjk
Payload bytes Overhead bytes
ODTU12 952 16 1 15232 1x4
ODTU13 238 64 1 15232 1x4
ODTU23 952 64 4 60928 4x4
j x ts -1
j x ts
ODTUk.ts
Overhead 1 2 3
1
2
3
ODTUk.ts Payload
ts
r-1
k=2,3,4 r
952
952
3
8
1
2
4
5
6
7
1
2
4
5
6
7
MFAS MFAS
bits bits
78 1 678 1
2 2
00 000
3 3
4 4
ODTU12
ODTU12
1 1
2 2
11 111
3 3
4 4
2 2 2
00 000
3 3 3
4 4 4
1 1 1
2 2 2
11 111
Column 16 3 3 3
OPU2 TSOH
of TS #i column 16
4 OPU2 TSOH 4 4
of TS #A, #B
952
476
476
1
2
1
2
1
Figure 19-319-7/G.709/Y.1331 – Mapping of ODTU12 into one OPU2 2.5G Tributary Slot 2
238
238
3
8
1
2
4
5
6
7
1
2
4
5
6
7
MFAS MFAS
bits bits
5678 1 45678 1
2 2
0000 00000
3 3
4 4
ODTU13
ODTU13
1 1
2 2
1111 11111
3 3
4 4
2 2 2
0000 00000
3 3 3
4 4 4
1 1 1
2 2 2
1111 11111
column 16 3 3 3
OPU3 TSOH
of TS #i 4 column 16 4 4
OPU3 TSOH
of TS #A, #B
238
119
119
1
2
1
2
1
2
Figure 19-419-8/G.709/Y.1331 – Mapping of ODTU13 into one OPU3 2.5G Tributary Slot
(left) and two OPU3 1.25G Tributary Slots (right)
952
3
8
1
2
4
5
6
7
MFAS
bits
5678 1
2
0000
3
4
ODTU23
2
1111
3
2
0000
3
2
1111
column 16 3
OPU3 TSOH
of TS #a,b,c,d 4
238
238
238
238
1
2
1
2
1
2
1
2
952
1
2
3
4
5
6
7
8
MFAS
bits
45678 1
2
00000
3
4
ODTU23
2
11111
3
2 2 2 2
00000
3 3 3 3
4 4 4 4
1 1 1 1
2 2 2 2
11111
3 3 3 3
column 16 OPU3 TSOH 4 4 4 4
of TS#a,b,c,d,e,f,g,h
119
119
119
119
1
2
1
2
1
2
1
2
- 140 -
1904
2
3
4
6
7
8
1
5
MFAS
bits
8 1
2
0
3
JC1
4
JC2
ODTU01
1
JC3
2
NJO
1
3
2
0
3
RES RES
JC2 JC1
4
OPU1 TS #i
1
RES
JC3
2
1
NJO
OPU1 TSOH 4
of TS #i
1904
1
2
3
4
5
6
7
8
G.709/Y.1331_F19-3
19.3.5 ODTU2.ts mapping into ts OPU2 1.25G Tributary Slots
A byte of the ODTU2.ts payload signal is mapped into a byte of an OPU2 1.25G TS #i (i = 1,..,ts)
payload area, as indicated in Figure 19-2019-11.
A byte of the ODTU2.ts Overhead is mapped into a TSOH byte within columns 15,16 rows 1 to 3
of the last OPU2 1.25G tributary slot allocated to the ODTU2.ts.
The remaining OPU2 TSOH bytes are reserved for future international standardisation.
- 142 -
476 x ts
ts
3
1
2
1
4
ODTU2.ts
JC4
JC1
JC5
JC2
r-3
JC6
JC3
r-2
r-1
TS #B
000
OPU2 Tributary Slots
3 3 3
RES
RES
4 4 4
RES
RES RES
RES RES
RES RES
TS #X
JC4
JC1
RES
JC5
JC2
1 1 1
JC6
JC3
2 2 2
RES
4 4 4
476
476
476
1
2
1
2
1
2
Figure 19-2019-11/G.709/Y.1331 – Mapping of ODTU2.ts into ‘ts’ OPU2 1.25G Tributary
Slots
119 x ts
ts
3
1
2
1
4
ODTU3.ts
JC4
JC1
JC5
JC2
r-3
JC6
JC3
r-2
r-1
00000
RES RES
RES RES
3 3 3
OPU3 Tributary Slots
4 4 4
RES
RES RES
TS #X
RES
RES RES
JC4
JC1
JC5
JC2
1 1 1
OPU3 TSOH
JC6
JC3
of TS # a,b,.., x 2 2 2
RES
11111
3 3 3
4 4 4
119
119
119
1
2
1
2
1
2
Figure 19-2119-12/G.709/Y.1331 – Mapping of ODTU3.ts into ‘ts’ OPU3 1.25G Tributary
Slots
95 x ts
ts
1
2
3
1,2 1
3,4 2
1,2 3
3,4 4
ODTU4.ts
1,2 157
JC4
JC1
JC5
JC2
3,4 158
JC6
JC3
1,2 159
3,4 160
OMFI
bits
2345678 TS #A OPU4 TS #A OPU4 TS #B OPU4 TS #X
RES RES
RES RES
RES
RES
1 2 1 2 1 2
0000000
3 4 3 4 3 4
Tributary
TS #B
OPU4
Slots
RES RES
RES RES
RES
RES
1 2 1 2 1 2
1001111
TS #X 3 4 3 4 3 4
OPU4 TSOH
JC4
JC1
JC5
JC2
47/48
48/49
47/48
48/49
47/48
48/49
95
95
95
1
2
1
2
1
2
of TS # a,b,.., x
JC6
JC3
column of OPU3 2.5G tributary slot #a (OPU3 column 16+a) in frames #a, #b, #c and #d of the
sixteen frame multiframe. The four PJO2s for an ODU2 in OPU3 2.5G tributary slots #a, #b, #c and
#d are located in the first column of OPU3 2.5G tributary slot #b (OPU3 column 16+b) in frames
#a, #b, #c and #d of the sixteen frame multiframe. Figure 19-619-14A presents an example with
four ODU2s in the OPU3 mapped into 2.5G tributary slots (1,5,9,10), (2,3,11,12), (4,14,15,16) and
(6,7,8,13).
EXAMPLE – ODU2 in OPU3 TS(1,2,3,4): PJO1 in column 16+1=17, PJO2 in column 16+2=18.
ODU2 in OPU3 TS(13,14,15,16): PJO1 in column 16+13=29, PJO2 in column 16+14=30.
The PJO1 for an ODU0 in OPU1 1.25G tributary slot #i (i: 1,2) is located in the first column of
OPU1 1.25G tributary slot #i (OPU1 column 16+i) and the PJO2 is located in the second column of
OPU1 1.25G tributary slot #i (OPU1 column 18+i) in frame #i of the two frame multiframe.
The PJO1 for an ODU1 in OPU2 or OPU3 1.25G tributary slots #a and #b (a: 1..7 or 1..31
respectively; b: 2..8 or 2..32 respectively) is located in the first column of OPUk 1.25G tributary
slot #a (OPUk column 16+a) and the PJO2 is located in the first column of OPUk 1.25G tributary
slot #b (OPUk column 16+b) in frames #a and #b of the eight or thirty-two frame multiframe.
EXAMPLE – ODU1 in OPU2 or OPU3 TS(1,2): PJO1 in column 16+1=17, PJO2 in column
16+2=18. ODU1 in OPU2 TS(7,8): PJO1 in column 16+7=23, PJO2 in column 16+8=24. ODU1 in
OPU3 TS(31,32): PJO1 in column 16+31=47, PJO2 in column 16+32=48.
The eight PJO1s for an ODU2 in OPU3 1.25G tributary slots #a, #b, #c, #d, #e, #f, #g and #h are
located in the first column of OPU3 1.25G tributary slot #a (OPU3 column 16+a) in frames #a, #b,
#c, #d, #e, #f, #g and #h of the thirty-two frame multiframe. The eight PJO2s for an ODU2 in OPU3
1.25G tributary slots #a, #b, #c, #d, #e, #f, #g and #h are located in the first column of OPU3 1.25G
tributary slot #b (OPU3 column 16+b) in frames #a, #b, #c, #d, #e, #f, #g and #h of the thirty-two
frame multiframe. Figure 19-619-14B presents an example with two ODU2s and two ODU1s in the
OPU3 mapped into 1.25G tributary slots (1,5,9,10,17,19,20,21), (25,26,27,28,29,30,31,32), (2,3)
and (4,24).
EXAMPLE – ODU2 in OPU3 TS(1,2,3,4,5,6,7,8): PJO1 in column 16+1=17, PJO2 in column
16+2=18. ODU2 in OPU3 TS(25,26,27,28,29,30,31,32): PJO1 in column 16+25=41, PJO2 in
column 16+26=42.
- 146 -
Column
3821
3822
3823
3824
15
16
17
Row
JC
2
OPUk Payload
(4 x 3808 bytes)
NJO JC
3
4 PJO
1 2 3 4 5 6 7 8
OPU1 JC Reserved JC
0 PT = 20
1 Reserved OPU2 (2.5G TS) with ODU1 OPU3 (2.5G TS) with ODU1
2
3
MSI MFAS MFAS
PJO1 17
18
19
20
PJO2 21
22
23
24
PJO1 17
18
19
32
PJO2 33
34
35
48
4 bits 78 bits 5678
00 0000
PJO1
PJO2
PJO1
PJO2
01 0001
PJO1
PJO2
PJO1
PJO2
10 0010
Reserved
PJO1
PJO2
11
PJO1
PJO2
1111
255
OPU3 (2.5G TS) with ODU2 (1,5,9,10), (2,3,11,12), (4,14,15,16), (6,7,8,13)
OPU2 MFAS
PJO1 17
18
19
20
PJO2 21
22
23
24
25
26
27
28
29
30
31
32
0 PT = 20 bits 5678
1 Reserved 0000
2 OPU1 (1.25G TS) with ODU0
MSI
PJO1 PJO1
PJO2 PJO2
MFAS
PJO1 17
18
PJO2 19
20
5 0001
bit 8
6
0
0010
PJO1
PJO2
PJO1
PJO2
1
0011
PJO1
PJO2
Reserved 0100
PJO1 PJO1 PJO1
PJO2 PJO2 PJO2
0101
0110
255
0111
OPU3
0
PJO1 PJO1
PJO2 PJO2
PT = 20 1000
1 Reserved
2
1001
MSI
PJO1 PJO1
PJO2 PJO2
1010
17
18 1011
PJO1
PJO2
1100
PJO1 PJO1 PJO1
Reserved 1101
1110
255 1111
Column
3821
3822
3823
3824
15
16
17
Row
JC
2
OPUk Payload
NJO JC (4 x 3808 bytes)
3
4 PJO
1 2 3 4 5 6 7 8
OPU2 JC Reserved JC
0 PT=21
1 Reserved OPU2 (1.25G TS) with ODU1 (1,2), (3,6), (7,8)
2
MFAS MFAS
PJO1 PJO1 17
PJO2 PJO2 18
19
20
21
22
23
24
17
18
19
20
21
22
23
24
MSI bits 678 bits 678
9 000 100
10
PJO1
PJO2
001 101
PJO1
PJO2
PJO1 PJO1
PJO2 PJO2
010 110
Reserved
011 111
255 OPU3 (1.25G TS) with ODU2 (1,5,9,10,17,19,20,21), (25,26,27,28,29,30,31,32),ODU1 (2,3), (4,24)
OPU3 MFAS MFAS
PJO1 17
18
19
20
PJO2 21
22
40
41
42
43
44
45
46
47
48
PJO1 17
18
19
20
PJO2 21
22
40
41
42
43
44
45
46
47
48
0
:
:
PT=21 bits 45678 bits 45678
1 Reserved 00000 10000
2
PJO1 PJO1
PJO2 PJO2
00001 10001
MSI
PJO1 PJO1 PJO1
00010 10010
33
PJO1
PJO2
34
00011 10011
PJO1
PJO2
00100 10100
00110 10110
255
PJO1
PJO2
00111 10111
PJO1 PJO1
PJO2 PJO2
01000 11000
01001 11001
01010 11010
01011 11011
01100 11100
01101 11101
01110 11110
01111 11111
ODTUk.ts overhead
The ODTUk.ts Overhead carries the GMP Justification Overhead consisting of 3 bytes of
Justification Control (JC1, JC2, JC3) which carry the 14-bit GMP Cm information and client/LO
ODU specific 3 bytes of Justification Control (JC4, JC5, JC6) which carry the 10-bit GMP C8D
information.
The JC1, JC2, JC3, JC4, JC5 and JC6 overhead locations are shown in Figures 19-619-14C.
Column
3821
3822
3823
3824
15
16
17
Row
1
2
OPUk Payload
(4 x 3808 bytes)
3
PSI
4
JC4
JC1
JC4
JC1
JC5
JC2
JC6
OMFI JC3
MSI
9 MSI
10
33 MSI
ODTU2.ts ODTU4.ts 34
ODTU3.ts
Reserved
81
Reserved 82
1 2 3 4 5 6 7 8
Reserved
OMFI 0 MSB ......... LSB
255 255 255
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
RES RES RES
RES RES RES
RES RES RES
multiplex structure in the OPU, is located in the mapping specific area of the PSI signal (refer to
Figure 19-619-14A for the MSI location in OPUk with PT=20, refer to Figures 19-619-14B and 19-
619-14C for the MSI location in OPUk with PT=21). The MSI has an OPU and Tributary Slot
(2.5G, 1.25G) specific length (OPU1: 2 bytes, OPU2: 4 or 8 bytes, OPU3: 16 or 32 bytes, OPU4:
80 bytes) and indicates the ODTU content of each tributary slot (TS) of an OPU. One byte is used
for each TS.
19.4.1.1 OPU2 Multiplex Structure Identifier (MSI) – Payload Type 20
For the 4 OPU2 2.5G tributary slots 4 bytes of the PSI are used (PSI[2] .. PSI[5]) as MSI bytes as
shown in Figures 19-619-14A and 19-819-15. The MSI indicates the ODTU content of each
tributary slot of the OPU2. One byte is used for each tributary slot.
– The ODTU type in bits 1 and 2 is fixed to 00 to indicate the presence of an ODTU12.
– The tributary port # indicates the port number of the ODU1 that is being transported in this
2.5G TS; the assignment of ports to tributary slots is fixed, the port number equals the
tributary slot number.
1 2 3 4 5 6 7 8
PSI[2] 00 00 0000 TS1
PSI[3] 00 00 0001 TS2
PSI[4] 00 00 0010 TS3
PSI[5] 00 00 0011 TS4
1 2 3 4 5 6 7 8
PSI[2] ODTU type Tributary Port # TS1
PSI[3] ODTU type Tributary Port # TS2
PSI[4] ODTU type Tributary Port # TS3
PSI[5] ODTU type Tributary Port # TS4
PSI[6] ODTU type Tributary Port # TS5
PSI[7] ODTU type Tributary Port # TS6
PSI[8] ODTU type Tributary Port # TS7
- 150 -
1 2 3 4 5 6 7 8
PSI[1+ i] ODTU type Tributary Port # TS #i
1 2 3 4 5 6 7 8 1.25G TS
PSI[2] 11 00 0000 TS1
PSI[3] 11 00 0001 TS2
– The tributary port # in bits 2 to 8 indicates the port number of the ODTU4.ts that is being
transported in this TS; for the case of an ODTU4.ts carried in two or more tributary slots, a
flexible assignment of tributary port to tributary slots is possible. ODTU4.ts tributary ports
are numbered 1 to 80. The value is set to all-0‟s when the occupation bit has the value 0
(tributary slot is unallocated).
1 2 3 4 5 6 7 8 1.25G TS
PSI[2] TS occupied Tributary Port # TS1
PSI[3] TS occupied Tributary Port # TS2
PSI[4] TS occupied Tributary Port # TS3
PSI[5] TS occupied Tributary Port # TS4
PSI[6] TS occupied Tributary Port # TS5
PSI[7] TS occupied Tributary Port # TS6
PSI[8] TS occupied Tributary Port # TS7
PSI[9] TS occupied Tributary Port # TS8
: : : :
: : : :
PSI[81] TS occupied Tributary Port # TS80
1 2 3 4 5 6 7 8
PSI[1+ i] Occupation Tributary Port # TS #i
1 2 3 4 5 6 7 8
PSI[2] ODTU type Tributary Port # TS1
PSI[3] ODTU type Tributary Port # TS2
PSI[4] ODTU type Tributary Port # TS3
PSI[5] ODTU type Tributary Port # TS4
PSI[6] ODTU type Tributary Port # TS5
PSI[7] ODTU type Tributary Port # TS6
PSI[8] ODTU type Tributary Port # TS7
PSI[9] ODTU type Tributary Port # TS8
1 2 3 4 5 6 7 8
PSI[1+ i] ODTU type Tributary Port # TS #i
19.4.1.6 OPU3 with 1.25G Tributary Slots (Payload Type 21) Multiplex Structure Identifier
(MSI)
For the thirty-two OPU3 1.25G tributary slots 32 bytes of the PSI (PSI[2] to PSI[33]) are used as
MSI bytes as show in Figures 19-619-14B, 19-2619-20A and 2619-20B. The MSI indicates the
ODTU content of each tributary slot of an OPU. One byte is used for each tributary slot.
– The ODTU type in bits 1 and 2 indicates if the OPU3 1.25G TS is carrying an ODTU13,
ODTU23 or ODTU3.ts. The default ODTU type is 11 (unallocated); it is present when a
tributary slot is not allocated to carry an ODTU.
– The tributary port # in bits 3 to 8 indicates the port number of the ODTU that is being
transported in this TS; a flexible assignment of tributary ports to tributary slots is possible,
ODTU13 tributary ports are numbered 1 to 16, ODTU23 tributary ports are numbered 1 to
4 and ODTU2.ts tributary ports are numbered 1 to 32. The value is set to all-0‟s when the
ODTU type has the value 11 (tributary slot is unallocated).
- 153 -
1 2 3 4 5 6 7 8
PSI[2] ODTU type Tributary Port # TS1
PSI[3] ODTU type Tributary Port # TS2
PSI[4] ODTU type Tributary Port # TS3
PSI[5] ODTU type Tributary Port # TS4
PSI[6] ODTU type Tributary Port # TS5
: : : :
: : : :
PSI[33] ODTU type Tributary Port # TS32
1 2 3 4 5 6 7 8
PSI[1+ i] ODTU type Tributary Port # TS #i
OMFI OH Byte
1 2 3 4 5 6 7 8
.
Fixed to 0
.
0 0 0 0 0 0 0
0 0 0 0 0 0 1
0 0 0 0 0 1 0
OMFI sequence
0 0 0 0 0 1 1
0 0 0 0 1 0 0
.
.
.
.
1 0 0 1 1 1 0
1 0 0 1 1 1 1
0 0 0 0 0 0 0
0 0 0 0 0 0 1
.
.
Column #
1 ... 7 8 ... 14 15 ... 3824
FA overhead Fixed stuff
1
area (all-0s)
2
Row #
OPUj area
ODUj overhead (4 3810 bytes)
3
area
4
The extended ODUj signal is adapted to the locally generated ODUk clock by means of an
asynchronous mapping with –1/0/+1/+2 positive/negative/zero (pnz) justification scheme.
An extended ODUj byte is mapped into an ODTUjk byte.
The asynchronous mapping process generates the JC, NJO, PJO1 and PJO2 according to
Table 19-319-7. The demapping process interprets JC, NJO, PJO1 and PJO2 according to Table 19-
319-7. Majority vote (two out of three) shall be used to make the justification decision in the
demapping process to protect against an error in one of the three JC signals.
- 156 -
Table 19-319-7/G.709/Y.1331 – JC, NJO, PJO1 and PJO2 generation and interpretation
JC
NJO PJO1 PJO2 Interpretation
78
00 justification byte data byte data byte no justification (0)
01 data byte data byte data byte negative justification (–1)
1 0* justification byte justification byte justification byte double positive justification (+2)
11 justification byte justification byte data byte positive justification (+1)
*) Note that this code is not used for the case of ODU0 into OPU1.
The value contained in NJO, PJO1 and PJO2 when they are used as justification bytes is all-0s. The
receiver is required to ignore the value contained in these bytes whenever they are used as
justification bytes.
During a signal fail condition of the incoming ODUj client signal (e.g., OTUj-LOF), this failed
incoming signal will contain the ODUj-AIS signal as specified in 16.5.1. This ODUj-AIS is then
mapped into the ODTUjk.
For the case the ODUj is received from the output of a fabric (ODU connection function), the
incoming signal may contain (case of open matrix connection) the ODUj-OCI signal as specified
in 16.5.2. This ODUj-OCI signal is then mapped into the ODTUjk.
NOTE – Not all equipment will have a real connection function (i.e., switch fabric) implemented; instead,
the presence/absence of tributary interface port units represents the presence/absence of a matrix connection.
If such unit is intentionally absent (i.e., not installed), the associated ODTUjk signals should carry an
ODUj-OCI signal. If such unit is installed but temporarily removed as part of a repair action, the associated
ODTUjk signal should carry an ODUj-AIS signal.
The OPUk and therefore the ODTUjk (k = 1,2,3) signals are created from a locally generated clock
(within the limits specified in Table 17-3), which is independent of the ODUj (j = 0,1,2) client
signal.
The ODUj (j = 0,1,2) signal is mapped into the ODTUjk (k = 1,2,3) using a –1/0/+1/+2
positive/negative/zero (pnz) justification scheme.
The demapping of ODUj signals from the ODTUjk signal (((j,k) = {(0,1), (1,2), (1,3), (2,3)) is
performed by extracting the extended ODUj signal from the OPUk under control of its justification
overhead (JC, NJO, PJO1, PJO2).
NOTE – For the case the ODUj signal is output as an OTUj signal, frame alignment of the extracted
extended ODUj signal is to be recovered to allow frame synchronous mapping of the ODUj into the
OTUj signal.
During signal fail condition of the incoming ODUk/OPUk signal (e.g., in the case of an ODUk-AIS,
ODUk-LCK, ODUk-OCI condition) the ODUj-AIS pattern as specified in 16.5.1 is generated as a
replacement signal for the lost ODUj signal.
19.5.1 Mapping ODU1 into ODTU12
A byte of the ODU1 signal is mapped into an information byte of the ODTU12 (see Figure 19-
1119-23A). Once per 4 OPU2 frames, it is possible to perform either a positive or a negative
justification action. The frame in which justification can be performed is related to the TSOH of the
OPU2 2.5G TS in which the ODTU12 is mapped (Figure 19-1). Figure 19-1119-23A shows the
case with mapping in OPU2 2.5G TS1.
A byte of the ODU1 signal is mapped into an information byte of the ODTU12 (see Figure 19-
1119-23B). Twice per 8 OPU2 frames, it is possible to perform either a positive or a negative
- 157 -
justification action. The frames in which justification can be performed are related to the TSOH of
the OPU2 1.25G TSs in which the ODTU12 is mapped (Figure 19-1). Figure 19-1119-23B shows
the case with mapping in OPU2 1.25G TS2 and TS4.
MFAS
952
bits
1
2
78
JC
In
JC
f
or
m
00
at
io
JC
n
3
by
te
s
PJO1
PJO2
NJO
In
2
f
or
m
01
at
io
n
3
by
te
s
4
1 In
2
f
or
m
10
at
io
n
3
by
te
s
1
In
2
f
or
m
11
at
io
n
3
by
te
s
4
G.709/Y.1331_F19-11
2 PJO2 PJO2
1 PJO1 PJO1
1
4
JC JC NJO JC JC JC NJO JC
MFAS
678
000
001
010
011
100
101
110
111
bits
- 159 -
119
238
MFAS
1
2
bits
5678 1
In
In
Fixed stuff
2
f
or
or
m
m
0000
at
at
io
io
n
n
3
by
by
te
te
s
s
4
In
In
Fixed stuff
2
f
or
or
m
m
0001
at
at
io
io
n
n
3
by
by
te
te
s
s
4
JC
1
In
In
Fixed stuff
JC
2
f
f
or
or
m
m
0010
at
at
io
io
JC
n
3
by
by
te
te
s
s
PJO1
PJO2
NJO
1
In
In
Fixed stuff
2
f
f
or
or
m
1111
at
at
io
io
n
3
by
by
te
te
s
G.709/Y.1331_F19-12
119
238
1
2
MFAS
bits
45678 1
IN
IN
FIXED STUFF
FO
FO
R
R
2
M
AT
AT
00000
IO
IO
3
N
BY
BY
TE
TE
4
S
JC
1
IN
IN
FIXED STUFF
FO
FO
JC
R
2
M
AT
AT
00001
IO
IO
NJO JC
N
BY
BY
PJO1
PJO2
TE
TE
4
S
1
IN
IN
FIXED STUFF
FO
FO
R
R
2
M
M
AT
AT
00010
IO
IO
3
N
N
BY
BY
TE
TE
4
S
S
JC
1
IN
IN
FIXED STUFF
FO
FO
JC
2
M
M
AT
AT
11000
IO
IO
NJO JC
3
N
N
BY
BY
PJO1
PJO2
TE
TE
4
S
1
IN
IN
FIXED STUFF
FO
FO
R
2
M
M
AT
AT
11111
IO
IO
3
N
N
BY
BY
TE
TE
4
S
952
MFAS
1
2
bits
5678
JC
1
In
JC
fo
2
rm
0000
at
io
NJO JC 3
n
by
te
s
PJO1
PJO2
4
In
f
2
or
m
0001
at
io
3
n
by
te
s
4
JC
In
JC
2
f
or
0100 m
at
io
NJO JC
3
n
by
te
s
PJO1
PJO2
4
JC
1
In
JC
2
f
or
m
1000
at
io
JC NJO JC
3
n
by
te
s
PJO1
PJO2
1
In
JC
2
f
or
m
1001
at
io
NJO JC
3
n
by
te
s
PJO1
PJO2
1
In
f
2
or
m
1111
at
io
3
n
by
te
s
4
G.709/Y.1331_F19-13
952
1
2
MFAS
bits
JC
45678 1
IN
FO
JC
R
2
M
AT
00000
IO
JC NJO JC
3
N
BY
PJO1
PJO2
TE
4
S
1
IN
FO
JC
R
2
M
AT
00001
IO
NJO JC
3
N
BY
PJO1
PJO2
TE
4
S
JC
IN
FO
JC
R
2
M
AT
00100
IO
NJO JC
N
BY
PJO1
PJO2
TE
4
S
JC
1
IN
FO
JC
2
M
AT
01000
IO
JC NJO JC
3
N
BY
PJO1
PJO2
PJO
TE
4
S
1
IN
FO
JC
2
M
AT
01001
IO
NJO JC
3
N
BY
PJO1
PJO2
TE
4
S
JC
1
IN
FO
JC
2
M
AT
11000
IO
JC NJO JC
3
N
BY
PJO1
PJO2
PJO
TE
4
S
1
IN
FO
JC
2
M
AT
11001
IO
NJO JC
3
N
BY
PJO1
PJO2
TE
4
S
JC
1
IN
FO
JC
2
M
AT
11111
IO
NJO JC
3
N
BY
PJO1
PJO2
TE
4
S
MFAS OPU1 OH
1904
1
2
bit
8
PSI RES RES RES PSI RES RES RES
NJO JC JC JC
IN
FO
R
2
M
AT
0
IO
3
N
BY
PJO1
PJO2
TE
4
S
1
IN
FO
TS2 JOH
2
M
AT
1
IO
3
N
BY
TE
4
S
Cm(t) and CnD(t) according to Annex D. CRC-8 shall be used to protect against an error in
JC1,JC2,JC3 signals. CRC-5 shall be used to protect against an error in JC4,JC5,JC6 signals.
During a signal fail condition of the incoming ODUj signal, this failed incoming signal will contain
the ODUj-AIS signal as specified in 16.5.1. This ODUj-AIS is then mapped into the ODTUk.M.
For the case the ODUj is received from the output of a fabric (ODU connection function), the
incoming signal may contain (case of open matrix connection) the ODUj-OCI signal as specified
in 16.5.2. This ODUj-OCI signal is then mapped into the ODTUk.M.
NOTE – Not all equipment will have a real connection function (i.e., switch fabric) implemented; instead,
the presence/absence of tributary interface port units represents the presence/absence of a matrix connection.
If such unit is intentionally absent (i.e., not installed), the associated ODTUk.M signals should carry an
ODUj-OCI signal. If such unit is installed but temporarily removed as part of a repair action, the associated
ODTUk.M signal should carry an ODUj-AIS signal.
A group of „M‟ successive extended ODUj bytes is demapped from a group of „M‟ successive
ODTUk.M bytes.
NOTE – For the case the ODUj signal is output as an OTUj signal, frame alignment of the extracted
extended ODUj signal is to be recovered to allow frame synchronous mapping of the ODUj into the
OTUj signal.
During signal fail condition of the incoming ODUk/OPUk signal (e.g., in the case of an ODUk-AIS,
ODUk-LCK, ODUk-OCI condition) the ODUj-AIS pattern as specified in 16.5.1 is generated as a
replacement signal for the lost ODUj signal.
19.6.1 Mapping ODUj into ODTU2.M
Groups of M successive bytes of the extended ODUj (j = 0, flex) signal are mapped into a group of
M successive bytes of the ODTU2.M payload area under control of the GMP data/stuff control
mechanism. Each group of M bytes in the ODTU2.M payload area may either carry M ODU bytes,
or carry M stuff bytes. The value of the stuff bytes is set to all-0‟s.
The groups of M bytes in the ODTU2.M payload area are numbered from 1 to 15232.
The ODTU2.M payload byte numbering for GMP M-byte (m-bit) blocks is illustrated in Figure 19-
2819-27. In row 1 of the ODTU2.M multiframe the first M-bytes will be labelled 1, the next M-
bytes will be labelled 2, etc.
ODTU2.M
ODTU2.M Payload
Overhead 1 M M+1 2M 475M+1 476M
1 1 2 2 476 476 1
477 477 478 478 952 952 2
953 953 954 954 1428 1428 3
1429 1429 1430 1430 1904 1904 4
ODTU3.M
ODTU3.M Payload
Overhead 1 M M+1 2M 118M+1 119M
1 1 2 2 119 119 1
120 120 121 121 238 238 2
239 239 240 240 357 357 3
358 358 359 359 476 476 4
1 1 2 2 95 95 1
96 96 97 97 190 190 2
191 191 192 192 285 285 3
286 286 287 287 380 380 4
Annex A
The forward error correction for the OTU-k uses 16-byte interleaved codecs using a Reed-Solomon
RS(255,239) code. The RS(255,239) code is a non-binary code (the FEC algorithm operates on byte
symbols) and belongs to the family of systematic linear cyclic block codes.
For the FEC processing a OTU row is separated into 16 sub-rows using byte-interleaving as shown
in Figure A.1. Each FEC encoder/decoder processes one of these sub-rows. The FEC parity check
bytes are calculated over the information bytes 1 to 239 of each sub-row and transmitted in bytes
240 to 255 of the same sub-row.
The bytes in an OTU row belonging to FEC sub-row X are defined by: X + 16 × (i 1) (for
i = 1...255).
The generator polynomial of the code is given by:
15
G(z) ( z i )
i 0
FEC sub-row D254 D253 D252 D251 Dj D17 D16 R15 R14 Rj R1 R0
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
d7j d6j d5j d4j d3j d2j d1j d0j r7j r6j r5j r4j r3j r2j r1j r0j
G.709/Y.1331_FA.2
D j d7 j 7 d6 j 6 ... d1 j 1 d 0 j
D254 corresponds to the byte 1 in the FEC sub-row and D16 to byte 239.
Parity bytes are represented by:
R j r7 j 7 r6 j 6 ... r1 j 1 r0 j
R15 corresponds to the byte 240 in the FEC sub-row and R0 to byte 255.
R(z) is calculated by:
R(z) = I(z) mod G(z)
where "mod" is the modulo calculation over the code generator polynomial G(z) with elements out
of the GF(256). Each element in GF(256) is defined by the binary primitive polynomial
x8 x 4 x 3 x 2 1 .
The Hamming distance of the RS(255,239) code is dmin = 17. The code can correct up to 8 symbol
errors in the FEC code word when it is used for error correction. The FEC can detect up to
16 symbol errors in the FEC code word when it is used for error detection capability only.
- 172 -
Annex B
Adapting 64B/66B encoded clients via transcoding into 513B code blocks
Clients using 64B/66B coding can be adapted in a codeword and timing transparent mapping via
transcoding into 513B code blocks to reduce the bit-rate that is required to transport the signal. The
resulting 513B blocks can be mapped in one of several ways depending on the requirements of the
client and the available bandwidth of the container into which the client is mapped. This mapping
can be applied to serial or parallel client interfaces.
B.1 Transmission order
The order of transmission of information in all the diagrams in this Annex is first from left to right
and then from top to bottom.
B.2 Client frame recovery
Client framing recovery consists of the recovering 64B/66B block lock per the state diagram in
Figure 49-12 [IEEE 802.3] and the descrambling per the process shown in Figure 49-10
[IEEE802.3].
Each 66B codeword (after block lock) is one of the following:
A set of eight data bytes with a sync header of "01";
A control block (possibly including seven or fewer data octets) beginning with a sync
header of "10";
The 64 bits following the sync header are scrambled as a continuous bit-stream (skipping sync
headers and PCS lane markers) according to the polynomial G(x) = 1 + x39 +x58. The 64B/66B PCS
receive process will descramble the bits other than (1) the sync header of 66B data and control
blocks, and (2) the PCS lane markers.
Figure B.1 illustrates the ordering of 64B/66B code blocks after the completion of the recovering
process for an interface.
Transmission order
1 66B Block
2 66B Block
3 66B Block
x 66B Block
1….…………….........66 Transmission order
- 173 -
S
Y
Input Data N
Block Payload
C
Bit
Position
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65
Data Block
Form at
D0D1D2D3D4D5D6D7 0 1 D0 D1 D2 D3 D4 D5 D6 D7
Control block form ats Block type field 4-bit code
C0C1C2C3C4C5C6C7 1 0 0x1e C0 C1 C2 C3 C4 C5 C6 C7 0001
A group of eight 66B blocks is encoded into a single 513B block. The format is illustrated in Figure B.3:
1 2 3 4 5 6 7 8 Transmission Order
01 D0 D1 D2 D3 D4 D5 D6 D7 FC POS CB type
01 D0 D1 D2 D3 D4 D5 D6 D7
F 56-bit control characters (7-byte)
01 D0 D1 D2 D3 D4 D5 D6 D7
56-bit control characters (7-byte)
D0 D1 D2 D3 D4 D5 D6 D7
10 Block type 56-bit control characters (7-byte)
D0 D1 D2 D3 D4 D5 D6 D7
10 Block type 56-bit control characters (7-byte)
D0 D1 D2 D3 D4 D5 D6 D7
01 D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
Each of the 66B blocks is encoded into a row of the 8-byte by 8-row structure. Any 66B control blocks (CBi) are placed into the uppermost rows of the
structure in the order received, while any all-data 66B blocks (DBi) are placed into the lowermost rows of the structure in the order received.
The flag bit "F" is 1 if the 513B structure contains at least one 66B control block, and 0 if the 513B structure contains eight all-data 66B blocks.
Because the 66B control blocks are placed into the uppermost rows of the 513B block, if the flag bit "F" is 1, then the first row will contain a mapping
of a 66B control block.
- 175 -
A 66B control block is encoded into a row of the structure shown in Figure B.3 as follows: The
sync header of "10" is removed. The byte representing the Block Type field (see Figure B.2) is
replaced by the structure shown in Figure B.4:
The byte indicating the control block type (one of 15 legal values) is translated into a 4-bit code
according to the rightmost column of Figure B.2. The 3-bit POS field is used to encode the position
in which this control block was received in the sequence of eight 66B blocks. The flag continuation
bit "FC" will be set to a 0 if this is the final 66B control block or PCS lane alignment marker
encoded in this 513B block, or to a 1 if one or more 66B control blocks or PCS lane alignment
markers follow this one. At the decoder,FC the Flag bitPOS
for the 513B block as a whole, plus the flag
CB TYPE
continuation bits in each row containing the mapping of a 66B control block or PCS lane alignment
marker will allow identification of those rows, which can then be restored to their original position
amongst any all-data 66B blocks at the egress according to the POS field. The remaining 7 bytes of
the row are filled with the last 7 bytes of the 66B control block.
An all-data 66B block is encoded into a row of the 513B block by dropping the sync header and
copying the remaining eight bytes into the row. If all eight rows of the 513B block are placements
of 66B all-data blocks, the flag bit "F" will be 0. If fewer than eight rows of the 513B block are
placements of 66B all-data blocks, they will appear at the end, and the row containing the
placement of the final 66B control block will have a flag continuation bit “FC” value of 0.
The decoder operates in the reverse of the encoder to reconstruct the original sequence of 66B
blocks. If the Flag bit “F” is 1, then 66B control blocks starting from the first row of the block are
reconstructed and placed in the position indicated by the POS field. This process continues through
all of the control blocks working downward from the top row. The final 66B control block placed
within the 513B block will be identified when the flag continuation bit “FC” is zero.
The structure of the 512B/513B code block is shown in Figure B.5. For example, if there is a single
64B/66B control block CB1 in a 512B/513B code block and it was originally located between
64B/66B data blocks DB2 and DB3, the first octet of the 64B character will contain
0.010.1101.CB1; the leading bit in the control octet of 0 indicates the Flag Continuation “FC” that
this 64B control block is the last one in the 512B/513B code block, the value of 010 indicates
CB1‟s Position “POS” between DB2 and DB3, and the value of 1101 is a four-bit representation of
the control code‟s block type “CB TYPE” (of which the eight-bit original block type is 0x55).
- 176 -
Annex C
NOTE – This mechanism is designed to allow the use of the optical modules being developed for IEEE
40GBASE-R and 100GBASE-R signals for short-reach client-side OTU3 and OTU4 interfaces, respectively.
The corresponding physical layer specifications are being added to G.695 and G.959.1.
OTU3 signals may be carried over parallel interfaces consisting of four lanes.
OTU4 signals may be carried over parallel interfaces consisting of four or ten lanes, which are formed by bit
multiplexing of 20 logical lanes.
NOTE 1 – Ten lane IEEE 100GBASE-R interfaces have no corresponding ITU-T physical layer interface
specification.
The OTU3 and OTU4 frames are inversely multiplexed over physical/logical lanes on a 16-byte boundary
aligned with the OTUk frame as illustrated in Figure C.1. The OTUk frame is divided into 1020 groups of
16-bytes.
1 4080
1 1:16 (FAS) 17:32 33:48 49:64 4065:4080
2 4081:4096 4097:5012 5013:5028 5029:5044 9145:9160
3 9161:9176 9177:9192 9193:9208 9209:9224 12225:12240
4 12241:12256 12257:12272 12273:12288 12289:13304 16305:16320
The distribution of 16-byte blocks from the sequence of OTU3 frames is illustrated in Figure C.2:
The parallel lanes can be reassembled at the sink by first recovering framing on each of the parallel
lanes, then recovering the lane identifiers and then performing lane deskewing. Frame alignment,
lane identifier recovery and multi-lane alignment should operate under 10-3 bit error rate conditions
before error correction. Refer to Recommendation G.798 for the specific processing details.
The lane rotation mechanism will place the first 16 bytes of the OTU3 frame on each lane once per
40804 (i.e. 16320) bytes (the same as an OTU3 itself). The two LSB of the MFAS will be the
same in each FAS on a particular lane, which allows the lane to be identified. Since the MFAS
cycles through 256 distinct values, the lanes can be deskewed and reassembled by the receiver as
long as the total skew does not exceed 127 OTU3 frame periods (approximately 385s). The
receiver must use the MFAS to identify each received lane, as lane positions may not be preserved
by the optical modules to be used for this application.
OTU4 16-byte increment distribution
Each 16-byte increment of an OTU4 frame is distributed, round robin, to each of the 20 logical
lanes. On each OTU4 frame boundary, the lane assignments are rotated.
For distribution of OTU4 to twenty logical lanes, since the MFAS is not a multiple of 20, a different
marking mechanism must be used. Since the frame alignment signal is 6 bytes (48 bits) and per
G.798 only 32 bits must be checked for frame alignment, the 3rd OA2 byte position will be
borrowed as a logical lane marker (LLM). For maximum skew detection range, the lane marker
value will increment on successive frames from 0-239 (240 values being the largest multiple of 20
that can be represented in 8-bits). LLM = 0 position shall be aligned with MFAS = 0 position every
3840 (the least common multiple of 240 and 256) frame periods. The logical lane number can be
recovered from this value by a modulo 20 operation. Table C.2 and Figure C.3 illustrate how bytes
of the OTU4 are distributed in 16-byte increments across the 20 logical lanes.
The pattern repeats every 320 bytes until the end of the OTU4 frame.
The following OTU4 frame will use different lane assignment according to the LLM MOD 20.
- 179 -
The distribution of 16-byte blocks from the sequence of OTU4 frames is illustrated in Figure C.3:
The parallel lanes can be reassembled at the sink by first recovering framing on each of the parallel
lanes, then recovering the lane identifiers and then performing deskewing of the lanes. Frame
alignment, lane identifier recovery and multi-lane alignment should operate under 10-3 bit error rate
conditions before error correction. Refer to Recommendation G.798 for the specific processing
details.
The lane rotation mechanism will place the first 16 bytes of the OTU4 frame on each lane once per
40804 (i.e. 16320) bytes (the same as an OTU4 itself). The “LLM MOD 20” will be the same in
each FAS on a particular lane, which allows the lane to be identified. Since the LLM cycles through
240 distinct values, the lanes can be deskewed and reassembled by the receiver as long as the total
skew does not exceed 119 OTU4 frame periods (approximately 139 s). The receiver must use the
“LLM MOD 20” to identify each received lane, as lane positions may not be preserved by the
optical modules to be used for this application.
The lanes are identified, deskewed, and reassembled into the original OTU4 frame according to the
lane marker. The MFAS can be combined with the lane marker to provide additional skew detection
range, the maximum being up to the least common multiple “LCM(240, 256)/2 - 1” or 1919 OTU4
frame periods (approximately 2.241 ms). In mapping from lanes back to the OTU4 frame, the 6th
byte of each OTU4 frame which was borrowed for lane marking is restored to the value OA2.
Each physical lane of an OTM-0.4v4 interface is formed by simple bit multiplexing of five logical
lanes. At the sink, the bits are disinterleaved into five logical lanes from each physical lane. The
sink will identify each logical lane according to the lane marker in the LLM byte. The sink must be
able to accept the logical lanes in any position as the ordering of bit multiplexing on each physical
lane is arbitrary; the optical module hardware to be used for this application is permitted full
flexibility concerning which physical lane will be used for output of each logical lane, and the order
of bit multiplexing of logical lanes on each physical output lane.
NOTE – Ten lane IEEE 100GBASE-R interfaces are specified, although not with ITU-T physical layer
specifications. These interfaces may be compatible with a 10-lane interface for OTU4, each lane consisting
of two bit-multiplexed logical lanes. Refer to Appendix X.
- 180 -
Lane 18 289:304 609:624 16289:16304 273:288 1:16 (FAS) 16001:16016 305:320 16305:16320 289:304
Lane 19 305:320 625:640 16305:16320 289:304 17:32 16017:16032 1:16 (FAS) 16001:16016 305:320
Annex D
As only an integer number of n-bit data entities can be transported per server frame or multi-frame,
the integer value Cn(t) of cn has to be used. Since it is required that no client information be lost, the
rounding process to the integer value has to take care of the truncated part, e.g. a cn with a value of
10.25 has to be represented by the integer sequence 10,10,10,11.
f
Cn t int client Tserver [2]
n
Cn(t) : number of client n-bit data entities per server frame t or server multi-frame t (integer)
For the case cn is not an integer, Cn(t) will vary between:
f
Cn t floor client Tserver [3]
n
and
f f
Cn t ceiling client Tserver 1 floor client Tserver . [4]
n n
The server frame or multi-frame rate is defined by the server bit rate and the number of bits per
server frame or multi-frame:
Bserver
Tserver [5]
f server
f server : server bit rate
B server : bits per server frame or multi-frame
- 182 -
As the client data has to fit into the payload area of the server signal, the maximum value of C n and
as such the maximum client bit rate is limited by the size of the server payload area.
C n t Pserver [8]
Pserver
f client f server n [9]
Bserver
Pserver : maximum number of (n bits) data entities in the server payload area
The client and server bit rate are independent. This allows specifying the server bit rate
independently from the client bit rates. Furthermore client clock impairments are not seen at the
server clock.
If the client or server bit rate changes due to client or server frequency tolerances, c n and Cn(t)
change accordingly. A special procedure has to take care that Cn(t) is changed fast enough to the
correct value during start-up or during a step in the client bit rate (e.g. when the client signal is
replaced by its AIS signal or the AIS signal is replaced by the client signal). This procedure may be
designed to prevent buffer over-/underflow, or an additional buffer over-/underflow prevention
method has to be deployed.
A transparent mapping has to determine Cn(t) on a server (multi-)frame per (multi-)frame base.
In order to extract the correct number of client information entities at the demapper, Cn(t) has to be
transported in the overhead area of the server frame or multi-frame from the mapper to the
demapper.
Figure D.1 shows the generic functionality of the mapper and demapper circuit.
At the mapper Cn(t) is determined based on the client and server clocks. The client data is
constantly written into the buffer memory. The read out is controlled by the value of Cn(t).
At the demapper Cn(t) is extracted from the overhead. Cn(t) controls the write enable signal for the
buffer. The client clock is generated based on the server clock and the value of Cn(t).
Cn(t) has to be determined first, then it has to be inserted into the overhead and afterwards C n(t)
client data entities have to be inserted into the payload area of the server as shown in Figure D.2.
- 183 -
data
buffer server data buffer
OH
client data & Cn & client data
insertion server data OH write
determine Cn generate
read enable extraction enable client clock
Cn client clock
client clock
server clock
server clock
read read
control control
a) Mapper b) Demapper
OH Payload OH Payload
Area Area
determine Cn
OH Payload OH Payload
Area Area
insert Cn into OH extract Cn from OH
OH Payload insert Cn OH Payload extract Cn
Area client data Area client data
Mapper Demapper
Cn(t) client data entities are mapped into the payload area of the server frame or multi-frame using a
sigma/delta data/stuff mapping distribution. It provides a distributed mapping as shown in Figure
D.3. Payload field j (j = 1 .. Pserver) carries:
- client data (D) if (j Cn(t)) mod Pserver < Cn(t) [10]
- stuff (S) if (j Cn(t)) mod Pserver ≥ Cn(t). [11]
Payload Area
OH
client data
stuff
Cn(t) client data entities have to be distributed over Pserver locations. A client data entity has
P
therefore to be inserted with a spacing of server . This is normally not an integer value, however it
C n (t )
can be emulated by a integer calculation using the sigma-delta method based on an overflow
accumulator as shown in Figure D.4.
The accumulator memory is reset to 0 at every frame start of the server frame. At every location of
the payload area Cn(t) is added to the memory and the result is compared with Pserver. If the result is
lower than Pserver, it is stored back into the memory and no client data is indicated for this payload
position. If it is equal or greater than Pserver, Pserver is subtracted from the result and the new result is
stored back in the memory. In addition client data is indicated for the client position.
0
Pserver
Pserver? enable
client
data
indication memory payload area
= frame start
read/write
clock
enable
Cn(t)
As the same start value and Cn(t) are used at the mapper and demapper the same results are obtained
and interworking is achieved.
Pm ,server : maximum number of (m bits) data entities in the server payload area
In order to extract the correct number of client information entities at the demapper, Cm(t) has to be
transported in the overhead area of the server frame or multi-frame from the mapper to the
demapper.
At the mapper Cn(t) is determined based on the client and server clocks. The client data is
constantly written into the buffer memory. The read out is controlled by the value of Cm(t).
At the demapper Cm(t) and CnD(t) are extracted from the overhead and used to compute Cn(t). Cm(t)
controls the write enable signal for the buffer. The client clock is generated based on the server
clock and the value of Cn(t).
Cn(t) has to be determined first, then it has to be inserted into the overhead as C m(t) and CnD(t) and
afterwards Cm(t) client data entities have to be inserted into the payload area of the server as shown
in Figure D.5.
- 186 -
OH Payload OH Payload
Area Area
determine Cn
OH Payload OH Payload
Area Area
insert Cm and CnD into OH extract Cm and CnD from OH
OH Payload insert Cm OH Payload extract Cm
Area client data Area client data
Mapper Demapper
During start-up or during a step in the client bit rate the value of Cn(t) will not match the actual
number of n-bit client data entities arriving at the mapper buffer and the Cn(t) determination process
has to adjust its value to the actual number of n-bit client data entities arriving. This adjustment
method is implementation specific. During the mismatch period the mapper buffer fill level may
increase if more n-bit client data entities arrive per multiframe than there are transmitted, or
decrease if less n-bit client data entities arrive per multiframe than there are transmitted.
To prevent overflow or underflow of the mapper buffer and thus data loss, the fill level of the
mapper buffer has to be monitored. For the case too many m-bit client data entities are in the buffer
it is necessary to insert temporarily more m-bit client data entities in the server (multi-)frame(s)
than required by Cn(t). For the case too few m-bit client data entities are in the buffer it is necessary
to insert temporarily fewer m-bit client data entities in the server (multi-)frame(s) than required by
Cn(t). This behaviour is similar to the behaviour of AMP under these conditions.
The OTN supports a number of client signal types for which transfer delay (latency) and transfer
delay variation are critical parameters. Those client signal types require that the transfer delay
introduced by the mapper plus demapper buffers is minimized and that the delay variation
introduced by the mapper plus demapper buffers is minimized.
Cn(t) is a value in range Cn,min to Cn,max.
Cm(t) client data entities are mapped into the payload area of the server frame or multi-frame using
a sigma/delta data/stuff mapping distribution. It provides a distributed mapping as shown in Figure
D.2. Payload field j (j = 1 .. Pm,server) carries
- client data (D) if (j Cm(t)) mod Pm,server < Cm(t). [20]
- stuff (S) if (j Cm(t)) mod Pm,server ≥ Cm(t). [21]
Values of n, m, M, fclient, fserver, Tserver, Bserver, and Pm,server for LO OPU and ODTUk.ts
The values for n, m, M, fclient, fserver, Tserver, Bserver, and Pm,server are specified in Table D.1.
OPU1: 8 2 = 16 ODTU3.ts: 8 ts
OPU2: 8 8 = 64 ODTU4.ts: 8 ts
OPU3: 8 32 = 256
OPU4: 8 80 = 640
f client CBR client bit rate and tolerance LO ODUj bit rate and tolerance (Table
7-2)
f server OPUk Payload bit rate and tolerance ODTUk.ts Payload bit rate and tolerance
(Table 7-3) (Table 7-7)
Tserver ODUk/OPUk frame period (Table 7- OPUk multi-frame period (Table 7-6)
4)
B server OPU0: 8 15232 ODTU2.ts: 8 ts 15232
OPU1: 8 15232 ODTU3.ts: 8 ts 15232
OPU2: 8 15232 ODTU4.ts: 8 ts 15200
OPU3: 8 15232
OPU4: 8 15200
Pm , server OPU0: 15232 ODTU2.ts: 15232
OPU1: 7616 ODTU3.ts: 15232
OPU2: 1904 ODTU4.ts: 15200
OPU3: 476
OPU4: 190
C8D range OPU0: N/A ODTUk.1: N/A
OPU1: 0 to +1 ODTUk.2: 0 to +1
OPU2: 0 to +7 ODTUk.3: 0 to +2
OPU3: 0 to +31 ODTUk.4: 0 to +3
OPU4: 0 to +79 :
ODTUk.8: 0 to +7
:
ODTUk.32: 0 to +31
:
ODTUk.79: 0 to +78
ODTUk.80: 0 to +79
C1D range OPU0: 0 to +7 Not Applicable
(for selected OPU1: 0 to +15
clients) OPU2: 0 to +63
OPU3: 0 to +255
OPU4: 0 to +639
- When the value of the Cm(t) is incremented with +1 or +2, a subset of the Ci bits as
specified in Table D.2 is inverted and the Increment Indicator (II) bit is set to 1.
- When the value of the Cm(t) is decremented with -1 or -2, a subset of Ci bits as specified in
Table D.2 is inverted and the Decrement Indicator (DI) bit is set to 1.
- When the value of Cm(t) is changed with a value larger than +2 or -2, both the II and DI bits
are set to 1 and the Ci bits contain the new Cm(t) value. The CRC-8 verifies whether the
Cm(t) value has been received correctly, and provides optional single error correction.
- When the value of Cm(t) is unchanged, both the II and DI bits are set to 0.
Note
- I indicates Inverted Ci bit
- U indicates Unchanged Ci bit
The CRC-8 located in JC3 is calculated over the JC1 and JC2 bits. The CRC-8 uses the g(x) = x8 +
x3 + x2 + 1 generator polynomial, and is calculated as follows:
1) The JC1 and JC2 octets are taken in network octet order, most significant bit first, to form a
16-bit pattern representing the coefficients of a polynomial M(x) of degree 15.
2) M(x) is multiplied by x8 and divided (modulo 2) by G(x), producing a remainder R(x) of
degree 7 or less.
3) The coefficients of R(x) are considered to be an 8-bit sequence, where x7 is the most
significant bit.
4) This 8-bit sequence is the CRC-8 where the first bit of the CRC-8 to be transmitted is the
coefficient of x7 and the last bit transmitted is the coefficient of x0.
The demapper process performs steps 1-3 in the same manner as the mapper process. In the absence
of bit errors, the remainder shall be 0000 0000.
- 189 -
Determine the
required Cm
Y
Increment?
N Set II
N
Decrement?
Increment Y
N Y by 1?
New Cm?
Set DI Set +1 increment
N
Y pattern
Set +2 increment
Set II & DI Y pattern
Decrement
by 1?
Set +1 decrement
N
pattern
Set +2 decrement
pattern
Calculate &
insert
CRC-8
Insert into
JC1-JC3
bytes
Start
Hunt
0G 010
011 0G 1
110 G
1 1 10 1G
G
1 G
00 xB
10 01
10
xx
B
10 xB xx G
01
xx00G
xx11G
xx
00
x
x xxx
xxB xx
G
xx
xx
xx B xB
10 1001G
Hunt - C 00 01 Hunt - B 11 Hunt - A Hunt - D Hunt - E G Hunt - F
10 G
10
G
01 01G 01
00 10
01
01
00 G
10 0G
10
11 01
010
01
xx 11G
10
x x 0 01 G
1101G
0101G
xx1
xx
01
01 G
G
1 G
G
G
01
01
00
01 10
xx x1
x x 10 0 G
10
G
G
1G
1G
x
G 11
00 1G
G
G
10
10
11 0G
0110G
1110G
G
11
G
G
xx
xx x0
G
10
x
10 10
01 G
00
00
G
10 01
10 G
xx 00G
G
00
G
11
xx
1G
0G
110
G
011
1110G
10
0G
10
001
000
1G
accept
S+2 S+1 S-1 S-2
received C8
Syncronized
S+2: Count = C1-C14 after inverting C2, C3, C6, C7, C10, C11, & C14; S-1: Count = C1-C14 after inverting C2, C4, C6, C8, C10, C12, & C14;
Increment +2 for the next frame Decrement -1 for next frame
S+1: Count = C1-C14 after inverting C1, C3, C5, C7, C9, C11, & C13; S-2: Count = C1-C14 after inverting C1, C4, C5, C8, C9, C12, C13;
Increment +1 for the next frame Decrement -2 for next frame
Note that the state machine of Figure D.5 can also be used for off-line synchronization checking.
When the GMP sink has synchronized its Cm(t) value to the GMP source, it interprets the received
JC octets according to the following principles.
- When the CRC-8 is good and II = DI, the GMP sink accepts the received Cm(t) value.
- When the CRC-8 is good and II ≠ DI, the GMP sink compares the received Cm(t) value to
its expected Cm(t) value to determine the difference between these values. This difference
is compared to the bit inversion patterns of Table D.2 to determine the increment or
decrement operation sent by the source and updates its Cm(t) accordingly. Since the CRC-8
is good, the sink can use either JC1 or JC2 for this comparison.
- When the CRC-8 is bad, the GMP sink compares the received Cm(t) value to its expected
Cm(t) value. The sink then compares the difference between these values, per Table D.2, to
the valid bit inversion patterns in JC1, and the bit inversion, II and DI pattern in JC2.
- 191 -
- If JC1 contains a valid pattern and JC2 does not, the sink accepts the corresponding
increment or decrement indication from JC1 and updates its Cm(t) accordingly.
- If JC2 contains a valid pattern and JC1 does not, the sink accepts the corresponding
increment or decrement indication from JC2 and updates its Cm(t) accordingly.
- If both JC1 and JC2 contain valid patterns indicating the same increment or decrement
operation, this indication is accepted and the sink updates its Cm(t) accordingly.
- If neither JC1 nor JC2 contain valid patterns, the sink shall keep its current count value
and begin the search for synchronization.
NOTE: If JC1 and JC2 each contain valid patterns that are different from each other, the
receiver can either keep the current Cm(t) value and begin a synchronization search, or it can
use the CRC-8 to determine whether JC1 or JC2 contains the correct pattern.
The GMP sink uses the updated Cm(t) value to extract the client data from the next LO OPU frame
or ODTUk.ts multi-frame.
D.4 CnD(t) encoding and decoding
The cumulative value of CnD(t) (CnD(t)) is encoded in bits 4-8 of the LO OPUk and ODTUk.ts
Justification Control bytes JC4, JC5 and JC6. Bits D1 to D10 in JC4 and JC5 carry the value of
CnD(t). Bit D1 carries the most significant bit and bit D10 carries the least significant bit.
The CRC-5 located in JC6 is calculated over the D1-D10 bits in JC4 and JC5. The CRC-5 uses the
g(x) = x5 + x + 1 generator polynomial, and is calculated as follows:
1) The JC4 bits 4-8 and JC5 bits 4-8 octets are taken in network transmission order, most
significant bit first, to form a 10-bit pattern representing the coefficients of a polynomial
M(x) of degree 9.
2) M(x) is multiplied by x5 and divided (modulo 2) by G(x), producing a remainder R(x) of
degree 4 or less.
3) The coefficients of R(x) are considered to be an 8-bit sequence, where x4 is the most
significant bit.
4) This 5-bit sequence is the CRC-5 where the first bit of the CRC-5 to be transmitted is the
coefficient of x4 and the last bit transmitted is the coefficient of x0.
The demapper process performs steps 1-3 in the same manner as the mapper process. In the absence
of bit errors, the remainder shall be 00000.
A parallel logic implementation of the source CRC-5 is illustrated in Appendix IX.
- 192 -
Appendix I
Clause 17.1 describes asynchronous and bit synchronous mappings of CBR2G5, CBR10G, and
CBR40G clients with 20 ppm bit-rate tolerance into ODU1, 2, and 3, respectively. Clause 19
describes asynchronous mapping (multiplexing) of ODUj into ODUk (k > j). For asynchronous
CBR client mappings, any frequency difference between the client and local OPUk server clocks is
accommodated by the +1/0/–1 justification scheme. For asynchronous multiplexing of ODUj into
ODUk (k > j), any frequency difference between the client ODUj and local OPUk server clocks is
accommodated by the +2/+1/0/–1 justification scheme. The OPUk payload, ODUk, and OTUk bit
rates and tolerances are given in 7.2. The ODU1, ODU2, and ODU3 rates are 239/238, 239/237,
and 239/236 times 2 488 320 kbit/s, 9 953 280 kbit/s, and 39 813 120 kbit/s, respectively. The
ODUk bit-rate tolerances are 20 ppm. This appendix shows that each justification scheme can
accommodate these bit rates and tolerances for the respective mappings, and also derives the range
of justification (stuff) ratio for each mapping.
The +1/0/–1 mapping in 17.1 provides for one positive justification opportunity (PJO) and one
negative justification opportunity (NJO) in each ODUk frame. The +2/+1/0/–1 mapping in
clause 19 provides for 2 PJOs and one NJO in each ODUk frame. For the case of ODU
multiplexing (i.e., the latter case), the ODUj being mapped will get only a fraction of the full
payload capacity of the ODUk. There can be, in general, a number of fixed stuff bytes per ODUj or
CBR client. Note that in both mapping cases, there is one stuff opportunity in every ODUk frame.
For mapping of a CBR client into ODUk, the CBR client is allowed to use all the stuff opportunities
(because only one CBR client signal is mapped into an ODUk). However, for mapping ODUj into
ODUk (k > j), the ODUj can only use 1/2 (ODU0 into ODU1), 1/4 (ODU1 into ODU2 or ODU2
into ODU3) or 1/16 (ODU1 into ODU3) of the stuff opportunities. The other stuff opportunities are
needed for the other clients being multiplexed into the ODUk.
Traditionally, the justification ratio (stuff ratio) for purely positive justification schemes is defined
as the long-run average fraction of justification opportunities for which a justification is done
(i.e., for a very large number of frames, the ratio of the number of justifications to the total number
of justification opportunities). In the +1/0/–1 scheme, positive and negative justifications must be
distinguished. This is done by using different algebraic signs for positive and negative justifications.
With this convention, the justification ratio can vary at most (for sufficiently large frequency
offsets) from –1 to +1 (in contrast to a purely positive justification scheme, where justification ratio
can vary at most from 0 to 1). In the case of ODUk multiplexing, the justification ratio is defined
relative to the stuff opportunities available for the client in question. Then, the justification ratio can
vary (for sufficiently large frequency offsets) from –1 to +2. (If the justification ratio were defined
relative to all the stuff opportunities for all the clients, the range would be -1/2 to +1 for
multiplexing ODU0 into ODU1, –1/4 to +1/2 for multiplexing ODU1 into ODU2 and ODU2 into
ODU3, and –1/16 to +1/8 for multiplexing ODU1 into ODU3.)
Let α represent justification ratio (1 α 1 for CBR client into ODUk mapping; –2 α 1 for
ODUj into ODUk mapping (k > j)), and use the further convention that positive will correspond
to negative justification and negative to positive justification (the reason for this convention is
explained below).
- 193 -
Define the following notation (the index j refers to the possible ODUj client being mapped, and the
index k refers to the ODUk server layer into which the ODUj or CBR client is mapped):
N = number of fixed stuff bytes in the OPUk payload area associated with the client in
question (note that this is not the total number of fixed stuff bytes if multiple clients
are being multiplexed)
S = nominal STM-N or ODUj client rate (bytes/s)
T = nominal ODUk frame period(s)
yc = client frequency offset (fraction)
ys = server frequency offset (fraction)
p = fraction of OPUk payload area available to this client
Nf = average number of client bytes mapped into an ODUk frame, for the particular
frequency offsets (averaged over a large number of frames)
Then Nf is given by:
1 yc
N f ST (I-1)
1 ys
For frequency offsets small compared to 1, this may be approximated:
N f ST (1 yc ys ) ST (I-2)
The quantity –1 is the net frequency offset due to client and server frequency offset.
Now, the average number of client bytes mapped into an ODUk frame is also equal to the total
number of bytes in the payload area available to this client (which is (4)(3808)p = 15232p), minus
the number of fixed stuff bytes for this client (N), plus the average number of bytes stuffed for this
client over a very large number of frames. The latter is equal to the justification ratio multiplied
by the fraction of frames p corresponding to justification opportunities for this client. Combining
this with equation I-1 produces:
ST p 15232 p N (I-3)
In equation I-3, a positive corresponds to more client bytes mapped into the ODUk, on average.
As indicated above, this corresponds to negative justification. This sign convention is used so that
enters in equation I-3 with a positive sign (for convenience).
Equation I-3 is the main result. For mapping STM-N (CBR clients) into ODUk, the quantity p is 1.
The range of stuff ratio may now be determined for mapping STM-N or ODUj clients into ODUk,
using equation I-3. In what follows, let R16 be the STM-16 rate, i.e., 2.48832 Gbit/s = 3.1104 108
bytes/s.
Asynchronous mapping of CBR2G5 (2 488 320 kbit/s) signal into ODU1
The nominal client rate is S = R16. The nominal ODU1 rate is (239/238)S (see 7.3). But the nominal
ODU1 rate is also equal to (4)(3824)/T. Then:
238
ST (4)(3824) 15232 (I-4)
239
Inserting this into equation I-3, and using the fact that N = 0 (no fixed stuff bytes) for this mapping
produces
15232( 1) (I-5)
- 194 -
Since the ODUk and client frequency tolerances are each 20 ppm, ranges from 0.99996 to
1.00004. Using this in equation I-5 gives as the range of :
0.60928 0.60928 (I-6)
Asynchronous mapping of CBR10G (9 953 280 kbit/s) signal into ODU2
The nominal client rate is S = 4R16. The nominal ODU2 rate is (239/237)S (see 7.3). But the
nominal ODU2 rate is also equal to (4)(3824)/T. Then:
237
ST (4)(3824) 15168 (I-7)
239
Inserting this into equation I-3, and using the fact that N = 64 (number of fixed stuff bytes) for this
mapping produces:
15168 64 15232 15168( 1) (I-8)
As before, the ODUk and client frequency tolerances are 20 ppm, and ranges from 0.99996 to
1.00004. Using this in equation I-8 gives as the range of :
0.60672 0.60672 (I-9)
Asynchronous mapping of CBR40G (39 813 120 kbit/s) signal into ODU3
The nominal client rate is S = 16R16. The nominal ODU3 rate is (239/236)S (see 7.3). But the
nominal ODU3 rate is also equal to (4)(3824)/T. Then:
236
ST (4)(3824) 15104 (I-10)
239
Inserting this into equation I-3, and using the fact that N = 128 (number of fixed stuff bytes) for this
mapping produces:
15104 128 15232 15104( 1) (I-11)
As before, the ODUk and client frequency tolerances are 20 ppm, and ranges from 0.99996 to
1.00004. Using this in equation I-11 gives as the range of :
0.60416 0.60416 (I-12)
ODU1 into ODU2 multiplexing
The ODU1 nominal client rate is (see 7.3):
239
S R16 (I-13)
238
The ODU2 nominal frame time is:
(3824)(4)
T (I-14)
239
(4 R16 )
237
The fraction p is 0.25. Inserting into equation I-3 produces:
239 (3824)(4)
R16 3808 N (I-15)
238 239 4
(4 R16 )
237
- 195 -
offsets are in the range 20 ppm, as given in 7.3. Then, the net frequency offset y is in the range
40 ppm. Inserting these values into equation I-23 gives for the range for :
0.0691740 for y 40 ppm
0.5400844 for y 0 ppm (I-24)
1.149343 for y 40 ppm
In addition, stuff ratios of –2 and +1 are obtained for frequency offsets of –95.85 ppm and
101.11ppm, respectively. As above, the range of frequency offset that can be accommodated is
approximately 197 ppm, which is 50% larger than the range that can be accommodated by
a +1/0/–1 justification scheme (see above) due to the additional positive stuff byte.
ODU1 into ODU3 multiplexing
The ODU1 nominal client rate is (see 7.3):
239
S ( R16 ) (I-25)
238
The ODU3 nominal frame time is:
(3824)(4)
T (I-26)
239
(16R16 )
236
The fraction p is 0.0625. Inserting into equation I-3 produces:
239 (3824)(4)
R16 952 N (I-27)
238 239 16
(16R16 )
236
Simplifying and solving for produces:
236
(15296) 16 N 15232 (I-28)
238
As before, let = 1 + y, where y is the net frequency offset (and is very nearly equal to yc – ys for
client and server frequency offset small compared to 1). Then:
236 236
(15296 ) 15232 16 N (15296 ) y
238 238 (I-29)
16 N 64 .5378151 15167 .462185 y
The total number of fixed stuff bytes in the ODU3 payload is 64, as given in 19.5.2; the number for
one ODU1 client, N, is therefore 4. The client and mapper frequency offsets are in the range
20 ppm, as given in 7.3. Then, the net frequency offset y is in the range 40 ppm. Inserting these
values into equation I-29 gives for the range for :
0.0688834 for y 40 ppm
0.5378151 for y 0 ppm (I-30)
1.144514 for y 40 ppm
In addition, stuff ratios of –2 and +1 are obtained for frequency offsets of –96.40 ppm and
101.39 ppm, respectively. As above, the range of frequency offset that can be accommodated is
approximately 197 ppm, which is 50% larger than the range that can be accommodated by
- 197 -
a +1/0/–1 justification scheme (see above) due to the additional positive stuff byte.
ODU0 into ODU1 multiplexing
The ODU0 nominal client rate is (see 7.3):
1
S ( R16 ) (I-31)
2
The ODU1 nominal frame time is:
(3824)(4)
T (I-32)
239
( R16 )
238
The fraction p is 0.5. Inserting into equation I-3 produces:
1 (3824)(4)
R16 7616 N (I-33)
2 239 2
( R16 )
238
Simplifying and solving for produces:
238
(15296) 2 N 15232 (I-34)
239
As before, let = 1 + y, where y is the net frequency offset (and is very nearly equal to yc – ys for
client and server frequency offset small compared to 1). Then:
238 238
(15296 ) 15232 2 N (15296 ) y
239 239 (I-35)
2 N 15232 y
The total number of fixed stuff bytes N is zero, as given in 19.5.4. The client and mapper frequency
offsets are in the range 20 ppm, as given in 7.3. Then, the net frequency offset y is in the range
40 ppm. Inserting these values into equation I-35 gives for the range for :
0.6092800 for y 40 ppm
0.0000000 for y 0 ppm (I-36)
0.6092800 for y 40 ppm
In addition, stuff ratios of –2 and +1 are obtained for frequency offsets of -130 ppm and 65 ppm,
respectively. As above, the range of frequency offset that can be accommodated is approximately
195 ppm.
- 198 -
Appendix II
This appendix provides examples of functionally standardized OTU frame structures. These
examples are for illustrative purposes and by no means imply a definition of such structures. The
completely standardized OTUk frame structure as defined in this Recommendation is shown in
Figure II.1. Functionally standardized OTUkV frame structures will be needed to support, e.g.,
alternative FEC. Examples of OTUkV frame structures are:
• OTUkV with the same overhead byte allocation as the OTUk, but use of an alternative FEC
as shown in Figure II.2;
• OTUkV with the same overhead byte allocation as the OTUk, but use of a smaller,
alternative FEC code and the remainder of the OTUkV FEC overhead area filled with fixed
stuff as shown in Figure II.3;
• OTUkV with a larger FEC overhead byte allocation as the OTUk, and use of an alternative
FEC as shown in Figure II.4;
• OTUkV with no overhead byte allocation for FEC as shown in Figure II.5;
• OTUkV with a different frame structure than the OTUk frame structure, supporting a
different OTU overhead (OTUkV overhead and OTUkV FEC) as shown in Figure II.6;
• OTUkV with a different frame structure than the OTUk frame structure, supporting a
different OTU overhead (OTUkV overhead) and with no overhead byte allocation for FEC
as shown in Figure II.7.
Column #
1 .... 14 15 16 17 3824 3825 .... 4080
1 FA OH OTUk OH Row 1 RS(255,239) FEC redundancy
Row #
Column #
1 .... 14 15 16 17 3824 3825 .... 4080
1 FA OH OTUk OH
Row #
2
OPUk OTUkV FEC
3 ODUk OH
4
Column #
1 .... 14 15 16 17 3824 3825 .... 4080
1 FA OH OTUk OH
Row #
2 Fixed stuff
OPUk OTUkV FEC
3 ODUk OH (All-0s)
4
Figure II.3/G.709/Y.1331 OTUk with a smaller OTUkV FEC and remainder of FEC area
filled with fixed stuff
Column #
1 .... 14 15 16 17 3824 3825 .... x
1 FA OH OTUk OH
Row #
2
OPUk OTUkV FEC
3 ODUk OH
4
Column #
1 .... 14 15 16 17 .... 3824
1 FA OH OTUk OH
Row #
2
OPUk
3 ODUk OH
4
Column #
1 .... X1 X1 + 1 .... X1 + X2 X1 + X2 + 1 .... X1 + X2 + X3
1
Row #
Column #
1 .... X1 X1 + 1 .... X1 + X2
1
Row #
OTUkV overhead
OTUkV payload = ODUk
(Y X1 bytes)
Y
Figure II.7/G.709/Y.1331 OTUkV with different frame structure and without FEC area
- 200 -
For the case of Figure II.6 and Figure II.7, the mapping of the ODUk signal can be either
asynchronous, bit synchronous, or frame synchronous.
For the case of an asynchronous mapping, the ODUk and OTUkV bit rates can be asynchronous.
The ODUk signal is mapped as a bit stream into the OTUkV payload area using a stuffing
technique.
For the case of a bit synchronous mapping, the ODUk and OTUkV bit rates are synchronous. The
ODUk signal is mapped into the OTUkV payload area without stuffing. The ODUk frame is not
related to the OTUkV frame.
For the case of a frame synchronous mapping, the ODUk and OTUkV bit rates are synchronous and
the frame structures are aligned. The ODUk signal is mapped into the OTUkV payload area without
stuffing and with a fixed position of the ODUk frame within the OTUkV frame. (See Figure II.8.)
Column
1 X1 X1+1 X1+X2 X1+X2+1 X1+X2+X3
Row
1
1 14 15 16 17 3824
OPUk overhead
1 FA OH
2 ODUk payload
3 ODUk overhead (4 × 3808 bytes)
4
G.709/Y.1331_FII.8
Appendix III
Figure III.1 illustrates the multiplexing of four ODU1 signals into an ODU2. The ODU1 signals
including the Frame Alignment Overhead and an all-0s pattern in the OTUk overhead locations are
adapted to the ODU2 clock via justification (asynchronous mapping). These adapted ODU1 signals
are byte interleaved into the OPU2 payload area, and their justification control and opportunity
signals (JC, NJO) are frame interleaved into the OPU2 overhead area.
ODU2 overhead is added after which the ODU2 is mapped into the OTU2 [or OTU2V]. OTU2
[or OTU2V] Overhead and Frame Alignment Overhead are added to complete the signal for
transport via an OTM signal.
Alignm
OPU1 OH
Client layer signal
ODU1 (e.g., STM-16, ATM, GFP)
ODU1 OH
4x
Alignm
Alignm
OPU2 OH
Alignm
Alignm
OPU1 OH
OTU2
Alignm OH
Alignm
Alignm
OPU2 OH
Alignm
OTU2 Alignm OTU2
OPU1 OH
NOTE – The ODU1 floats in ¼ of the OPU2 payload area. An ODU1 frame will cross multiple ODU2 frame boundaries.
A complete ODU1 frame (15296 bytes) requires the bandwidth of (15296/3808 = ) 4.017 ODU2 frames. This is not illustrated.
Figure III.2 illustrates the multiplexing of two ODU0 signals into an ODU1. The ODU0 signals
including the Frame Alignment Overhead and an all-0s pattern in the OTUk overhead locations are
adapted to the ODU1 clock via justification (asynchronous mapping). These adapted ODU0 signals
are byte interleaved into the OPU1 payload area, and their justification control and opportunity
signals (JC, NJO) are frame interleaved into the OPU1 overhead area and ODU1 overhead is added.
Alignm
OPU0 OH
ODU0 Client Layer Signal
ODU0 OH
2x
Alignm
OPU1 OH
OPU0 OH
Alignm Client Layer Signal
ODU1 (GFP-T encapsulated 1GE)
OPU0 OH
ODU1 OH
ODU1 OH ODU0 OH
Client Layer Signal
NOTE - The ODU0 floats in 1/2 of the OPU1 Payload area. An ODU0
frame will cross multipleODU1 frame boundaries. A complete ODU0 frame
(15296 bytes) requires the bandwidth of one TribSlot in (15296/7616 = )
2.008 ODU1 frames. This is not illustrated.
ODU1
OPU1 OH
with OPU1 TT T TT T TT
Tributary SS S SS S SS
Slots ODU1 OH 121212 12
TS1, TS2
NOTE - The OPU1 OH contains 1 column of justification control and
opportunity overhead for each of the 2 tribuary slots in a 2-frame
multiframe format. This is not illustrated.
Appendix IV
When an OPU3 transports 16 ODU1 signals, columns 1905 to 1920 of the OPU3 contain fixed
stuff; one fixed stuff column for each of the 16 ODU1 signals.
Column
1904
1905
1919
1920
1921
3808
3809
3823
3824
31
32
33
Row 1 16 17
1
OPU3 TribSlot 15
OPU3 TribSlot 16
FF 15
OPU3 TribSlot 16
OPU3 TribSlot 15
OPU3 TribSlot 16
OPU3 TribSlot 1
F TribSlot 1
OPU3 TribSlot 1
OPU3 TribSlot
2 OPU3 payload OPU3 payload
U
ST
JOH
transporting transporting
ED
3 16 ODU1 16 ODU1
OPU3
IX
PSI
4
G.709/Y.1331_FIV.1
Figure IV.1/G.709/Y.1331 – Fixed stuff locations when mapping 16 × ODU1 into OPU3
Appendix VI
The following figures present four examples of ODU1 and ODU2 carriage within an OPU3 and the
associated MSI encoding.
1 2 3 4 5 6 7 8
PSI[2] 00 000000 TS1
PSI[3] 00 000001 TS2
PSI[4] 00 000010 TS3
PSI[5] 00 000011 TS4
PSI[6] 00 000100 TS5
PSI[7] 00 000101 TS6
PSI[8] 00 000110 TS7
PSI[9] 00 000111 TS8
PSI[10] 00 001000 TS9
PSI[11] 00 001001 TS10
PSI[12] 00 001010 TS11
PSI[13] 00 001011 TS12
PSI[14] 00 001100 TS13
PSI[15] 00 001101 TS14
PSI[16] 00 001110 TS15
PSI[17] 00 001111 TS16
1 2 3 4 5 6 7 8
PSI[2] 01 000000 TS1
PSI[3] 01 000001 TS2
PSI[4] 01 000010 TS3
PSI[5] 01 000011 TS4
PSI[6] 01 000000 TS5
PSI[7] 01 000001 TS6
PSI[8] 01 000010 TS7
PSI[9] 01 000011 TS8
PSI[10] 01 000000 TS9
PSI[11] 01 000001 TS10
PSI[12] 01 000010 TS11
PSI[13] 01 000011 TS12
PSI[14] 01 000000 TS13
PSI[15] 01 000001 TS14
PSI[16] 01 000010 TS15
PSI[17] 01 000011 TS16
1 2 3 4 5 6 7 8
PSI[2] 01 000000 TS1
PSI[3] 01 000001 TS2
PSI[4] 01 000001 TS3
PSI[5] 01 000010 TS4
PSI[6] 01 000000 TS5
PSI[7] 01 000011 TS6
PSI[8] 01 000011 TS7
PSI[9] 01 000011 TS8
PSI[10] 01 000000 TS9
PSI[11] 01 000000 TS10
PSI[12] 01 000001 TS11
PSI[13] 01 000001 TS12
PSI[14] 01 000011 TS13
PSI[15] 01 000010 TS14
PSI[16] 01 000010 TS15
PSI[17] 01 000010 TS16
1 2 3 4 5 6 7 8
PSI[2] 01 000000 TS1
PSI[3] 00 000001 TS2
PSI[4] 00 000010 TS3
PSI[5] 01 000001 TS4
PSI[6] 01 000000 TS5
PSI[7] 00 000101 TS6
PSI[8] 00 000110 TS7
PSI[9] 01 000001 TS8
PSI[10] 01 000000 TS9
PSI[11] 01 000001 TS10
PSI[12] 00 001010 TS11
PSI[13] 00 001011 TS12
PSI[14] 01 000000 TS13
PSI[15] 00 001101 TS14
PSI[16] 00 001110 TS15
PSI[17] 01 000001 TS16
Appendix VII
VII.1 Introduction
IEEE 40GBASE-R and 100GBASE-R interfaces currently being specified by the IEEE P802.3ba
task force will be parallel interfaces intended for short-reach (up to 40km) interconnection of
Ethernet equipment. This Appendix describes the process of converting the parallel format of these
interfaces into a serial bit stream to be carried over OTN.
The order of transmission of information in all the diagrams in this Appendix is first from left to
right and then from top to bottom.
VII.2 Clients signal format
40GBASE-R and 100GBASE-R clients are initially parallel interfaces, but in the future may be
serial interfaces. Independent of whether these interfaces are parallel or serial, or what the parallel
interface lane count is, 40GBASE-R signals are comprised of four PCS lanes and 100GBASE-R
signals are comprised of twenty PCS lanes. If the number of physical lanes on the interface is fewer
than the number of PCS lanes, the appropriate number of PCS lanes are bit-multiplexed onto each
physical lane of the interface. Each PCS lane consists of 64B/66B encoded data with a PCS lane
alignment marker inserted on each lane once per 16384 66-bit blocks. The PCS lane alignment
marker itself is a special format 66B codeword.
The use of this adaptation for 40GBASE-R into OPU3 also applies the transcoding method which
appears in Annex B and the framing method which appears in Appendix VIII. The adaptation
described in this Appendix alone can be used for adaptation of 100GBASE-R into OPU4.
- 206 -
1 Lane Marker 1
2 Lane Marker 2
: :
p Lane Marker p
p +1
p x 16383
66B blocks
p x 16384
Lane Marker 1
Lane Marker 2
:
Lane Marker p
p x 16383
66B blocks
After 64B/66B block lock recovery per the state diagram in Figure 49-12 [IEEE 802.3] (or Figure
82-10 IEEE 802.3ba D2.2), these 66B blocks are re-distributed to PCS lanes at the egress interface.
The 66B blocks (including PCS lane alignment markers) resulting from the decoding process are
distributed round-robin to PCS lanes. If the number of PCS lanes is greater than the number of
physical lanes of the egress interface, the appropriate numbers of PCS lanes are bit-multiplexed
onto the physical lanes of the egress interface.
VII.3.1 40GBASE-R client frame recovery
PCS Lane Alignment Markers have the values shown in Table VII.1 for 40GBASE-R signals which
use PCS lane numbers 0-3. Note that these values will need to be aligned with the published IEEE
802.3ba amendment once it is approved.
Since 40GBASE-R client signal must be transcoded into 1024B/1027B for rate reduction, the
64B/66B PCS receive process at the ingress interface further descrambles the bit-stream skipping
sync headers and PCS lane alignment markers, and the 64B/66B PCS transmit process at the egress
interface scrambles the bit-stream again skipping sync headers and PCS lane alignment markers, as
shown in Figure VII.1.
VII.3.2 100GBASE-R client frame recovery and BIP-8 handling
PCS Lane Alignment Markers have the values shown in Table VII.2 for 100GBASE-R signals
which use PCS lane numbers 0-19. Note that these values will need to be aligned with the published
IEEE 802.3ba amendment once it is approved.
In case of end-to-end path monitoring the lane alignment markers transported over the OPU4 are
distributed unchanged to the PCS lanes. In the case of section monitoring the lane alignment
markers are located as defined in state diagram in figure 82-11 of IEEE 802.3ba D2.2 and the BIP-8
is newly calculated for each PCS lane as defined in clause 82.2.8 of IEEE 802.3ba D2.2. This value
overwrites BIP3 and the complement overwrites BIP7.
9 10 0x68, 0xc9, 0xfb, BIP3, 0x97, 0x36, 0x04, BIP7 19 10 0xc0, 0xf0, 0xe5, BIP3, 0x3f, 0x0f, 0x1a, BIP7
0 1 3 4 5 6 7 8 11 12 15
FC POS 0 1 0 0 M0
16 23 24 31
M1 M2
32 39 40 47
48 55 56 63
the original received lane alignment marker and before transcoding. Figure VII.2 shows the byte
location of the OTN BIP-8 in the transcoded lane marker.
The transcoded lane marker is transmitted together with the transcoded data blocks over the OTN
section as defined in Annex B. At the OTN egress after trans-decoding and before scrambling, the
ingress alignment marker is recreated using M0, M1, M2 and ingress BIP3 of the transcoded
alignment marker followed by the bit-wise inversion of these bytes. This recreated alignment
marker together with the trans-decoded and unscrambled data blocks is used to calculate the
expected OTN BIP-8 for each PCS lane (refer to clause 82.2.8 of IEEE 802.3ba D2.2). The
expected value will be XORed with the received OTN BIP-8. This error mask will have a "1" for
each bit of the OTN BIP-8 which is wrong, and a "0" for each bit which is correct.
The egress BIP3 for each PCS lane is calculated over the trans-decoded and scrambled data blocks
including the trans-decoded alignment marker (refer to Clause VII.4) following the process depicted
in clause 82.2.8 of IEEE 802.3ba D2.2. This is the value that is transmitted in case of section
monitoring.
When provisioned for end-to-end path monitoring, the egress BIP3 is then adjusted for the errors
that occurred up to the OTN egress by first XORing with the PCS BIP-8 error mask and then
XORing with the OTN BIP-8 error mask.
The BIP7 is created by bit-wise inversion of the adjusted BIP3.
VII.4.2 Errors detected by mapper
Errors encountered before the mapper, such as loss of client signal on any physical lane of the
interface, will result in the insertion of an Ethernet LF sequence ordered set prior to this process.
The same action should be taken as a result of failure to achieve 66B block lock on any PCS lane,
failure to achieve lane alignment marker framing on each PCS lane, or failure to deskew because
the skew exceeds the buffer available for deskew.
An invalid 66B block will be converted to an error control block before transcoding or direct
adaptation. An invalid 66B block is one which does not have a sync header of "01" or "10", or one
which has a sync header of "10" and a control block type field which does not appear in Figure B.2
(and for 40GBASE-R and 100GBASE-R, is not a valid PCS lane alignment marker). An error
control block has sync bits of "10", a block type code of 0x1e, and 8 seven-bit /E/ error control
characters. This will prevent the Ethernet receiver from interpreting a sequence of bits containing
this error as a valid packet.
Appendix VIII
Improved Robustness for mapping of 40GBASE-R into OPU3 using 1027B code
blocks
VIII.1 Introduction
When a parallel 40GBASE-R signal is transcoded per Annex B and directly mapped into OPU3
without GFP framing, another method is needed to locate the start of 513B blocks and to provide
protection to prevent that bit errors create an unacceptable increase in mean time to false packet
acceptance (MTTFPA).
- 211 -
Figure VIII.1/G.709/Y.1331 – Flag parity bit on two 513B blocks (1027B code)
The flag bit parity creates a sequence that can be used for framing to locate the 513B blocks in a
stream of bits. The state diagram of Figure 49-12 of [IEEE 802.3] is applied to locate a 3-bit pattern
appearing once per 1027 bits (rather than a 2-bit pattern appearing once per 66 bits) where four out
of eight 3-bit sequences (rather than two out of four two-bit values as used in IEEE 802.3) match
the pattern. The additional step required is to scramble the non-flag or flag parity bits so that the
legal sequences of these bits are not systematically mimicked in the data itself. The scrambler to be
used for this purpose is the Ethernet self-synchronous scrambler using the polynomial G(x) = 1 +
x39 +x58.
At the demapper, invalid flag bit parity will cause both of the 513B blocks across which the flag bit
parity applies to be decoded as 8 2 66B error control blocks (“10” sync header, control block type
0x1e, followed by eight 7-bit /E/ control characters).
VIII.3 66B block sequence check
Bit error corruption of the position or flag continuation bits could cause 66B blocks to be demapped
from 513B code blocks in the incorrect order. Additional checks are performed to prevent that this
results in incorrect packet delineation. Since detectable corruption normally means that the proper
order of 66B blocks to construct at the decoder cannot be reliably determined, if any of these checks
fail, the decoder will transmit eight 66B error control blocks (sync=”10”, control block type=0x1e,
and eight 7-bit /E/ control characters).
Other checks are performed to reduce the probability that invalid data is delivered at the egress in
the event that bit errors have corrupted any of the POS fields or flag continuation bits “FC”.
- 212 -
If the Flag bit “F” is 1 (i.e., the 513B block includes at least one 64B/66B control block), for the
rows of the table up until the first one with a flag continuation bit of zero (the last one in the block),
it is verified that no two 66B control blocks or lane alignment markers within that 513B block have
the same value in the POS field, and further, that the POS field values for multiple control or lane
alignment rows are in ascending order, which will always be the case for a properly constructed
513B block. If this check fails, the 513B block is decoded into eight 66B error control blocks.
The next check is to ensure that the block sequence corresponds to well-formed packets, which can
be done according to the state diagram in Figures VIII.2 and VIII.3. This check will determine if
66B blocks are in an order that does not correspond to well-formed packets, e.g., if during an IPG
an all-data 66B block is detected without first seeing a control block representing packet start, or if
during a packet a control/idle block is detected without first seeing a control block representing
packet termination, control blocks have likely been misordered by corruption of either the POS bits
or a flag continuation bit. Failure of this check will cause the 513B block to be decoded as eight
66B error control blocks. Note that PCS lane alignment markers are accepted in either state and do
not change state as shown in Figure VIII.3.
The sequence of PCS lane alignment markers is also checked at the decoder. For an interface with p
PCS lanes, the PCS lane alignment markers for lanes 0 through p-1 will appear in a sequence,
followed by 16383p non-lane-marker 66B blocks, followed by another group of PCS lane
alignment markers. A counter is maintained at the decoder to keep track of when the next group of
lane alignment markers is expected. If, in the process of decoding lane alignment markers from a
513B block, a lane alignment marker is found in a position where it is not expected, or a lane
alignment marker is missing in a position where it would have been expected, the entire 513B block
is decoded as eight 66B error control blocks as shown in Figures VIII.2, VIII.3, and VIII.4.
VIII.3.1 State diagram conventions
The body of this subclause is comprised of state diagrams, including the associated definitions of
variables, constants, and functions. Should there be a discrepancy between a state diagram and
descriptive text, the state diagram prevails.
The notation used in the state diagrams follows the conventions of 21.5 of [IEEE802.3]. State
diagram timers follow the conventions of 14.2.3.2 of [IEEE802.3]. The notation ++ after a counter
or integer variable indicates that its value is to be incremented.
VIII.3.2 State variables
VIII.3.2.1 Constants
EBLOCK_T<65:0>
66 bit vector to be sent to the PCS containing /E/ in all the eight character locations
Mi<65:0>
66 bit vector containing the transcoded alignment marker of i-th PCS lane (0<i<= p). (p=4
for 40GBASE-R, and p=20 for 100GBASE-R).
VIII.3.2.2 Variables
1027B_block_lock
Indicates the state of the block_lock variable when the state diagram of Figure 49-12 of
[IEEE 802.3] is applied to locate a 3-bit pattern appearing once per 1027 bits (rather than a
2-bit pattern appearing once per 66 bits) as described in VIII.2. Set true when sixty-four
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contiguous 1027-bit blocks are received with valid 3-bit patterns, set false when sixteen
1027-bit blocks with invalid 3-bit patterns are received before sixty-four valid blocks.
1027B_high_ber
Indicates Boolean variable when the state diagram of Figure 49-13 of [IEEE802.3] is
applied to count invalid 3-bit sync headers of 1027-bit blocks (rather than 2-bit sync
headers of 66-bit blocks) within the current 250 μs (rather than 125 μs). Set true when the
ber_cnt exceeds 8 (rather than 16) indicating a bit error ratio >10–4
Mseq_violation
Indicates Boolean variable that is set and latched in each rx513_raw<527:0> PCS lane
alignment marker cycle based on the PCS lane marker position and order. It is true if the
unexpected marker sequence is detected and false if not.
POS_violation
Boolean variable that is set in each rx513_raw<527:0> based on the POS field values for
rx_tcd<65:0>. It is true if the two or more have the same POS values or if they are not in
ascending order, and false if their POS values are in ascending order.
reset
Boolean variable that controls the resetting of the PCS. It is true whenever a reset is
necessary including when reset is initiated from the MDIO, during power on, and when the
MDIO has put the PCS into low-power mode.
Rx513_coded<512:0>
Vector containing the input to the 512B/513B decoder.
rx513_raw<527:0>
Vector containing eight successive 66 bit vectors (tx_coded)
rx_tcd<65:0>
66 bit vector transcode-decoded from a 513 bit block following the rules shown in Figure
B.5.
seq_violation
Boolean variable that is set in each rx513_raw<527:0> based on the sequence check on a
rx_tcd<65:0> stream. It is true if the unexpected sequence is detected and false if not.
VIII.3.2.3 Functions
DECODE(rx513_coded<512:0>)
Decodes the 513-bit vector returning rx513_raw<527 :0> which is sent to client interface.
The DECODE function shall decode the block as specified in Figure VIII.2.
R_BLOCK_TYPE = {C, S, T, D, E, M}
This function classifies each 66-bit rx_tcd vector as belonging to one of the six types
depending on its contents.
Values: C, S, T, and D are defined in 49.2.13.2.3 in [IEEE802.3].
M; The vector contains a sync header of 10 and is recognized as a valid PCS lane
alignment marker by using the state machine shown in Figure VIII.3.
E; The vector does not meet the criteria for any other value.
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R_TYPE(rx_tcd<65:0>)
Returns the R_BLOCK_TYPE of the rx_tcd<65:0> bit vector.
R_TYPE_NEXT
Prescient end of packet check function. It returns the R_BLOCK_TYPE of the rx_tcd
vector immediately following the current rx_tcd vector.
VIII.3.2.4 Counters
cnt
Count up to a maximum of p of the number of PCS lanes.
VIII.3.3 State diagrams
The Receive state machine for a series of 513-bit blocks shown in Figure VIII.2 determines whether
the 513-bit block contains valid eight 66-bit blocks or not.
reset + 1027B_hi_ber +
!1027B_block_lock
RX513B_INIT
!POS_violation *
!seq_violation *
!Mseq_violation
V
RX513B_VALID
RX513B_INVALID
rx513_raw 8 x EBLOCK_T
seq_violation False POS_violation +
Mseq_violation False seq_violation +
!POS_violation * Mseq_violation
!seq_violation *
!Mseq_violation
V
Figure VIII.2/G.709/Y.1331 - Receive state machine for the 512B/513B code blocks
including lane alignment markers
The Trans-decode state machine for a series of 66-bit blocks shown in Figure VIII.3 checks the
block type sequence of recovered 66-bit blocks.
The PCS lane alignment marker state machine for a series of 66-bit blocks shown in Figure VIII.4
detects the alignment markers every p 16384 blocks and checks whether the marker is in
ascendant order or not.
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reset + 1027B_hi_ber +
!1027B_block_lock
RX_INIT
Seq_violation False
R_TYPE(rx_tcd) = S R_TYPE(rx_tcd) = (D + T)
D R_TYPE(rx_tcd) = (C + E + M)
C
RX_C
R_TYPE(rx_tcd) = (C + E + M) R_TYPE(rx_tcd) = (D + T)
R_TYPE(rx_tcd) = S
D
RX_D
(R_TYPE(rx_tcd) = T *
R_TYPE_NEXT = (E + D + T)) +
R_TYPE(rx_tcd) = (D + E + M) R_TYPE(rx_tcd) = (C + S)
RX_Seq_Violation
R_TYPE(rx_tcd) = T *
R_TYPE_NEXT = (S + C + M) Seq_violation True
R_TYPE(rx_tcd) = T *
R_TYPE_NEXT = (S + C + M) (R_TYPE(rx_tcd) = T *
R_TYPE_NEXT = (E + D + T))
+ R_TYPE(rx_tcd) = S
RX_T R_TYPE(rx_tcd) = (C + E + M)
R_TYPE(rx_tcd) = D
R_TYPE(rx_tcd) = (C + M) R_TYPE(rx_tcd) = S
D
C D
Figure VIII.3/G.709/Y.1331 - Trans-decode state machine for the 64B/66B code blocks
including the lane alignment markers
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reset + 1027B_hi_ber +
!1027B_block_lock
RX_INIT
Mseq_violation False
UCT CT
RX_CNT_INIT
UCT
RX_CNT
cnt ++
RX_M
cnt ++
cnt < p * cnt < p *
rx_tcd = Mcnt+1 rx_tcd != Mcnt+1
cnt = p
CT RX_ME
Mseq_violation True
cnt ++ cnt < p *
p = 4 for 40GbE
p = 20 for 100GbE rx_tcd != Mcnt+1
cnt < p *
rx_tcd = Mcnt+1 cnt = p
M CT
Figure VIII.4/G.709/Y.1331 - Receive state machine for the lane alignment markers
Appendix IX
CRC-8
Table IX.1 illustrates example logic equations for a parallel implementation of the CRC-8 using the
g(x) = x8 + x3 + x2 + 1 polynomial over the JC1-JC2. An “X” in a row of the table indicates that the
message bit of that column is an input to the Exclusive-OR equation for calculating the CRC bit of
that row. JC1.C1 corresponds to the first bit (MSB) of the first mapping overhead octet (JC1);
JC1.C2 corresponds to bit 2 of the first mapping overhead octet, etc. After computation, CRC bits
crc1 to crc8 are inserted into the JC3 octet with crc1 occupying MSB and crc8 the LSB of the octet.
JC1.C3 X X X
JC1.C4 X X X
JC1.C5 X X X
JC1.C6 X X X
JC1.C7 X X X
JC1.C8 X X X
JC2.C9 X X X X X
JC2.C10 X X X X X
JC2.C11 X X X X X
JC2.C12 X X X
JC2.C13 X X X
JC2.C14 X X X
JC2.II X X X
JC2.DI X X X
CRC-5
Table IX.2 illustrates example logic equations for a parallel implementation of the CRC-5 using the
g(x) = x5 + x + 1 polynomial over the JC4-JC5 CnD fields. An “X” in a row of the table indicates
that the message bit of that column is an input to the Exclusive-OR equation for calculating the
CRC bit of that row. JC4.D1 corresponds to the first bit (MSB) of the first mapping overhead octet
(JC1); JC4.D2 corresponds to bit 2 of the first mapping overhead octet, etc. After computation,
CRC bits crc1 to crc5 are inserted into the JC6 octet with crc1 occupying JC6 bit 4 and crc5 the JC6
bit 8.
Appendix X
OTL4.10 Structure
The purpose of the OTM-0.4v4 interface as defined in 8.1.3 is to enable the re-use of modules
developed for Ethernet 100GBASE-LR4 or 100GBASE-ER4 interfaces. These modules have
corresponding optical specifications for OTU4 interfaces with the optical parameters as specified
for the application codes 4I1-9D1F and 4L1-9C1F, respectively, in [ITU-T G.959.1]. These
modules have a four-lane WDM interface to and from a transmit/receive pair of G.652 optical
fibres, and connect to the host board via a 10-lane electrical interface. The conversion between 10
and 4 lanes is performed using an IEEE 802.3ba PMA sublayer as specified in IEEE P802.3ba D2.2
clause 83. The specification of the 10-lane electrical chip-to-module interface (CAUI) is found in
IEEE P802.3ba D2.2 Annex 83B. The application of the OTL4.10 interface is illustrated in
Figure X.1:
OTL4.10
OTL4.4
Host PMA
Board 10:4
Each OTL4.10 lane carries two bit-multiplexed logical lanes of an OTU4 as described in Annex C.
The logical lane format has been chosen so that the IEEE P802.3ba 10:4 PMA (gearbox) will
convert the OTU4 signal between a format of 10 lanes of OTL4.10 and four lanes of OTL4.4. Each
OTL4.4 lane carries five bit-multiplexed logical lanes of an OTU4 as described in Annex C.
The bit rate of an OTL4.10 lane is indicated in Table X.1.
Appendix XI
CPRI constant bit rate signals (CPRI Options 1 to 6) may be transported over an ODUk connection.
These CBR signals are mapped into a LO OPUk via the generic mapping procedure as specified in
17.6 for CPRI Options 1 to 3 and via the bit-synchronous mapping procedure as specified in 17.8
for CPRI Options 4 to 6.
Two CPRI signals (Option 1 and 2) are transported via OPU0, one CPRI signal (Option 3) is
transported via OPU1 and three CPRI signals (Option 4, 5 and 6) are transported via OPUflex. The
GMP Cm and Cn (n=1) values associated with the CPRI Option 1 to 3 signals are presented in
Tables XI.1 and XI.2.
The use of the “Experimental mapping” Payload Type (code 0x01) is suggested.
NOTE – Performance evaluation of the CPRI over OTN transport is ongoing and there is no
guarantee yet that all CPRI performance specifications can be met.
The CPRI replacement signal is the Link Fault signal as defined in 17.6.1.1.
Table XI.2A/G.709/Y.1331 –Cm (m=16) for supra-1.238 to sub-2.488G clients into OPU1
Client signal Nominal Bit rate Floor Minimum Nominal Maximum Ceiling
bit rate tolerance C16,min c16 c16 c16 C16,max
(kbit/s) (ppm)
CPRI Option 3 2 457 600 0.002 7521 7521.825 7521.975 7522.126 7523
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Appendix XII
Note 1 – For this specific case the mapping used is byte synchronous.
BIBLIOGRAPHY
[1] ANSI INCITS 424-2007, Fibre Channel Physical and Signaling Interface (FC-PH).