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Logic Gates 1 RTL-DTL New

The document describes an experiment to verify the truth tables of basic logic gates (NOT, AND, OR) and universal gates (NAND, NOR) using resistor-transistor logic (RTL) and diode-transistor logic (DTL) circuits. It provides the circuit diagrams and formulas for each gate, along with their truth tables. The experiment resulted in successfully verifying the truth tables for each logic gate type.

Uploaded by

Farheen Mahjarin Trisha
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© © All Rights Reserved
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266 views3 pages

Logic Gates 1 RTL-DTL New

The document describes an experiment to verify the truth tables of basic logic gates (NOT, AND, OR) and universal gates (NAND, NOR) using resistor-transistor logic (RTL) and diode-transistor logic (DTL) circuits. It provides the circuit diagrams and formulas for each gate, along with their truth tables. The experiment resulted in successfully verifying the truth tables for each logic gate type.

Uploaded by

Farheen Mahjarin Trisha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Experiment 

: LOGIC GATES 
Object : To verify the truth table of basic gate (NOT, AND, OR) and universal gates (NAND and NOR)
using RTL (using Resistor Transistor Logic)/ DTL (Diode Transistor Logic) circuits.

Apparatus used: Resistor, diode, transistor, LED, 5-volt power supply, IC and connecting wires.

Formula and circuit diagram:

[1] NOT Gate : Y=A

Figure 1: RTL as NOT gate


[2] AND Gate : Y= A . B

Figure 2: Diode circuit as AND gate

[3] OR Gate : Y= A + B              

Figure 3: Diode circuit as OR gate


  1
Experiment : LOGIC GATES 

[4] NAND Gate : Y = A.B

 
            Figure 4: DTL as NAND Gate 

[5] NOR Gate: Y = A + B

Figure 5: DTL as NOR Gate


Observation :

1. Truth Table for NOT gate

A A
0 1
1 0

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Experiment : LOGIC GATES 
2. Truth Table for AND gate

A B  A.B
0 0 0
0 1 0
1 0 0
1 1 1

3. Truth Table for OR gate

A B  A+B
0 0 0
0 1 1
1 0 1
1 1 1

4. Truth Table for NAND gate

A B  A.B Y = A.B
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
5. Truth Table for NOR gate

A B  A+B Y = A + B
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0

RESULT: The truth table for basic logic gates are verified.

Precaution:
1. Input must be off 5 volts.
2. Connections should be jointed correctly.
3. Connections must be tight.

  3

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