Common Source Amplifier Using Cadence

EXPERIMENT - 3
Fig 1.(a) Fig 1.(b) Fig 1.(c) Fig 1.(d)
Theory:-
Given:- Gain= 5 V/V , ID= 50 μA , Vout=.2V = Overdrive Voltage (VOD)
1.a) Calculation of W/L to obtain 50uA current
1.Drawn the NMOS with the length of 4 μ m and width as parametric
2.Connected diode connection to NMOS for parametric analysis of w
3.Connected 50 μ A current source to the drain of diode connected NMOS by
using a dc voltage source of 1.8V in GPDK180nm technology
4.Simulation of above connected circuit is performed and obtained w value at an overdrive
voltage of 200mV
Fig 1: Reference circuit to obtain W value
Fig 2: Parametric analysis foe finding w value
From fig 2, the obtained W value is 22.32u

 From the above analysis obtained w/l ratio is 22.32 μ m/4 μ m
 By using above w/l ratio the overdrive voltage of 200mV is obtained but not output
current Output current of the circuit is to be 50 μ A and gain must be equal to 5.
 To obtain above specified values, by doing trial and error method, we obtained W/L,
power, Vgs, Vth, Ids, Vds, gm, and Rd as follows by considering gain as 5V/V and
overdrive voltage of 200mV.
AC Analysis: -
Fig 3: AC analysis of common source amplifier
AC analysis steps
1. Connected circuit as shown in the above figure with the input voltages and proper power
supplies to obtain a gain of 5V/V and a load current of 50 μ A (all the values are shown in DC
analysis in the below fig 4)
2. By trial and error using parametric obtained W/L as 23.68um/4.24um ratio is 5.58
3. AC input source is connected with a Vgs of 654mV and an AC voltage as 1mV
4. A load capacitor of value 100fF is connected to find the gain of the circuit
5. For the above circuit Vth of NMOS is obtained using cadence calculator after performing the
DC analysis of the above circuit
6. The technology which is used throughout the analysis is GPDK 180nm
7. After giving proper biasing and all, the simulation results are performed in the ADE simulator
and obtained gain vs frequency plot.
8. To plot the pole and zero response curve, we have to choose pz plot in the ADL analysis
Pole zero plot steps:

 In ADL window go to analysis select  pz analysisoutput
 positive o/p node=Vout, -ve ouput node= ground
 Inputinput voltage sourceVsinclick run
To plot pole zero,

 Click results on ADE window Direct plotMain plot Run
 Analysis-pzfunction  pole zero
 Click plotMain plot Run
Output curve: -
Fig 4: AC analysis of common source amplifier
As we can see from the plot, the gain is 14.047 dB .

 20logAv = 13.9643
 Av = 4.99 V/V
 | Av| ≈ 5 V/V
1.b) For power consumption: -(DC Analysis)

I=50.09 μ A, Vth =453.7mV, Ids(sat)=50.09 μ A, Vds=1.1237 V, gm=418.488 μ ʊ
From the above data we can calculate power consumption as: -
Power Consumption = VDD x ID
P= VDD x ID =1.8 × 50 μ A = 90 μ W
1.c) 3dB cut-off frequency is given as:-

From the above plot , Band Width = 72.9474 MHz
 Gain ≈ - 5 V/V
 For Gain bandwidth Product: -
From the above plot gain bandwidth product = 364.735 MHz
Fig 5: Pole zero Response of a CS amplifier
Fig 6: Pole and zero:
1.d) Connecting gate to drain capacitance of 10fF to the input transistor: -

AC analysis:
Fig 7: Common source amplifier with gate to drain capacitance of 10fF to the input transistor
DC analysis
Fig 8: Common source amplifier with gate to drain capacitance of 10fF to the input transistor
Output curve: -
Fig 9: Frequency response of CS amplifier with Gate to drain capacitance
From the plot we can see

 20log (Gain) = 13.947 dB
 Gain = - 4.99 V/V
 | Av| ≈ 5 V/V
 Power Consumption = VDD x ID
= 1.8 x 50x10^-6
= 90 μ W
 3dB cut-off frequency is given as: -

From the above plot, Band Width = 67.99 MHz
 For Gain bandwidth Product: -

From above table it has one zero and one pole

Fig 10: Pole zero plot of CS amplifier with Gate to drain capacitance
e) Connect 40 k resistor at the gate of the input transistor

AC analysis:
Fig 11: Common source amplifier with gate to drain capacitance of 10fF and 40k input
resistance to the input transistor
DC analysis
Fig 12: Common source amplifier with gate to drain capacitance of 10fF and 40k input
resistance to the input transistor
Output curve:-
Fig 13: Common source amplifier Frequency response with gate to drain capacitance of 10fF
and 40k input resistance to the input transistor
Power Calculation
 20log (Gain) = 13.947 dB
 Gain = - 4.99 V/V
 | Av| ≈ 5 V/V
= 1.8 x 50x10^-6
= 90 μ W
3dB cut-off frequency is given as: -

 For Gain bandwidth Product: -

Fig 14: Pole zero response

 From above table it has one zero and two poles
Fig 15: Unity gain frequency of CS amplifier with input resistance and capacitance
Unity gain frequency of CS amplifier with input resistance and capacitance is 32.85MHz
(f) Calculation for modified circuit :-

Using above data for M1 transistor and finding M2 as per requirement, so that both the
transistor work in saturation region, given that Vout(min) =0.5V.
Fig 16: Cascaded CS amplifier DC analysis

Above fig 16 shows, A Connected transistor at the drain of the input transistor. Choosen V B to ensure
that the transistors are in saturation region while maintaining the minimum possible output voltage
is 500 mV.
From the above DC analysis,
 W2/L2=10.72 μ /4.24 μ, w1/l1= 23.68 μ /4.24 μ,
 Vgs1=654mV,
 Vb =1.23V =Vgs2,
 Ids1=Ids2=49.60 μ A
 Vds2=500.35mV , Vds1=456.35mV
Fig 17: Cascaded CS amplifier AC analysis

Output curve:-
Fig 18: Cascaded CS amplifier gain vs frequency plot
Power Calculation
 20log (Gain) = 13.907 dB
 Gain = - 4.89 V/V
= 1.8 x 49.60 μ A
= 89.38 μ W
3dB cut-off frequency is given as :-

 For Gain bandwidth Product:-

Fig 19: Cascaded CS amplifier pole zero plot
Cascaded CS amplifier has 3 poles and 2 zeroes which are shown in the below table:
Table
Parameter Value
DC bias to the input transistor VGS=654m V
W/L of the input transistor 5.58
W/L of the cascode transistor 8.64
DC current 49.60 μ A
VB 1.23 V
Small signal Fig 1. (a) 4.99 V/V
gain Fig 1. (b) 4.99 V/V
Fig 1. (c) 4.99 V/V
Fig 1. (d) 4.89 V/V
Bandwidth Fig 1. (a) 72.94MHz
Fig 1. (b) 67.99MHz
Fig 1. (c) 4.98 MHz
Fig 1. (d) 5.73 MHz
Unity gain Fig 1. (a) 432.89MHz
frequency Fig 1. (b) 402.5 MHz
Fig 1. (c) 24.13 MHz
Fig 1. (d) 36.13 MHz
Observations: (i) We can see gain of the amplifier

remained same and in cascode
configuration it gets decreased to 4.89.
(ii) BW and Unity gain frequency of the
amplifier also get decreasing due to
addional poles at each stages .

Common Source Amplifier Using Cadence

Uploaded by

Copyright:

Available Formats

Common Source Amplifier Using Cadence

Uploaded by

Document Information

Original Description:

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Common Source Amplifier Using Cadence

Uploaded by

Copyright:

Available Formats

EXPERIMENT - 3

Fig 1.(a) Fig 1.(b) Fig 1.(c) Fig 1.(d)

Fig 1: Reference circuit to obtain W value

Fig 2: Parametric analysis foe finding w value

From fig 2, the obtained W value is 22.32u

Fig 3: AC analysis of common source amplifier

Pole zero plot steps:

To plot pole zero,

As we can see from the plot, the gain is 14.047 dB .

1.b) For power consumption: -(DC Analysis)

From the above data we can calculate power consumption as: -

Power Consumption = VDD x ID

1.c) 3dB cut-off frequency is given as:-

Fig 5: Pole zero Response of a CS amplifier

Fig 6: Pole and zero:

1.d) Connecting gate to drain capacitance of 10fF to the input transistor: -

From the plot we can see

 3dB cut-off frequency is given as: -

 For Gain bandwidth Product: -

From above table it has one zero and one pole

e) Connect 40 k resistor at the gate of the input transistor

3dB cut-off frequency is given as: -

 For Gain bandwidth Product: -

Fig 14: Pole zero response

(f) Calculation for modified circuit :-

Fig 16: Cascaded CS amplifier DC analysis

From the above DC analysis,

 W2/L2=10.72 μ /4.24 μ, w1/l1= 23.68 μ /4.24 μ,

Fig 17: Cascaded CS amplifier AC analysis

Fig 18: Cascaded CS amplifier gain vs frequency plot

3dB cut-off frequency is given as :-

 For Gain bandwidth Product:-

Observations: (i) We can see gain of the amplifier

You might also like

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.