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DLD Lab Report 03

The document is a lab report discussing the implementation of logic functions using standard forms. It summarizes building Sum of Products (SOP) and Product of Sums (POS) circuits based on a given truth table to compare results. The SOP circuit is described through its equation and logic gate diagram. When tested with sample inputs from the truth table, the SOP circuit output matches the expected output in the truth table.
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0% found this document useful (0 votes)
47 views7 pages

DLD Lab Report 03

The document is a lab report discussing the implementation of logic functions using standard forms. It summarizes building Sum of Products (SOP) and Product of Sums (POS) circuits based on a given truth table to compare results. The SOP circuit is described through its equation and logic gate diagram. When tested with sample inputs from the truth table, the SOP circuit output matches the expected output in the truth table.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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1

DIGITAL LOGIC DESIGN


LAB REPORT # 03
Submitted to: Engineer Sadaf Sardar
Submitted by: ZAIN ULLAH
Registration Number: 20PWMCT0761
Lab Report Rubrics:

Below Basic
Excellent (4) Proficient (3) Basic (2) Student’s
Criteria (1) Score
Report is mostly Report is
Sections/
Report is as per as per the disorganized and
To organize the lab Steps are not
the guidelines. All guidelines and most follows some
report and practice the ordered and
sections/steps are sections/steps are guidelines but
writing skills as per the Report is not as
clearly organized ordered well but most of the
guidelines per the
in a logical order. requires minor guidelines are
guidelines
improvements. missing
The report
completely
The report
discusses the The report The report is
discusses the
required discusses the totally
To discuss the actual experiment/lab
experiment/lab required irrelevant to the
experiment/task work but have
work in own experiment/lab experiment/lab
irrelevant
words with some work work
information
relevant additional
information
Calculations and
data analysis were Most data and
Calculations
performed observations
and data analyses Calculations
To perform accurately, but were recorded
were performed and data
calculations and data minor errors were adequately, but
clearly, concisely, analyses of lab
analysis made both in with several
and accurately, were missing
calculations and in significant errors
with correct units.
applying correct or omissions.
units
Graphs, if
necessary, were Graphs, if Major
Graphs, if
To present results in drawn accurately necessary, were components of
necessary, were
the form of graphs and neatly and drawn but lab were
drawn adequately
were clearly inadequately. missing
labelled.

ZAIN ULLAH 20PWMCT0761


2

Title of Lab Report


 Implement logic functions using the standard forms i.e. (SOP &
POS).

TASK
 Make 2 circuits i.e. SOP & POS using the following truth table
and compare their results which will be equal to the truth table.

A B C X
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

ZAIN ULLAH 20PWMCT0761


3

SOP CIRCUIT
First we have to make SOP circuit and test it whether it satisfies
the given truth table. Now we know that in case of SOP circuit
we look for the min terms i.e. 1 in the truth table and make SOP
equation. We will consider that logic in which the result is 1.
Now there are 4 logics in the given truth table with result 1, so
for each input 1 we consider as original input like A, but for each
input 0 we consider as inverted input like A and for the whole
logic with let us say 3 inputs we take theproduct of the
considered inputs. When we get the combinations of all logics
we just add them because this equation is meant as SUM OF
PRODUCTS.

EQUATION
AB C + ABC + A BC + ABC

LOGIC GATE DIAGRAM

ZAIN ULLAH 20PWMCT0761


4

A
U2 U12 U6

U4
NOT AND2 AND2 X
B
U11 U1
OR2 3V
U9 U3
AND2 AND2

NOT U13 U7 OR2


C
U5
AND2 AND2

U14 U8 OR2
U10

AND2 AND2
NOT

CIRCUIT DIAGRAM
When A=0 , B=0 , C=1 || X=1

A1

OR1 Key = Space

Power1 AND2 AND1 NOT1 B1


1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1Y 6A
2A 6Y
2Y 5A
3A 5Y
3Y 4A
GND 4Y

5V 74LS32N 74LS08D Key = Space


C1
74LS08D 74LS04N
Key = Space

LEDX

When A=1 , B=0 , C=1 || X=0

A1

OR1 Key = Space

Power1 AND2 AND1 NOT1 B1


1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1Y 6A
2A 6Y
2Y 5A
3A 5Y
3Y 4A
GND 4Y

5V 74LS32N 74LS08D Key = Space


C1
74LS08D 74LS04N
Key = Space

LEDX

ZAIN ULLAH 20PWMCT0761


5

 When other logics were tested they were equal to the results in the truth
table.

REAL TIME CIRCUIT

POS CIRCUIT
We have to make POS circuit and test it whether it satisfies the
given truth table. Now we know that in case of POS circuit we
look for the max terms i.e. 0 in the truth table and make POS
equation. We will consider that logic in which the result is 0.
Now there are 4 logics in the given truth table with result 0, so
for each input 0 we consider as original input like A, but for each
input 1 we consider as inverted input like A and for the whole
logic with let us say 3 inputs we take thesum of the considered
inputs. When we get the combinations of all logics we just
multiply them because this equation is meant as PRODUCT OF
SUMS.

EQUATION
( A+ B+C)( A +B+ C)(A + B+C)( A+ B+C )

ZAIN ULLAH 20PWMCT0761


6

LOGIC GATE DIAGRAM

B
U2 U12 U6
C
U4
NOT OR2 OR2 X
U11 U1
AND2 3V
U9 U3
OR2 OR2
NOT U13 U7 AND2

U5
OR2 OR2

U14 U8 AND2
U10

OR2 OR2
NOT

CIRCUIT DIAGRAM
When A=0 , B=0 , C=1 || X=1

Key = Space
Power
AND OR2 OR1 NOT B
1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1Y 6A
2A 6Y
2Y 5A
3A 5Y
3Y 4A
GND 4Y

5V 74LS08N 74LS32N 74LS32N


74LS04N Key = Space
C

Key = Space

LEDX

When A=1 , B=0 , C=1 || X=0

ZAIN ULLAH 20PWMCT0761


7

Key = Space
Power
AND OR2 OR1 NOT B

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y

1A VCC
1Y 6A
2A 6Y
2Y 5A
3A 5Y
3Y 4A
GND 4Y
5V 74LS08N 74LS32N 74LS32N
74LS04N Key = Space
C

Key = Space

LEDX

When other logics were tested they were equal to the results in the truth table.

REAL TIME CIRCUIT

ZAIN ULLAH 20PWMCT0761

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