Basic Logic Gates
Basic Logic Gates
Logic Gate
⚫ It is a digital circuit that performs common
logical functions such as AND, OR, NOT
NOT Gate (Inverter)
⚫ Performs logical complementation
⚫ Symbol
X Z X- INPUT
Z- OUTPUT
OPERATION Z =𝑋ത
⚫ Truth table
X Z
0 1
1 0
AND Gate
⚫ Performs logical multiplication
⚫ Symbol
x
y Z X, Y – INPUTS
Z – OUTPUT
Truth table OPERATION
Z = X.Y
X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
OR Gate
⚫ Performs logical addition
⚫ Symbol
X
Z
y X, Y – INPUTS
Z – OUTPUT
⚫ Truth table OPERATION
Z=X+Y
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1
⚫ Implement the circuit for the following
expression using AND, OR, NOT gate
⚫ ҧ + X 𝑌ത
Z = 𝐴B
⚫ Implement the following Boolean expressions
using basic logic gates
⚫ A = X + Y𝑍ҧ
⚫ A = (𝑋ത + Y). 𝑍ҧ
⚫ Z = A(B + C) + 𝐵Dത
Other logic Gates
NAND Gate – Universal
Logic Gate
⚫ Performs NOT(AND) operation
⚫ Symbol
X
Y Z X, Y – INPUTS
Z – OUTPUT
OPERATION
X Y Z Z = (NOT
Truth table )X . Y
0 0 1
0 1 1
1 0 1
1 1 0
NOR GATE - Universal Logic
Gate
⚫ Performs NOT (OR)Operation
⚫ Symbol
X
X, Y – INPUTS
Y Z Z – OUTPUT
⚫ Truth table OPERATION
Z = (NOT)X + Y
X Y Z
0 0 1
0 1 0
1 0 0
1 1 0
Examples
⚫ 𝐴+𝐵 𝐶
⚫ 𝐴 + 𝐵𝐶 + 𝐴𝐵 + 𝐶𝐷
EXCLUSIVE OR Gate (XOR)
Exclusive NOR Gate (XNOR)
Y Z OPERATION
Z = 𝑋𝑌 + XY
Z=𝑥⊕𝑦
X Y Z
0 0 1
0 1 0
1 0 0
1 1 1
Some of the available IC Gates
IC NO Description
7408 Quad2 – input AND gate
7411 Triple 3 – input AND gate
7404 Hex inverters
7432 Quad2 – input OR gate
7400 Quad2 – input NAND gate
Logic Circuit Design
⚫ When designing a logic circuit we work with 2
sets of known values
⚫ Various states of input combination of a
circuit
⚫ The desired output for each input
combination
Steps in designing a logic
circuit
⚫ Construct a truth table, which describes the
input/ output relationship by the given
specifications
⚫ Derive an algebraic expression for each of
the outputs
⚫ SOP method
⚫ POS method
⚫ Reduce the output expression as much as
possible
⚫ Algebraically
⚫ Using k maps
⚫ Using tabular method
⚫ Implement the circuit using gates
Binary Adders
Binary Half Adder
⚫ It is a logic circuit for addition of two 1 – bit
binary numbers
A SUM
HA
B CARRY
⚫ TRUTH TABLE
A SUM
B FA
C CARRY
Question1
⚫ Design a logic circuit to add two, 2 – bit
binary numbers, implement the circuit using
logic gates
Question 2
⚫ In a digital system an error comparator is
required which will compare two, 2 – bit
binary numbers A, B and gives separate
outputs for the conditions A= B, A> B and
A<B.
⚫ Design a logic circuit to perform the above
function
Question 3
⚫ Implement NOT, AND , OR operations using:
⚫ NAND gates only
⚫ NOR gates only
Question 4
⚫ A bank safe has 3 locks with a key for each lock.
Each key is owned by a different person.
⚫ In order to open the safe door at least two
people must insert their keys into the assigned
locks at the same time.
⚫ The trainee (i.e person no3) can only open the
safe when the manager (person no 1)is present
in the opening.
⚫ The signal lines (A, B, C) are 1 if the key is
inserted into locks 1, 2 , 3 respectively
⚫ Implement the circuit using
⚫ AND, OR, NOT gates
⚫ NAND gates only
⚫ NOR gates only
⚫ Using suitable multiplexer
Question 5
⚫ An assembly line has 3 failsafe sensors and 1
emergency shutdown switch. The line should
keep moving unless any of the following
conditions arises.
⚫ If the emergency switch is presses, the system
shut down
⚫ If sensor1 and sensor2 are activated at the same
time the system shut down
⚫ If sensor2 and sensor3 are activated at the same
time the system shut down
⚫ If all 3 sensors are activated at the same time the
system shut down
⚫ Implement the circuit using
⚫ AND, OR, NOT gates
⚫ NAND gates only
⚫ NOR gates only
⚫ Using suitable multiplexer
Question 6
⚫ Design a binary subtractor which takes two, 2
bit binary numbers A and B as inputs and
outputs the difference (A - B) as a 2bit binary
number and the sign of the result by a 3rd
output signal N- N is at logic 1 for a negative
and 0 for a positive result
⚫ Design above circuit using
⚫ NAND gates
⚫ 8:1 multiplexers
P Q R S X Y N
0 0 0 0 0 0 0
0 0 0 1 0 1 1
0 0 1 0 1 0 1
0 0 1 1 1 1 1
0 1 0 0 0 1 0
0 1 0 1 0 0 0
0 1 1 0 0 1 1
0 1 1 1 1 0 1
1 0 0 0 1 0 0
1 0 0 1 0 1 0
1 0 1 0 0 0 0
1 0 1 1 0 1 1
1 1 0 0 1 1 0
1 1 0 1 1 0 0
1 1 1 0 0 1 0
1 1 1 1 0 0 0
S
S1
A
S2
Question 7 C
Question 8
⚫ A solar energy system has four sensors S1,
S2, S3 and S4. The sensor alarm(Y)
connected to the heater system will be ON if
the following conditions are satisfied:
⚫ If sensors S3 and S4 are activated at the
same time.
⚫ If at least three of the four sensors are
activated at the same time.
a) Determine the truth table for the system.
b) Obtain the simplified:
I. SOP expression.
II. POS expression.
D1
Mux
N:1 Y
DN-1
DN
SN SN-1 S0
Design of 2:1 multiplexer
Design of 4:1 multiplexer
Design of 8:1 multiplexer
Available Multiplexer ICs
IC No Description Output
74157 Quad 2:1 mux Same as input
74158 Dual 4:1 mux Same as input
74152 8:1 mux Inverted Input
Q1
⚫ Implement
F (A, B, C) = ∑m (2, 3, 5, 7) using
1) Basic Logic Gates
2) 4:1 mux
3) 8:1 mux
Q2
⚫ Implement a half adder using two 2:1
multiplexers
Q3
⚫ Implement the following logic
functions as specified in the given
truth table
A B C Y
⚫ 4:1 0 0 0 0
⚫ 8:1 0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
De Multiplexer